Abstract: A technique for managing memory allocation in an electronic device is provided. In one embodiment, a method includes loading a memory allocation strategy for an application executed by a processor of a device, and requesting memory for the application from various memory locations in accordance with the memory allocation strategy. In one embodiment, the device includes multiple sets of contiguous memory blocks and a memory heap, memory may be requested from at least one of these memory locations, and memory may then be allocated to the application in response to the request. In some embodiments, the memory allocation strategy may be stored in the device prior to execution of the application. Various other methods, devices, and manufactures are also provided.

Abstract: A system and method of buffer management may employ a common data structure that is recognizable by both hardware and firmware. In some implementations, hardware register settings may be programmed independent of firmware updates to an internal sub-segment description table maintained in an ASIC or other buffer manager logic. Implementation of such a common data structure in external memory may substantially reduce hardware real estate and complexity of a buffer manager ASIC by minimizing the number of required registers and eliminating the need for an internal sub-segment descriptor table. In addition, by eliminating the internal sub-segment descriptor table and allowing buffer manager logic to recognize a common data structure in external memory, the number of buffer sub-segments recognized by the buffer manager may be readily expanded, and may be limited only by the size of the external memory.

Abstract: A controller for scan testing a memory. The controller includes a control state machine for controlling the scan process, a test sequence stored in a random access memory used by the control state machine for controlling an actual memory test, a pattern generation data unit responsive to the control state machine for generating a test pattern that is written to and read from a memory under test, a configuration register read by the control state machine for configuring the controller and a fault location register written to by the control state machine for storing locations of defects in the memory. The controller is used to auto scan a memory in real time, interleaved with other processes accessing the memory. The controller has several modes of operation including operating in a periodic burst mode to conserve power and in a background mode so as not to interfere with other processes accessing the scanned memory.

Abstract: A method of error correction for a multicast message sent over a wireless network includes encoding a message into N data packets using a forward error correction code and multicasting at least L data packets of the N data packets over a wireless network to recipients. Recipients not receiving the at least L data packets send a reply to the sender. The sender then selects a second subset of X data packets from the N data packets, and multicasts the X data packets over the wireless network to the recipients.

Abstract: The transfer of data from a host computer to a recordable disk in a disk drive operating on the host computer is managed. A buffer for temporarily storing data to be transferred between the host computer and the recordable disk is maintained, wherein the buffer comprises a plurality of host segments and a plurality of disk segments, and wherein each of the host segments and disk segments have a sector count value associated therewith. In a case where the transfer of data corresponds to a host segment, the host segment is selected from the plurality of host segments in the buffer. In a case where the transfer of data corresponds to a disk segment, the disk segment is selected from the plurality of disk segments in the buffer. In a case where a host segment is selected, the sector count value of the selected host segment is adjusted. In a case where a disk segment is selected, the sector count value of the selected disk segment is adjusted.

Abstract: A method for facilitating firewall and NAT traversal during social networking and/or content sharing via a mobile device uses an instant message protocol to establish a near real-time communications session between two user devices on opposite sides of the firewall or NAT enabled router. A first application on a mobile device provides social networking and/or content sharing. A second application on the mobile device establishes a communication session for exchanging near real-time messages between the mobile device and a second device over the firewall or NAT protected network. The second application is associated with the first application and allows the mobile device to access a file associated with the first application that is stored in the second device via the communication session.

Abstract: A computer system for writing data to a memory is disclosed. The memory controller in the computer system comprises a system clock, which is generated by the memory controller. A first register captures the lower data word based on the rising edge of the system clock. A second register, coupled to the first register, captures the output of the first register based on the rising edge of the system clock. A third register, captures the upper data word based on the falling edge of the system clock. A forth register, coupled to the third register, captures the output of the third register based on the falling edge of the system clock. A first multiplexer is coupled to a forth register and a second register. A delay element, coupled to the system clock and a first multiplexer, adjusts the phase of the system clock. A second multiplexer, coupled to the system clock, generates a data strobe.

Abstract: A system includes a host first-in first-out (FIFO) module, a first encoder module, a control module, a disk FIFO module, and a second encoder module. The host FIFO module receives a block having data and selectively receives a host logical block address (HLBA). The first encoder module generates a first checksum based on the data and the HLBA and generates a first encoded block. The control module appends the HLBA to the first encoded block and generates an appended block. The disk FIFO module receives the block from the host FIFO module. The second encoder module selectively generates a second checksum based on the HLBA and the data in the block received by the disk FIFO module. The second encoder module compares the block received by the disk FIFO module to the block received by the host FIFO module based on the first and second checksums.

Abstract: A controller for scan testing a memory. The controller includes a control state machine for controlling the scan process, a test sequence stored in a random access memory used by the control state machine for controlling an actual memory test, a pattern generation data unit responsive to the control state machine for generating a test pattern that is written to and read from a memory under test, a configuration register read by the control state machine for configuring the controller and a fault location register written to by the control state machine for storing locations of defects in the memory. The controller is used to auto scan a memory in real time, interleaved with other processes accessing the memory. The controller has several modes of operation including operating in a periodic burst mode to conserve power and in a background mode so as not to interfere with other processes accessing the scanned memory.

Abstract: The transfer of data from a host computer to a recordable disk in a disk drive operating on the host computer is managed. A buffer for temporarily storing data to be transferred between the host computer and the recordable disk is maintained, wherein the buffer comprises a plurality of host segments and a plurality of disk segments, and wherein each of the host segments and disk segments have a sector count value associated therewith. In a case where the transfer of data corresponds to a host segment, the host segment is selected from the plurality of host segments in the buffer. In a case where the transfer of data corresponds to a disk segment, the disk segment is selected from the plurality of disk segments in the buffer. In a case where a host segment is selected, the sector count value of the selected host segment is adjusted. In a case where a disk segment is selected, the sector count value of the selected disk segment is adjusted.

Abstract: A technique for managing memory allocation in an electronic device is provided. In one embodiment, a method includes loading a memory allocation strategy for an application executed by a processor of a device, and requesting memory for the application from various memory locations in accordance with the memory allocation strategy. In one embodiment, the device includes multiple sets of contiguous memory blocks and a memory heap, memory may be requested from at least one of these memory locations, and memory may then be allocated to the application in response to the request. In some embodiments, the memory allocation strategy may be stored in the device prior to execution of the application. Various other methods, devices, and manufactures are also provided.

Abstract: A method of optimizing a set of steps in a semi-conductor processing system comprising a software control program, wherein the semi-conductor processing system includes a first function, a second function, and a third function, and further includes a memory for storing a set of variables, and wherein the set of steps further includes a first step, a second step, and a third step. The invention includes generating the first step on an editor application, wherein the first function is added to the first step, and if required, a first set of user input instructions is added. The invention also includes generating the second step on the editor application, wherein the second function is added to the second step, and if required, a second set of user input instructions is added; and generating the third step on the editor application, wherein the third function is added to the third step, and if required, a third set of user input instructions is added.

Abstract: A liquid gathering and transferring apparatus for gathering liquid from a liquid source containing a quantity of liquid having a liquid surface and containing debris and discharging the liquid into a liquid receiving location includes an intake chamber having a chamber discharge end in fluid communication with the liquid receiving location and a chamber structural end opposite the chamber discharge end and a chamber side wall extending between the chamber discharge end and the chamber structural end and a longitudinal series of liquid intake ports in the chamber side wall extending generally between the chamber discharge end and the chamber structural end, the intake ports being of generally increasing diameter along the chamber side wall toward the chamber structural end for minimizing liquid vortex formation at the intake ports; so that the intake chamber can be suspended below the liquid surface at a minimal depth where less debris is present and draw liquid with negligible vortex formation.

Abstract: A food slicer to slice food items in variable widths or thicknesses, the slicer has a frame with an upper and lower platform guide plate to slice food. It also has a translational guide system which moves the top guide plate within a parallel plane between the longitudinally aligned side rails. The translational guide system takes on many forms. One form is a rack and pinion system where the rack is attached to the top guide plate and the pinion is attached to one of two transversely aligned axles. The axles allow for range of movement of the guide plate between an upper location and a lower location. By adjusting the translational guide system, the top guide plate can move up and down between the upper and lower limits or locations which creates differing widths of the cutting slot. The top guide plate has a removable julienne blade plate portion. The bottom guide plate has a removable horizontal blade portion.

Abstract: A method involving plasma cleaning of deposit residues in process chamber using duo-step wafer-less auto clean method is detailed. Specifically, the method involves cleaning the processing chamber by flowing a first gaseous composition with at least about 75% of fluorine-containing compound of the formula XyFz, into a processing chamber and then forming a first etchant plasma which removes silicon and silicon based byproducts from the interior surfaces of the processing chamber. The method then involves flowing a second gaseous composition into the processing chamber with a composition of at least about 50% O2 and forming a plasma from the second gaseous composition to provide a second etchant plasma which removes carbon and carbon based byproducts from the interior surfaces of the processing chamber. A system configured to execute the two step cleaning process is also provided.

Abstract: The invention provides compositions for use as pet litters and pet bedding, or for absorption of liquids and gases. These compositions are formed as aggregates or agglomerates of different components having different hydration capacities and 5 hydration rates.

Abstract: A flow slowing boom for slowing the speed of a buoyant fluid floating on moving water having a direction of water movement and a water surface includes a support structure for positioning at the surface of a body of water across the direction of water movement; an anchoring structure for anchoring the support structure relative to the moving water; a skirt structure; and a pivot structure interconnecting the support structure and the skirt structure so that the skirt structure is pivotably suspended from the support structure and moving water pivots the skirt structure out of a suspended vertical orientation to any of a range of angles beyond vertical including horizontal, thereby constraining buoyant fluid to flow across the skirt structure to slow the speed of the fluid and thus to permit the fluid to buoy toward the water surface for containment. A boom system and method are also provided.

Abstract: A method involving plasma cleaning of deposit residues in process chamber using duo-step wafer-less auto clean method is detailed. Specifically, the method involves cleaning the processing chamber by flowing a first gaseous composition with at least about 75% of fluorine-containing compound of the formula XyFz, into a processing chamber and then forming a first etchant plasma which removes silicon and silicon based byproducts from the interior surfaces of the processing chamber. The method then involves flowing a second gaseous composition into the processing chamber with a composition of at least about 50% O2 and forming a plasma from the second gaseous composition to provide a second etchant plasma which removes carbon and carbon based byproducts from the interior surfaces of the processing chamber. A system configured to execute the two step cleaning process is also provided.

Abstract: Self-steaming benefit compositions for treating fabrics. The present invention relates to compositions which are both self-steaming and include one or more benefit agents to provide benefits to fabrics. The present invention also relates to a method for treating fabrics utilizing the self-steaming benefit compositions of the present invention.