Abstract: A system for transmitting data over an optical communication path is configured to receive data to be encoded in a bitstream for transmission using an optical communication path and encodes the received data to obtain a bitstream. The system is further configured to determine that the bitstream includes a sequence of consecutive bits, and obtain a power level at which to transmit a portion of the bitstream based on a count of the consecutive bits in the sequence. The system may be configured to selectively activate a light source at a power level according to a modulation scheme to optically transmit the portion of the bitstream at the power level.

Abstract: A system for transmitting data over an optical communication path is configured to receive data to be encoded in a bitstream for transmission using an optical communication path and encodes the received data to obtain a bitstream. The system is further configured to determine that the bitstream includes a sequence of consecutive bits, and obtain a power level at which to transmit a portion of the bitstream based on a count of the consecutive bits in the sequence. The system may be configured to selectively activate a light source at a power level according to a modulation scheme to optically transmit the portion of the bitstream at the power level.

Abstract: Disclosed in some examples, are optical devices, systems, and machine-readable mediums that send and receive multiple streams of data across a same optical communication path (e.g., a same fiber optic fiber) with a same wavelength using different light sources transmitting at different power levels—thereby increasing the bandwidth of each optical communication path. Each light source corresponding to each stream transmits at a same frequency and on the same optical communication path using a different power level. The receiver differentiates the data for each stream by applying one or more detection models to the photon counts observed at the receiver to determine likely bit assignments for each stream.

Abstract: A system for transmitting data over an optical communication path is configured to receive data to be encoded in a bitstream for transmission using an optical communication path and encodes the received data to obtain a bitstream. The system is further configured to determine that the bitstream includes a sequence of consecutive bits, and obtain a power level at which to transmit a portion of the bitstream based on a count of the consecutive bits in the sequence. The system may be configured to selectively activate a light source at a power level according to a modulation scheme to optically transmit the portion of the bitstream at the power level.

Abstract: A system for transmitting data over an optical communication path is configured to receive data to be encoded in a bitstream for transmission using an optical communication path and encodes the received data to obtain a bitstream. The system is further configured to determine that the bitstream includes a sequence of consecutive bits, and obtain a power level at which to transmit a portion of the bitstream based on a count of the consecutive bits in the sequence. The system may be configured to selectively activate a light source at a power level according to a modulation scheme to optically transmit the portion of the bitstream at the power level.

Abstract: An antenna structure includes a metal mechanism element, a ground element, a feeding radiation element, a coupling element, a dielectric substrate, and a switchable circuit. The metal mechanism element has a slot. The feeding radiation element extends across the slot. A coupling gap is formed between the feeding radiation element and the coupling element. The feeding radiation element and the coupling element are disposed on the dielectric substrate. The switchable circuit includes a first metal element, a second metal element, a reactance element, a capacitor, and a diode. The first metal element is coupled to the coupling element. The reactance element is embedded in the first metal element. The second metal element is coupled through the capacitor to the ground element. The diode is coupled between the first metal element and the second metal element. The diode is turned on or off according to the control voltage difference.

Abstract: A 3D memory device includes a multi-layers stacking structure having a plurality of conductive layers and insulating layers stacked in a staggered manner, at least one trench passing through the conductive layers and a plurality of recess regions extending into the conductive layers from the trench; a dielectric blocking strip lining sidewalls of the trench and the recess regions; a plurality of floating gates disposed in the recess regions and isolated from the conductive layers by the dielectric blocking strip; a dielectric strip overlies sidewalls of the floating gates exposed from the recess regions; a semiconductor strip disposed in the trench, insulated from the floating gates by the dielectric strip, and includes a first doping region, a second doping region and a channel region disposed between and connects to the first doping region and the second doping region, and overlapping with the floating gates.

Abstract: Disclosed are embodiments to improve security of authentication credentials. In some aspects, a client device, upon which authentication credentials may be entered cooperates with a server device, which may provide authentication services, to obscure delays between characters of the authentication credentials. This reduces the ability of a nefarious actor to surreptitiously obtain the delays, which may compromise security of a computer account when these delays are used as a signature of a user login process.

Abstract: An antenna structure includes a metal mechanism element, a ground element, a feeding radiation element, a coupling element, a dielectric substrate, and a switchable circuit. The metal mechanism element has a slot. The feeding radiation element extends across the slot. A coupling gap is formed between the feeding radiation element and the coupling element. The feeding radiation element and the coupling element are disposed on the dielectric substrate. The switchable circuit includes a first metal element, a second metal element, a reactance element, a capacitor, and a diode. The first metal element is coupled to the coupling element. The reactance element is embedded in the first metal element. The second metal element is coupled through the capacitor to the ground element. The diode is coupled between the first metal element and the second metal element. The diode is turned on or off according to the control voltage difference.

Abstract: Methods and systems for authenticating an account based on a password are disclosed. In one aspect, a method includes providing a configuration defining a delay criterion for a delay between at least two characters of a password for an account, providing a user interface configured to set the delay criterion for the account based on input received in the user interface setting a user-configurable value for the delay. If the user-configurable value for the delay is received, the delay criterion for the account is set according to the received user-configurable value. If the user-configurable value for the delay is not received, the delay criterion for the account is set to a system-assigned value for the delay. A notification is also provided conveying the system-assigned value for the delay. An authentication request for the account is received, and the delay criterion is enforced when authenticating the account.

Abstract: Methods and systems for authenticating a user account based on a password are disclosed. In one aspect, a method includes receiving input defining a sequence of characters included in an entered password, ignoring characters between a first position in the sequence of characters and a second position in the sequence of characters, and validating the password based on non-ignored characters in the sequence of characters.

Abstract: The present invention provides a cell penetrating peptide dimer by oxidative modification, in which each monomer is connected with each other by the disulfide linkage. The drugability of the peptide dimer has been improved through enhancing stability, reducing proteolysis, retaining permeability and increasing heparan sulfate binding specificity. The modified peptide products can be used to deliver drug molecules as a suitable drug carrier for targeted therapy.

Abstract: An office screen includes a screen frame and an LED lighting/gardening device. The frame includes a table board and multiple screen boards connected together and supporting the table board. The LED lighting/gardening device includes a container for growing a plant, means for installing the container on top of the screen boards, and an LED lighting source arranged above the container and containing multiple LEDs affixed to a support. The LEDs are located at a predetermined distance from a top of the plant, and located at a height from the table board, such that the LED lighting source provides the plant with an illumination level not greater than a photosynthesis light saturation point of the plant, and provides an illumination for the table board, wherein the predetermined distance between the LEDs and the top of the plant is less one quarter of the height between the LEDs and the table board.

Abstract: An eye tracking method includes: constructing, by a processing circuit, an eye model; analyzing, by the processing circuit, a first head center position, according to a plurality of first pupil shape information and the eye model, wherein the plurality of first pupil shape information correspond to a plurality of first gazing vectors; capturing, by a camera circuit, a first image of the eye; analyzing, by the processing circuit, a determined gazing vector, according to the eye model and the first image; and adjusting, by the processing circuit, the first head center position according to an actual pupil shape information group and a plurality of simulated pupil shape information groups.

Abstract: A memory device includes a plurality of memory cells arranged in series in a semiconductor body. First and second dummy memory cells arranged in series between a first string select switch and a first edge memory cell at a first end of the plurality of memory cells. The first dummy memory cell is adjacent the first edge memory cell, and the second dummy memory cell is adjacent the first string select switch. A channel line includes channels for the plurality of memory cells and the first and second dummy memory cells. Control circuitry is adapted for programming a selected memory cell in the plurality of memory cells corresponding to a selected word line by applying a switching voltage to the first dummy memory cell, the switching voltage having a first voltage level during a first time interval, and thereafter changing to a second voltage level higher than the first voltage level.

Abstract: A memory device includes a plurality of memory cells arranged in series in a semiconductor body. First and second dummy memory cells arranged in series between a first string select switch and a first edge memory cell at a first end of the plurality of memory cells. The first dummy memory cell is adjacent the first edge memory cell, and the second dummy memory cell is adjacent the first string select switch. A channel line includes channels for the plurality of memory cells and the first and second dummy memory cells. Control circuitry is adapted for programming a selected memory cell in the plurality of memory cells corresponding to a selected word line by applying a switching voltage to the first dummy memory cell, the switching voltage having a first voltage level during a first time interval, and thereafter changing to a second voltage level higher than the first voltage level.

Abstract: A 3D memory device includes a substrate, a ridge-shaped stack, a memory layer, a channel layer and a capping layer. The ridge-shaped stack includes a plurality of conductive strips extending along a first direction and stacked on the substrate. The memory layer is stacked on a vertical sidewall of the ridge-shaped stack along a second direction that forms a non-straight with the first direction. The channel layer is stacked on the memory layer along the second direction and has a narrow sidewall having a long side extending along the first direction. The capping layer is stacked on the narrow sidewall along a third direction that forms a non-straight angle with the second direction.

Abstract: A 3D memory device includes a substrate, a ridge-shaped stack, a memory layer, a channel layer and a capping layer. The ridge-shaped stack includes a plurality of conductive strips extending along a first direction and stacked on the substrate. The memory layer is stacked on a vertical sidewall of the ridge-shaped stack along a second direction that forms a non-straight with the first direction. The channel layer is stacked on the memory layer along the second direction and has a narrow sidewall having a long side extending along the first direction. The capping layer is stacked on the narrow sidewall along a third direction that forms a non-straight angle with the second direction.