Patents by Inventor WEI HOU

WEI HOU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128232
    Abstract: A semiconductor package includes a first semiconductor die, an encapsulant, a high-modulus dielectric layer and a redistribution structure. The first semiconductor die includes a conductive post in a protective layer. The encapsulant encapsulates the first semiconductor die, wherein the encapsulant is made of a first material. The high-modulus dielectric layer extends on the encapsulant and the protective layer, wherein the high-modulus dielectric layer is made of a second material. The redistribution structure extends on the high-modulus dielectric layer, wherein the redistribution structure includes a redistribution dielectric layer, and the redistribution dielectric layer is made of a third material. The protective layer is made of a fourth material, and a ratio of a Young's modulus of the second material to a Young's modulus of the fourth material is at least 1.5.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Ding Wang, Yen-Fu Su, Hao-Cheng Hou, Jung-Wei Cheng, Chien-Hsun Lee, Hsin-Yu Pan
  • Patent number: 11961479
    Abstract: A display device and a method for driving the display device are described, where the display device includes a plurality of pixel island groups, a plurality of lenses, a positioning module, and a gate driving chip. The plurality of pixel island groups are arranged in array, wherein each of the pixel island groups includes a plurality of pixel islands, and different pixel islands are able to be scanned in different scanning modes. The positioning module is configured to determine a gaze area and a non-gaze area according to gazed coordinates of human eye. The gate driving chip is configured to provide gate driving signals in a first driving manner to sub-pixel units in the gaze area, and provide gate driving signals simultaneously in a second driving manner to sub-pixel units in the non-gaze area during a scanning stage of the sub-pixel units in the non-gaze area.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: April 16, 2024
    Assignees: Beijing BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tiankuo Shi, Wei Sun, Yifan Hou, Zhihua Ji, Xiaomang Zhang, Rui Liu, Jigang Sun, Yuxin Bi, Xue Dong
  • Patent number: 11962174
    Abstract: This application discloses a protection circuit associated with a battery management system (BMS). The protection circuit includes a first protection module and a freewheeling module. The first protection module is connected in parallel to a first switch module of the BMS, and the freewheeling module is connected in parallel to a load module of the BMS. The first protection module switches to a charging state when the first switch module is turned off to stabilize a voltage between a first terminal of the first switch module and a second terminal of the first switch module. The freewheeling module is turned on when the first switch module is turned off to stabilize a voltage between the first switch module and the second switch module. The protection circuit mitigates risks of breakdown of the first switch module, and prevents a parasitic inductance from limiting a switching frequency of the first switch module.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: April 16, 2024
    Assignee: CONTEMPORARY AMPEREX TECHNOLOGY CO., LIMITED
    Inventors: Wei Zhang, Zhimin Dan, Jinbo Cai, Yizhen Hou, Meilin Chen
  • Publication number: 20240105091
    Abstract: The present disclosure provides a gate driving circuit, a method of driving a gate driving circuit, and a display panel. The gate driving circuit includes a plurality of driving units connected in cascade. Each driving unit includes: N shift register units; and a mode control circuit connected to the N shift register units, wherein the mode control circuit is configured to receive a control signal for the driving unit, and connect the N shift register units in one of a plurality of resolution modes under the control of the control signal.
    Type: Application
    Filed: October 20, 2023
    Publication date: March 28, 2024
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Weixing Liu, Wei Qin, Kuanjun Peng, Tieshi Wang, Chunfang Zhang, Hui Zhang, Changfeng Li, Shunhang Zhang, Kai Hou, Hongrun Wang, Liwei Liu, Yunsik Im, Wanpeng Teng, Xiaolong Li, Kai Guo, Zhiqiang Xu
  • Publication number: 20240104346
    Abstract: A method is provided for quantizing a neural network model performed by a processing system. The method comprises determining a scaling factor based on a distribution of weights associated with the neural network model, determining quantized weights based on the scaling factor and the weights associated with the distribution, determining a training loss of the neural network model based on the quantized weights during training of the neural network model, and determining an updated scaling factor for the neural network model based on a gradient of the training loss.
    Type: Application
    Filed: September 15, 2022
    Publication date: March 28, 2024
    Inventors: Lu HOU, Chaofan TAO, Wei ZHANG, Lifeng SHANG, Xin JIANG, Qun LIU, Li QIAN
  • Patent number: 11941318
    Abstract: The present application provides an audio and video playing system, a playing method and a playing device. The system comprises: a display device; a directional sound output module configured to output a directional sound signal; a tracking element configured to monitor a target visual area and to monitor the target display area on the display screen; and a processor, connected with the directional sound output module and the tracking element respectively, and configured to acquire a first audio and video data to be output in the target display area, display image information of the first audio and video data in the target display area, and output sound information of the first audio and video data to the directional sound output module such that the directional sound output module output a directional sound signal towards the target visual area.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: March 26, 2024
    Assignees: Beijing BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xiaomang Zhang, Xiangjun Peng, Tiankuo Shi, Chenxi Zhao, Shuo Zhang, Yifan Hou, Yan Sun, Li Tian, Jing Liu, Wei Sun, Zhihua Ji, Yanhui Xi
  • Patent number: 11940269
    Abstract: A system for determining a location of a feature of an object, the system including a first marker including a first area and a surface having two parallel edges and a third edge disposed perpendicularly to the two parallel edges, the two parallel edges are disposed about a first central axis of the two parallel edges; and a sensor configured to provide a distance from the sensor to a portion of the first marker, wherein the sensor is adapted to obtain distances between the sensor and the first marker and an environment surrounding the first marker to form a first map representing the distances corresponding to locations from which the distances are obtained using the sensor and the location of the feature of the object is determined based on at least one corner corresponding to an intersection formed of the third edge and one of the two parallel edges.
    Type: Grant
    Filed: September 29, 2023
    Date of Patent: March 26, 2024
    Assignee: MLOptic Corp.
    Inventors: Bailing Hou, Wei Zhou, Jiang He, Yuanqin Wang
  • Publication number: 20240087955
    Abstract: A method and apparatus for forming tungsten features in semiconductor devices is provided. The method includes exposing a top opening of a feature formed in a substrate to a physical vapor deposition (PVD) process to deposit a tungsten liner layer within the feature. The PVD process is performed in a first processing region of a first processing chamber and the tungsten liner layer forms an overhang portion, which partially obstructs the top opening of the feature. The substrate is transferred from the first processing region of the first processing chamber to a second processing region of a second processing chamber without breaking vacuum. The overhang portion is exposed to nitrogen-containing radicals in the second processing region to inhibit subsequent growth of tungsten along the overhang portion. The feature is exposed to a tungsten-containing precursor gas to form a tungsten fill layer over the tungsten liner layer within the feature.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 14, 2024
    Inventors: Yi XU, Xianyuan ZHAO, Zhimin QI, Aixi ZHANG, Geraldine VASQUEZ, Dien-Yeh WU, Wei LEI, Xingyao GAO, Shirish PETHE, Wenting HOU, Chao DU, Tsung-Han YANG, Kyoung-Ho BU, Chen-Han LIN, Jallepally RAVI, Yu LEI, Rongjun WANG, Xianmin TANG
  • Publication number: 20240079051
    Abstract: Disclosed is a memory cell including a first transistor having a first terminal coupled to a bit line; a second transistor having a first terminal coupled to a bit line bar; a weight storage circuit coupled between a gate terminal of the first transistor and a gate terminal of the second transistor, storing a weight value, and determining to turn on the first transistor or the second transistor according to the weight value; and a driving circuit coupled to a second terminal of the first transistor, a second terminal of the second transistor, and at least one word line, receiving at least one threshold voltage and at least one input data from the word line, and determining whether to generate an operation current on a path of the turned-on first transistor or the turned-on second transistor according to the threshold voltage and the input data.
    Type: Application
    Filed: November 8, 2022
    Publication date: March 7, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Chih-Sheng Lin, Tuo-Hung Hou, Fu-Cheng Tsai, Jian-Wei Su, Kuo-Hua Tseng
  • Patent number: 11922848
    Abstract: Provided is a method for compensating a displayed picture in a display screen. The display screen includes a plurality of regions, each of the plurality of regions including a plurality of pixels; the method includes: determining transformation matrices corresponding to pixels in the plurality of regions based on texture complexities of pictures to be displayed in the plurality of regions; acquiring compensated grayscales by compensating grayscales of pixel points in the pictures to be displayed in the plurality of regions based on the transformation matrices corresponding to the pixels in the plurality of regions.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: March 5, 2024
    Assignees: Beijing BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Tiankuo Shi, Yifan Hou, Xiangjun Peng, Chenxi Zhao, Xiaomang Zhang, Minglei Chu, Xin Duan, Wei Sun, Ming Chen, Lingyun Shi
  • Publication number: 20240071939
    Abstract: A semiconductor structure includes a composite redistribution structure, a first interconnect device and an integrated circuit (IC) package component. The composite redistribution structure includes a first redistribution structure, a second redistribution structure and a third redistribution structure. The second redistribution structure is located between the first redistribution structure and the third redistribution structure. The first interconnect device is embedded in the second redistribution structure. The first interconnect device includes a plurality of metal connectors leveled with a surface of the second redistribution structure and electrically connected to the third redistribution structure. The IC package component is disposed over the third redistribution structure and electrically connected to the first interconnect device via the third redistribution structure.
    Type: Application
    Filed: August 28, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Wei Cheng, Tsung-Ding Wang, Yu-Min Liang, Hao-Cheng Hou
  • Publication number: 20240071999
    Abstract: A first polymer layer is formed across a package region and a test region. A first metal pattern is formed in the package region and a first test pattern is simultaneously formed in the test region. The first metal pattern has an upper portion located on the first polymer layer and a lower portion penetrating through the first polymer layer, and the first test pattern is located on the first polymer layer and has a first opening exposing the first polymer layer. A second polymer layer is formed on the first metal pattern in the package region and a second test pattern is simultaneously formed on the first test pattern in the test region. The second polymer layer has a second opening exposing the upper portion of the first metal pattern, and the second test pattern has a third opening greater than the first opening of the first test pattern.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tseng Hsing Lin, Chien-Hsun Lee, Tsung-Ding Wang, Jung-Wei Cheng, Hao-Cheng Hou, Sheng-Chi Lin, Jeng-An Wang, Yao-Cheng Wu
  • Patent number: 11915979
    Abstract: A method includes depositing a high-k gate dielectric layer over and along sidewalls of a semiconductor fin. The method further includes depositing an n-type work function metal layer over the high-k gate dielectric layer and performing a passivation treatment on the high-k gate dielectric layer through the n-type work function metal layer. The passivation treatment comprises a remote plasma process. The method further includes depositing a fill metal over the n-type work function metal layer to form a metal gate stack over the high-k gate dielectric layer. The metal gate stack comprising the n-type work function metal layer and the fill metal.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pei Ying Lai, Chia-Wei Hsu, Cheng-Hao Hou, Xiong-Fei Yu, Chi On Chui
  • Publication number: 20240026737
    Abstract: A shutter controller configured to control an operating rod of a shutter includes a controller housing, a clamping mechanism, and a driving mechanism. The controller housing includes a first housing and a second housing connected to each other, and the second housing is provided with a receiving cavity. The clamping mechanism is configured to clamp the operating rod and rotatably provided in the receiving cavity. The driving mechanism is provided in the first housing and is in transmission connection with the clamping mechanism, and the driving mechanism is configured to drive the clamping mechanism to rotate, thereby driving the operating rod to rotate.
    Type: Application
    Filed: July 24, 2023
    Publication date: January 25, 2024
    Inventors: Wei HOU, Buliao WEI, Kai HUANG, Hua YANG, Yang PAN, Jiangang LI
  • Publication number: 20230372375
    Abstract: Provided are an SGLT-2 inhibitor-sarcosine cocrystal, a preparation method therefor and use thereof. Using sarcosine as a ligand, said cocrystal has higher safety and lower costs; a drug cocrystal has higher stability, and during the production process or storage process of a formulation composition, the crystal form is not easily changed; said cocrystal does not melt when heated, does not stick, aggregate or generate static electricity, and has better mixing uniformity. Said cocrystal has uniform distribution in a prepared pharmaceutical composition, causing that the pharmaceutical composition has better in-vivo release, absorption and efficacy, and has small difference between batches; and the pharmaceutical composition has high stability, and is more conducive to storage and transportation.
    Type: Application
    Filed: September 30, 2020
    Publication date: November 23, 2023
    Inventors: Huijuan JIA, Wei HOU, Yanxin WANG, Yan LI, Xiaohui REN, Tiange JIA
  • Publication number: 20230358664
    Abstract: A method of monitoring one or more cell aggregates, comprising providing a flow path in which the one or more cell aggregates are in a medium and the flow path being configured to pass through a collective sensing zone of a set of electrodes, obtaining impedance-related signals corresponding to each of the medium and one of the one or more cell aggregates in the medium, determining one or more electrical signatures for a cell aggregate, in which the one or more electrical signatures are based on impedance-related signals obtained from the set of electrodes. The method is one of dynamic testing at single-particle resolution. The electrical signatures may be an opacity and/or electrical size of the one or more cell aggregates, or electrical impedance spectroscopy-based electrical signatures. The cell aggregate is a spheroid, an encapsulated microcarrier, or a cell-adhered microcarrier. It is also to provide a microfluidic chip comprising a channel and electrodes for obtaining impedance- related signals.
    Type: Application
    Filed: August 23, 2021
    Publication date: November 9, 2023
    Inventors: Han Wei HOU, Lingyan GONG, Chayakorn PETCHAKUP
  • Patent number: 11794184
    Abstract: The present disclosure provides a device for patterning extracellular matrix (ECM) hydrogel comprising a first layer surface patterned to define a microchannel, a second layer comprising a loading channel in fluid communication with loading ports to receive an ECM hydrogel, wherein the first layer is attached over the second layer such that the patterned surface faces the loading channel to define an open chamber with regions of reduced cross-sectional area, and wherein the ECM hydrogel is confined to fill said regions, thereby forming a perfusable channel in the open chamber. The present disclosure also provides the same device wherein the second layer is a substrate without a loading channel and is optically pervious; and additionally provides a method of patterning ECM hydrogel comprising use of the aforementioned device. Importantly, ECM patterning is achieved by surface tension between the ECM hydrogel and the first layer at the boundaries of the microchannel.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: October 24, 2023
    Assignee: NANYANG TECHNOLOGICAL UNIVERSITY
    Inventors: Han Wei Hou, Nishanth Venugopal Menon, Soon Nan Wee, King Ho Holden Li
  • Patent number: 11547013
    Abstract: A server chassis includes a housing and two support portions. A bottom plate of the housing includes a loading surface and a three-dimensional reinforcing pattern integrally formed on the loading surface for reinforcing the structural strength of the bottom plate. The support portions are respectively located on an outer surface of the sidewall of the housing. A coverage area of the three-dimensional reinforcing pattern is greater than 10% of the total area of the loading surface. The three-dimensional reinforcing pattern includes a plurality of texture patterns regularly reproduced on the loading surface toward a linear axial direction. The three-dimensional reinforcing pattern also includes a plurality of first arc portions and a plurality of second arc portions arranged in a staggered alignment.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: January 3, 2023
    Assignee: CHENBRO MICOM CO., LTD.
    Inventors: Kuang-Yun Shen, Cheng-Feng Yang, Chih-Wei Hou
  • Publication number: 20220395831
    Abstract: A method herein to isolate exosomes includes providing a microfluidic device having a spiral-shaped channel in fluid communication with two inlet ports and at least two outlet ports. One of the two inlet ports is proximal to an inner wall of the spiral-shaped channel and the other is proximal to an outer wall thereof. At least one of the outlet ports is in fluid communication with a container for storing isolated exosomes. A blood sample and sheath fluid are introduced into the inlet ports proximal to the outer and inner walls, respectively, to form a diluted sample in the spiral-shaped channel and driven through for exosomes recovery in the container. The spiral-shaped channel in fluid communication with a first outlet port includes a first outlet channel connecting the spiral-shaped channel to the first outlet port and is longer than other outlet channels respectively connecting the spiral-shaped channel to the other outlet ports. A method of identifying diabetes mellitus is also disclosed herein.
    Type: Application
    Filed: October 21, 2020
    Publication date: December 15, 2022
    Inventors: Han Wei HOU, Hui Min TAY, Sheng Yuan LEONG
  • Patent number: 11453934
    Abstract: The present invention relates to high-strength high-toughness low-temperature thick-plate structural steel and a heat treatment method thereof. The steel is composed of the following components by weight percentage: C: 0.03-0.08%, Cr: 0.8-1.9%, Mn: 0.01-1.0%, Ni: 3.5-7%, Mo: 0.2-0.5%, V: 0.15-0.2%, Nb: 0.01-0.05%, Cu: 1.2-3.8%, Al: 0-0.5%, P: <0.015%, S: <0.010%, and Fe and inevitable impurities as balance. Compared with the prior art, a steel plate prepared in the present invention can be used at low temperature of ?20 to ?120° C. and ?196° C., maintains relatively high strength and certain toughness, and mainly resolves a technical problem that existing high-strength high-toughness quenched and tempered steel cannot meet equipment requirements in polar resource and energy development; transportation, etc.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: September 27, 2022
    Inventors: Qingdong Liu, Wei Hou, Jianfeng Gu