Patents by Inventor Wei Hsu

Wei Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162833
    Abstract: A power supply unit supplies power to a load, and the power supply unit includes a power factor corrector, a DC conversion module, and an isolated conversion module. The power factor corrector is plugged into a first main circuit board and converts an AC power into a DC power. The DC conversion module is plugged into the first main circuit board and converts the DC power into a main power. The isolated conversion module includes a bus capacitor, the bus capacitor is coupled to the DC conversion module through a first power copper bar, and coupled to the power factor corrector through a second power copper bar. The first power copper bar and the second power copper bar are arranged on a side opposite to the first main circuit board, and are arranged in parallel with the first main circuit board.
    Type: Application
    Filed: November 13, 2023
    Publication date: May 16, 2024
    Inventors: Yi-Sheng CHANG, Cheng-Chan HSU, Chia-Wei CHU, Chun-Yu YANG, Deng-Cyun HUANG, Yi-Hsun CHIU, Chien-An LAI, Yu-Tai WANG, Chi-Shou HO, Zhi-Yuan WU, Ko-Wen LU
  • Patent number: 11982866
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: May 14, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
  • Patent number: 11983680
    Abstract: An intelligent monitoring system for waste disposal and the method thereof are provided, which include a plurality of operational devices and stages. First, a transportation stage is performed to loading a transport vehicle with a waste so as to transport the waste to a disposal station for further treatment. A camera and a sensor for detecting abnormal conditions are installed any one of the operational devices or installed in the operational path of any one of the operational devices. The camera records the videos of the operational stages, captures the images from the videos and recognizes the images in order to determine whether the abnormal conditions occur in any one of the operational stages. Alternatively, the camera is triggered to capture the images and recognize the images after the abnormal conditions are detected by the sensor in order to determine whether the abnormal conditions actually occur.
    Type: Grant
    Filed: June 12, 2021
    Date of Patent: May 14, 2024
    Assignee: CHASE SUSTAINABILITY TECHNOLOGY CO., LTD.
    Inventors: Yung-Fa Yang, Tsung-Tien Chen, Shao-Hsin Hsu, Bo-Wei Chen, Chia-Ching Chen, Ming-Hua Tang
  • Patent number: 11985314
    Abstract: Video processing methods and apparatuses in a video encoding or decoding system for processing out-of-bounds nodes in a current picture. An out-of-bounds node is a coding tree node with a block region across a current picture boundary. The video processing method or apparatus determines an inferred splitting type, applies the inferred splitting type to split the out-of-bounds node into child blocks, adaptively splits each child block into one or multiple leaf blocks, and encodes or decodes the leaf blocks in the out-of-bounds node inside the current picture. The inferred splitting type for partitioning out-of-bounds nodes in an inter slice, picture, or tile is the same as the inferred splitting type for partitioning out-of-bounds nodes in an intra slice, picture, or tile.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: May 14, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Chia-Ming Tsai, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang, Shih-Ta Hsiang
  • Patent number: 11985324
    Abstract: Exemplary video processing methods and apparatuses for encoding or decoding a current block by inter prediction are disclosed. Input data of a current block is received and partitioned into sub-partitions and motion refinement is independently performed on each sub-partition. A reference block for each sub-partition is obtained from one or more reference pictures according to an initial motion vector (MV). A refined MV for each sub-partition is derived by searching around the initial MV with N-pixel refinement. One or more boundary pixels of the reference block for a sub-partition is padded for motion compensation of the sub-partition. A final predictor for the current block is generated by performing motion compensation for each sub-partition according to its refined MV. The current block is then encoded or decoded according to the final predictor.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: May 14, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Yu-Cheng Lin, Chun-Chia Chen, Chih-Wei Hsu, Ching-Yeh Chen, Tzu-Der Chuang, Yu-Wen Huang
  • Publication number: 20240153823
    Abstract: A method includes depositing a high-k gate dielectric layer over and along sidewalls of a semiconductor fin. The method further includes depositing an n-type work function metal layer over the high-k gate dielectric layer and performing a passivation treatment on the high-k gate dielectric layer through the n-type work function metal layer. The passivation treatment comprises a remote plasma process. The method further includes depositing a fill metal over the n-type work function metal layer to form a metal gate stack over the high-k gate dielectric layer. The metal gate stack comprising the n-type work function metal layer and the fill metal.
    Type: Application
    Filed: January 18, 2024
    Publication date: May 9, 2024
    Inventors: Pei Ying Lai, Chia-Wei Hsu, Cheng-Hao Hou, Xiong-Fei Yu, Chi On Chui
  • Publication number: 20240152800
    Abstract: An electronic device and a method for determining scenario data of a self-driving car are provided. The method includes: obtaining training scenario data by using scenario data, a loss function and a self-driving program module; training an encoding module and a decoding module by using the training scenario data, and generating a scenario space by using the trained encoding module; obtaining a monitoring module by using the scenario space; and executing the monitoring module to determine whether current scenario data belongs to an operational design domain by using the current scenario data and the trained encoding module.
    Type: Application
    Filed: December 23, 2022
    Publication date: May 9, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Hsiu-Wei Hsu, Chen-Hui Hu
  • Publication number: 20240153890
    Abstract: The semiconductor package substrate module including a substrate, a plurality of first wires, at least one second wire, a chip, and an encapsulating body, wherein the first wires electrically connect to a first electrical contact point of the substrate and a second electrical contact point of the chip. Besides, one end of the at least one second wire connects to the at least one grounding transfer area or a first ground contact point of the substrate, and another end of the second wire extends toward a cutting area. The encapsulating body encapsulates the substrate, the first and second wires, and the chip. The semiconductor package substrate module is cut and separated along the cutting area of the substrate to form a plurality of semiconductor packaging components. A side surface of the encapsulating body exposes the first wires or at least one second wire of each semiconductor packaging component.
    Type: Application
    Filed: March 30, 2023
    Publication date: May 9, 2024
    Inventors: Chia Fong CHOU, Ta Wei CHOU, Hui-Lung HSU
  • Publication number: 20240148129
    Abstract: A mobile device attachment adapted for a mobile device and a container for food or liquid is provided. The mobile device attachment includes a magnetic connecting member and a connecting member. The magnetic connecting member is selectively magnetically connected to the mobile device and adapted to extend in an escaping direction. The connecting member is disposed between the container and the magnetic connecting member. The mobile device has an image capturing range. When the magnetic connecting member extends in the escaping direction, the container, the magnetic connecting member and the connecting member are located outside the image capturing range. Besides, a container including the mobile device attachment is also provided.
    Type: Application
    Filed: November 1, 2023
    Publication date: May 9, 2024
    Inventors: CHING-FU WANG, CHING-YU WANG, CHE-WEI HSU, JUI-CHEN LU, CHENG-CHE HO
  • Patent number: 11979613
    Abstract: Encoding methods and apparatuses include receiving input video data of a current block in a current picture and applying a Cross-Component Adaptive Loop Filter (CCALF) processing on the current block based on cross-component filter coefficients to refine chroma components of the current block according to luma sample values. The method further includes signaling two Adaptive Loop Filter (ALF) signal flags and two CCALF signal flags in an Adaptation Parameter Set (APS) with an APS parameter type equal to ALF or parsing two ALF signal flags and two CCALF signal flags from an APS with an APS parameter type equal to ALF, signaling or parsing one or more Picture Header (PH) CCALF syntax elements or Slice Header (SH) CCALF syntax elements, wherein both ALF and CCALF signaling are present either in a PH or SH, and encoding or decoding the current block in the current picture.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: May 7, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Ching-Yeh Chen, Olena Chubach, Chen-Yen Lai, Tzu-Der Chuang, Chih-Wei Hsu, Yu-Wen Huang
  • Patent number: 11978833
    Abstract: The present invention provides a white light LED package structure and a white light source system, which includes a substrate, an LED chip, and a wavelength conversion material layer. The peak emission wavelength of the LED chip is between 400 nm and 425 nm; the peak emission wavelength of the wavelength conversion material layer is between 440 nm and 700 nm, and the wavelength conversion material layer absorbs light emitted from the LED chip and emits a white light source; and the emission spectrum of the white light source is set as P(?), the emission spectrum of a blackbody radiation having the same color temperature as the white light source is S(?), P(?max) is the maximum light intensity within 380-780 nm, S(?max) is the maximum light intensity of the blackbody radiation within 380-780 nm, D(?) is a difference between the spectrum of the white light LED and the spectrum of the blackbody radiation, and within 510-610 nm, the white light source satisfies: D(?)=P(?)/P(?max)?S(?)/S(?max), ?0.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: May 7, 2024
    Assignee: QUANZHOU SANAN SEMICONDUCTOR TECHNOLOGY CO., LTD.
    Inventors: Senpeng Huang, Junpeng Shi, Weng-Tack Wong, Shunyi Chen, Zhenduan Lin, Chih-wei Chao, Chen-ke Hsu
  • Patent number: 11978664
    Abstract: A method includes forming a first conductive feature over a semiconductor substrate, forming an ILD layer over the first conductive feature, patterning the ILD layer to form a trench, and forming a conductive layer over the patterned ILD layer to fill the trench. The method further includes polishing the conductive layer to form a via contact configured to interconnect the first conductive feature with a second conductive feature, where polishing the conductive layer exposes a top surface of the ILD layer, polishing the exposed top surface of the ILD layer, such that a top portion of the via contact protrudes from the exposed top surface of the ILD layer, and forming the second conductive feature over the via contact, such that the top portion of the via contact extends into the second conductive feature.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pang-Sheng Chang, Chao-Hsun Wang, Kuo-Yi Chao, Fu-Kai Yang, Mei-Yun Wang, Li-Chieh Wu, Chun-Wei Hsu
  • Patent number: 11977423
    Abstract: Methods and systems for thermal management of hardware resources that may be used to provide computer implemented services are disclosed. The disclosed thermal management method and systems may improve the likelihood of data processing systems providing desired computer implemented services by improving the thermal management of the hardware resources without impairment of storage devices. To improve the likelihood of the computer implemented services being provided, the systems may proactively identify whether storage devices subject to impairment due to dynamic motion are present. If such storage devices are present, then the system may automatically take action to reduce the likelihood of the storage devices being subject to dynamic motion sufficient to impair their operation.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: May 7, 2024
    Assignee: Dell Products L.P.
    Inventors: Hung-Pin Chien, Jyh-Yinn Lin, Yu-Wei Chi Liao, Chien Yen Hsu, Ming-Hui Pan
  • Patent number: 11979593
    Abstract: Method and apparatus for affine CPMV or ALF refinement are mentioned. According to this method, statistical data associated with the affine CPMV or ALF refinement are collected over a picture area. Updated parameters for the affine CPMV refinement or the ALF refinement are then derived based on the statistical data, where a process to derive the updated parameters includes performing multiplication using a reduced-precision multiplier for the statistical data. The reduced-precision multiplier truncates at least one bit of the mantissa part. In another embodiment, the process to derive the updated parameters includes performing reciprocal for the statistical data using a lookup table with (m?k)-bit input by truncating k bits from the m-bit mantissa part, and contents of the lookup table includes m-bit outputs. m and k are positive integers.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: May 7, 2024
    Assignee: MEDIATEK INC.
    Inventors: Shih-Chun Chiu, Tzu-Der Chuang, Ching-Yeh Chen, Chun-Chia Chen, Chih-Wei Hsu, Yu-Wen Huang
  • Patent number: 11978802
    Abstract: Provided are FinFET devices and methods of forming the same. A dummy gate having gate spacers on opposing sidewalls thereof is formed over a substrate. A dielectric layer is formed around the dummy gate. An upper portion of the dummy gate is removed and upper portions of the gate spacers are removed, so as to form a first opening in the dielectric layer. A lower portion of the dummy gate is removed to form a second opening below the first opening. A metal layer is formed in the first and second openings. The metal layer is partially removed to form a metal gate.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Wei Hsu, Chih-Hao Wang, Huan-Chieh Su, Wei-Hao Wu, Zhi-Chang Lin, Jia-Ni Yu
  • Publication number: 20240145470
    Abstract: A method for processing an integrated circuit includes forming first and second gate all around transistors. The method forms a dipole oxide in the first gate all around transistor without forming the dipole oxide in the second gate all around transistor. This is accomplished by entirely removing an interfacial dielectric layer and a dipole-inducing layer from semiconductor nanosheets of the second gate all around transistor before redepositing the interfacial dielectric layer on the semiconductor nanosheets of the second gate all around transistor.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: Lung-Kun CHU, Mao-Lin HUANG, Chung-Wei HSU, Jia-Ni YU, Kuo-Cheng CHIANG, Kuan-Lun CHENG, Chih-Hao WANG
  • Publication number: 20240145911
    Abstract: An antenna correcting system is provided. The antenna correction system compares amplitudes of antenna signals that are emitted or received respectively by a plurality of antenna units with each other to select one of the amplitudes as target amplitude. The antenna correction system corrects the amplitude of each of the antenna signals according to the target amplitude. As a result, the amplitudes of the antenna signals are the same as each other or approximate to each other. After the amplitudes of the antenna signals are corrected, the antenna correction system compares phases of the antenna signals with each other to select one of the phases as a target phase. The antenna correction system corrects the phase of each of the antenna signals according to the target phase. As a result, the phases of the antenna signals are the same as each other or approximate to each other.
    Type: Application
    Filed: November 17, 2022
    Publication date: May 2, 2024
    Inventors: YUNG-TAI HSU, CHUN-HENG CHAO, YEN-WEI WANG, BO-YU ZHU
  • Publication number: 20240145319
    Abstract: A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.
    Type: Application
    Filed: January 2, 2024
    Publication date: May 2, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tsung-Yu LIN, Pei-Yu WANG, Chung-Wei HSU
  • Publication number: 20240138709
    Abstract: A care system monitoring method for sensing the movement state of a bedridden person is provided. The care system monitoring method includes the following stages. Initial-state information is sensed. A first warning signal is issued to remind the caregiver to perform a movement action on the bedridden person when the time that the bedridden person has been in the initial state exceeds the threshold period. First-state information (which is information that is collected when the bedridden person is in the first state) is sensed after completing the movement action. It is determined whether the bedridden person was moved correctly according to the initial-state information and the first-state information. The first-state information is reset as the initial-state information if it is determined that the bedridden person has been moved correctly. A second warning signal is issued if it is determined that the bedridden person has been moved incorrectly.
    Type: Application
    Filed: September 7, 2023
    Publication date: May 2, 2024
    Inventors: Cheng-Hsu CHOU, Wei-Chih LIU, Fang-Iy WU
  • Publication number: 20240145155
    Abstract: Provided is a core structure of an inductor element. The manufacturing method thereof is to embed a magnetic conductor including at least one magnetic conductive layer in a core body and to from a plurality of apertures for passing coils around the magnetic conductor in the core body. Accordingly, the magnetic conductor is designed in the core body by using the integrated circuit carrier board manufacturing process, such that the overall size and thickness of the inductor element can be greatly reduced, thereby facilitating product miniaturization using the inductor element.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 2, 2024
    Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Pao-Hung CHOU, Che-Wei HSU, Shih-Ping HSU