Patents by Inventor Wei-Jen Liu

Wei-Jen Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030072155
    Abstract: A rope light mainly includes a #-sectioned elongate core enclosed in an outer tube, and a plurality of bulb strings parallelly set in two adjacent channels defined on the elongate core. The elongate core includes two or three spaced conductors pre-embedded therein when the core is formed, and the two selected channels are provided at bottom surfaces with a plurality of radially extended and staggered implant holes for receiving alternate bulbs and holding terminals connecting adjacent bulbs in the bulb strings, enabling the rope light to give intensified illuminance. The #-sectioned core has good structural strength and the radially positioned bulbs and holding terminals provide supporting forces to protect the rope light from easily damaged bulbs or short circuit. The holding terminals may be reflective members or covered with reflective sleeves to reflect light beams emitted by the bulbs and thereby increase the illuminance of the rope light.
    Type: Application
    Filed: October 11, 2001
    Publication date: April 17, 2003
    Inventor: Wei-Jen Liu
  • Patent number: 6165272
    Abstract: A closed-loop controlled apparatus and method for preventing contamination to a low pressure chemical vapor deposition chamber (LPCVD) are provided. The apparatus includes an exhaust vent equipped with a butterfly valve for controlling a flow rate through the vent. The exhaust vent is connected to a vacuum outlet and a vacuum pump on a process chamber in parallel with and bypassing a gate valve such that the exhaust vent can be opened for the continuous pumping of the process chamber during wafer loading and unloading steps. The exhaust vent may be constructed by two end conduits that have a larger diameter which are connected by a middle conduit that has a smaller diameter such that during vacuum evacuation, the fluid flow rate in the small diameter conduit is at least four times that in the large conduit to effectively prevent the deposition and blockage of the small conduit by reaction by-products or contaminating particles.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: December 26, 2000
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd
    Inventor: Wei-Jen Liu
  • Patent number: 6106626
    Abstract: An apparatus and a method for preventing contamination to a low pressure chemical vapor deposition chamber (LPCVD) are provided. The apparatus includes an exhaust-vent device which is connected to a vent outlet and a vacuum pump on a process chamber in parallel with and bypassing a gate valve such that the exhaust-vent remains open during a continuous pumping of the process chamber for wafer loading and unloading. The exhaust-vent device is constructed by two end conduits that have a larger diameter connected by a middle conduit that has a smaller diameter such that during vacuum evacuation, the fluid flow rate in the smaller diameter conduit is at least four times that in the large conduit to effectively prevent the deposition in the small conduit of reaction by-products. The present invention apparatus may further be enhanced by mounting heating tapes on the vacuum conduits and heating the conduits to a temperature of between about 100.degree. C. and about 180.degree. C.
    Type: Grant
    Filed: December 3, 1998
    Date of Patent: August 22, 2000
    Assignee: Taiwan Semincondutor Manufacturing Company, Ltd
    Inventors: Kun-lin Guan, Wei-jen Liu, Jin-lang Wu
  • Patent number: 6077733
    Abstract: A new method is provided to manufacture a T-shaped gate. A layer of insulation is deposited over a semiconductor surface (typically the surface of a substrate), a dual damascene structure containing a via opening and a conducting line trench is created in the layer of insulation. A layer of sacrificial oxide is grown and subsequently removed (preventing initial surface defects and providing protection during subsequent steps of etching). A layer of gate oxide is selectively grown on the bottom of the dual damascene opening. A layer of poly is deposited over the layer of insulation thereby including the dual damascene opening, the poly is planarized down to essentially the top of the dual damascene structure and the insulation is removed from above the surface of the substrate in the regions surrounding the dual damascene structure leaving the dual damascene structure in place.
    Type: Grant
    Filed: September 3, 1999
    Date of Patent: June 20, 2000
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yen-Ming Chen, Wei-Jen Liu, Shih-Chi Lin, Kuo-Chou Liu