Abstract: A pellicle for an extreme ultraviolet (EUV) photomask includes a pellicle frame and a main membrane attached to the pellicle frame. The main membrane includes a plurality of nanotubes, and each of the plurality of nanotubes is covered by a coating layer containing Si and one or more metal elements.

Abstract: The present disclosure, in some embodiments, relates an integrated chip. The integrated chip includes a substrate. A through-substrate-via (TSV) extends through the substrate. A dielectric liner separates the TSV from the substrate. The dielectric liner is along one or more sidewalls of the substrate. The TSV includes a horizontally extending surface and a protrusion extending outward from the horizontally extending surface. The TSV has a maximum width along the horizontally extending surface.

Abstract: A ferroelectric memory device and a semiconductor die are provided. The ferroelectric memory device includes a gate electrode; a channel layer, overlapped with the gate electrode; source/drain contacts, in contact with separate ends of the channel layer; a ferroelectric layer, lying between the gate electrode and the channel layer; and a first insertion layer, extending in between the ferroelectric layer and the channel layer, and comprising a metal carbonitride or a metal nitride.

Abstract: A clock monitor circuit includes a monitor and a tunable counter. The monitor can monitor a clock under test. The tunable counter can count an integer according to a reference clock and set a target number. If a stable signal relative to the clock under test is toggled, the tunable counter can switch the target number from a large number to a small number. The tunable counter can perform an automatic detection process, so as to transmit a check signal to the monitor. In response to the check signal, if the clock under test is undetectable, the monitor will not transmit any confirmation signal back to the tunable counter, and the tunable counter will gradually increase the integer. When the integer is equal to the target number, the tunable counter generates a failure signal.

Abstract: A clock monitor circuit includes a monitor and a tunable counter. The monitor can monitor a clock under test. The tunable counter can count an integer according to a reference clock and set a target number. If a stable signal relative to the clock under test is toggled, the tunable counter can switch the target number from a large number to a small number. The tunable counter can perform an automatic detection process, so as to transmit a check signal to the monitor. In response to the check signal, if the clock under test is undetectable, the monitor will not transmit any confirmation signal back to the tunable counter, and the tunable counter will gradually increase the integer. When the integer is equal to the target number, the tunable counter generates a failure signal.

Abstract: A delay line circuit with a calibration function, includes N delay modules and a calibration module. The N delay modules are serially coupled to each other. The calibration module generates a calibration start signal and a calibration stop signal according to a calibration signal and a clock signal, and the calibration start signal is outputted to the N delay modules, so that the N delay modules output N delay signals according to N control signals and the calibration start signal. The calibration module calibrates the N control signals according to the N delay signals and the calibration stop signal, so that the N delay modules generate N calibrated delay signals according to the N calibrated control signals and the clock signal. A generation time instant of the calibration stop signal is later than a generation time instant of the calibration start signal.

Abstract: A delay line circuit with a calibration function, includes N delay modules and a calibration module. The N delay modules are serially coupled to each other. The calibration module generates a calibration start signal and a calibration stop signal according to a calibration signal and a clock signal, and the calibration start signal is outputted to the N delay modules, so that the N delay modules output N delay signals according to N control signals and the calibration start signal. The calibration module calibrates the N control signals according to the N delay signals and the calibration stop signal, so that the N delay modules generate N calibrated delay signals according to the N calibrated control signals and the clock signal. A generation time instant of the calibration stop signal is later than a generation time instant of the calibration start signal.

Abstract: A method for managing an electronic phone book is used in a communication device which includes a universal subscriber identity module (USIM), a system for executing the method, a storage device, and a processor. The USIM includes elementary files. The system and the method identify information updated by users for saving the electronic phone book, a contact name, a contact phone number, and a contact email address according to link information of each elementary file. The system and the method update the contact information of USIM according to the information updated by the users. The contact information of USIM can be quickly updated by utilizing the method and the system.

Abstract: A method for managing an electronic phone book is used in a communication device which includes a universal subscriber identity module (USIM), a system for executing the method, a storage device, and a processor. The USIM includes elementary files. The system and the method identify information updated by users for saving the electronic phone book, a contact name, a contact phone number, and a contact email address according to link information of each elementary file. The system and the method update the contact information of USIM according to the information updated by the users. The contact information of USIM can be quickly updated by utilizing the method and the system.

Abstract: A dielectric layer is provided. The dielectric layer includes a photo-sensitive polymer or a non-photo-sensitive polymer and an amorphous metal oxide disposed in the photo-sensitive polymer or a non-photo-sensitive polymer.

Abstract: Electronic devices with hybrid high-k dielectric and fabrication methods thereof. The electronic device includes a substrate. A first electrode is disposed on the substrate. Hybrid high-k multi-layers comprising a first dielectric layer and a second dielectric layer are disposed on the substrate, wherein the first dielectric layer and the second dielectric layer are solvable and substantially without interface therebetween. A second electrode is formed on the hybrid multi-layers.

Abstract: A composition for forming a dielectric layer includes a liquid organometallic compound serving as a precursor with high dielectric constant, a photo-sensitive polymer or a non-photo-sensitive polymer and a solvent, wherein the liquid organometallic compound includes metal alkoxide, and the metal of the metal alkoxide includes Al Ti, Zr, Ta, Si, Ba, Ge and Hf. The dielectric layer formed by the composition includes the photo-sensitive polymer or the non-photo-sensitive polymer and an amorphous metal oxide formed therein.

Abstract: Substrate structures and fabrication methods thereof. A substrate structure includes a bendable substrate and an inorganic electrode structure on the bendable structure, wherein the inorganic electrode structure includes a conductive layer or a semiconductor layer. The inorganic electrode structure includes carbon nanotubes, carbon nanofibers, a nanolinear material, or a micro-linear material. The bendable substrate includes polyethylene (PE), polyimide (PI), polyvinyl alcohol (PVA), or polymethyl methacrylate (PMMA).

Abstract: Substrate structures and fabrication methods thereof. A substrate structure includes a bendable substrate and an inorganic electrode structure on the bendable structure, wherein the inorganic electrode structure includes a conductive layer or a semiconductor layer. The inorganic electrode structure includes carbon nanotubes, carbon nanofibers, a nanolinear material, or a micro-linear material. The bendable substrate includes polyethylene (PE), polyimide (PI), polyvinyl alcohol (PVA), or polymethyl methacrylate (PMMA).

Abstract: Electronic devices with hybrid high-k dielectric and fabrication methods thereof. The electronic device includes a substrate. A first electrode is disposed on the substrate. Hybrid high-k multi-layers comprising a first dielectric layer and a second dielectric layer are disposed on the substrate, wherein the first dielectric layer and the second dielectric layer are solvable and substantially without interface therebetween. A second electrode is formed on the hybrid multi-layers.

Abstract: An organic thin-film transistor and a method for manufacturing the same are described. The method forms a gate layer on a substrate, an insulator layer on the substrate, forming a semiconductor layer on the insulator layer, and a strip for defining a channel length on the semiconductor layer. An electrode layer is screen printed on the semiconductor layer, and a passivation layer is coated on the electrode layer. The organic thin-film transistor manufactured by the method of the invention has a substrate, a gate layer formed on the substrate, an insulator layer formed on the substrate, a semiconductor layer formed on the insulator layer, a strip for defining a channel length formed on the semiconductor layer, an electrode layer screen-printed on the semiconductor layer, and a passivation layer coated on the electrode layer. Thereby, an organic thin-film transistor with a top-contact/bottom-gate structure is obtained.

Abstract: Electronic devices with hybrid high-k dielectric and fabrication methods thereof. The electronic device includes a substrate. A first electrode is disposed on the substrate. Hybrid high-k multi-layers comprising a first dielectric layer and a second dielectric layer are disposed on the substrate, wherein the first dielectric layer and the second dielectric layer are solvable and substantially without interface therebetween. A second electrode is formed on the hybrid multi-layers.

Abstract: Substrate structures and fabrication methods thereof. A substrate structure includes a bendable substrate and an inorganic electrode structure on the bendable structure, wherein the inorganic electrode structure includes a conductive layer or a semiconductor layer. The inorganic electrode structure includes carbon nanotubes, carbon nanofibers, a nanolinear material, or a micro-linear material. The bendable substrate includes polyethylene (PE), polyimide (PI), polyvinyl alcohol (PVA), or polymethyl methacrylate (PMMA).

Abstract: An organic thin-film transistor and a method for manufacturing the same are described. The method forms a gate layer on a substrate, an insulator layer on the substrate, forming a semiconductor layer on the insulator layer, and a strip for defining a channel length on the semiconductor layer. An electrode layer is screen printed on the semiconductor layer, and a passivation layer is coated on the electrode layer. The organic thin-film transistor manufactured by the method of the invention has a substrate, a gate layer formed on the substrate, an insulator layer formed on the substrate, a semiconductor layer formed on the insulator layer, a strip for defining a channel length formed on the semiconductor layer, an electrode layer screen-printed on the semiconductor layer, and a passivation layer coated on the electrode layer. Thereby, an organic thin-film transistor with a top-contact/bottom-gate structure is obtained.

Abstract: Substrate structures for display devices and fabrication methods thereof The substrate structure comprises a substrate, an interfacial layer disposed on the substrate, and a patterned paste layer applied on the interfacial layer, wherein a contact angle of the interface between the patterned paste layer and the interfacial layer exceeds 35 degrees.