Patents by Inventor Wei-Chun Huang

Wei-Chun Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240178120
    Abstract: An integrated fan-out package includes a first redistribution structure, a die, conductive structures, an encapsulant, and a second redistribution structure. The first redistribution structure has first regions and a second region surrounding the first regions. A metal density in the first regions is smaller than a metal density in the second region. The die is disposed over the first redistribution structure. The conductive structures are disposed on the first redistribution structure to surround the die. Vertical projections of the conductive structures onto the first redistribution structure fall within the first regions of the first redistribution structure. The encapsulant encapsulates the die and the conductive structures. The second redistribution structure is disposed on the encapsulant, the die, and the conductive structures.
    Type: Application
    Filed: February 8, 2023
    Publication date: May 30, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Tzu-Sung Huang, Wei-Kang Hsieh, Hao-Yi Tsai, Ming-Hung Tseng, Tsung-Hsien Chiang, Yen-Liang Lin, Chu-Chun Chueh
  • Publication number: 20240163947
    Abstract: A method for multi-link operation (MLO) is provided. The method for MLO may be applied to an apparatus. The method for MLO may include the following steps. A multi-chip controller of the apparatus may assign different data to a plurality of chips of the apparatus, wherein each chip corresponds to one link of multi-links. Each chip may determine whether transmission of the assigned data has failed. A first chip of the chips may transmit the assigned data to an access point (AP) in response to the first chip determining that the transmission of the assigned data has not failed.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 16, 2024
    Inventors: Cheng-Ying WU, Wei-Wen LIN, Shu-Min CHENG, Hui-Ping TSENG, Chi-Han HUANG, Chih-Chun KUO, Yang-Hung PENG, Hao-Hua KANG
  • Publication number: 20240153895
    Abstract: Semiconductor dies of a semiconductor die package are directly bonded, and a top metal region may be formed over the semiconductor dies. A plurality of conductive terminals may be formed over the top metal region. The conductive terminals are formed of copper (Cu) or another material that enables low-temperature deposition process techniques, such as electroplating, to be used to form the conductive terminal. In this way, the conductive terminals of the semiconductor die packages described herein may be formed at a relatively low temperature. This reduces the likelihood of thermal deformation of semiconductor dies in the semiconductor die packages. The reduced thermal deformation reduces the likelihood of warpage, breakage, and/or other types of damage to the semiconductor dies of the semiconductor die packages, which may increase performance and/or increase yield of semiconductor die packages.
    Type: Application
    Filed: April 19, 2023
    Publication date: May 9, 2024
    Inventors: Harry-HakLay CHUANG, Wei-Cheng WU, Chung-Jen HUANG, Yung Chun TU, Chien Lin LIU, Shun-Kuan LIN, Ping-tzu CHEN
  • Publication number: 20240146661
    Abstract: Various solutions for extended reality (XR) enhancement in mobile communications are described. An apparatus establishes a communication with a network node of a wireless network. The apparatus performs an operation with respect to XR-related computation offloading from a user end to result in XR enhancement at the user end.
    Type: Application
    Filed: March 7, 2022
    Publication date: May 2, 2024
    Inventors: Abdellatif SALAH, Chien-Chun HUANG-FU, Chi-Hsuan HSIEH, Wei-De WU
  • Publication number: 20240136117
    Abstract: A multi-phase coupled inductor includes a first iron core, a second iron core, and a plurality of coil windings. The first iron core includes a first body and a plurality of first core posts. The plurality of first core posts are connected to the first body. The second iron core is opposite to the first iron core. The second iron core and the first body are spaced apart from each other by a gap. The plurality of coil windings wrap around the plurality of first core posts, respectively. Each of the coil windings has at least two coils.
    Type: Application
    Filed: October 1, 2023
    Publication date: April 25, 2024
    Inventors: HUNG-CHIH LIANG, PIN-YU CHEN, HANG-CHUN LU, YA-WEN YANG, YU-TING HSU, WEI-ZHI HUANG
  • Publication number: 20240128216
    Abstract: A bonding structure that may be used to form 3D-IC devices is formed using first oblong bonding pads on a first substrate and second oblong bonding pads one a second substrate. The first and second oblong bonding pads are laid crosswise, and the bond is formed. Viewed in a first cross-section, the first bonding pad is wider than the second bonding pad. Viewed in a second cross-section at a right angle to the first, the second bonding pad is wider than the first bonding pad. Making the bonding pads oblong and angling them relative to one another reduces variations in bonding area due to shifts in alignment between the first substrate and the second substrate. The oblong shape in a suitable orientation may also be used to reduce capacitive coupling between one of the bonding pads and nearby wires.
    Type: Application
    Filed: January 4, 2023
    Publication date: April 18, 2024
    Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Ching-Chun Wang, Hsiao-Hui Tseng, Chen-Jong Wang, Dun-Nian Yaung
  • Patent number: 11955338
    Abstract: A method includes providing a substrate having a surface such that a first hard mask layer is formed over the surface and a second hard mask layer is formed over the first hard mask layer, forming a first pattern in the second hard mask layer, where the first pattern includes a first mandrel oriented lengthwise in a first direction and a second mandrel oriented lengthwise in a second direction different from the first direction, and where the first mandrel has a top surface, a first sidewall, and a second sidewall opposite to the first sidewall, and depositing a material towards the first mandrel and the second mandrel such that a layer of the material is formed on the top surface and the first sidewall but not the second sidewall of the first mandrel.
    Type: Grant
    Filed: January 30, 2023
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Chun Huang, Ya-Wen Yeh, Chien-Wen Lai, Wei-Liang Lin, Ya Hui Chang, Yung-Sung Yen, Ru-Gun Liu, Chin-Hsiang Lin, Yu-Tien Shen
  • Patent number: 11935981
    Abstract: A photo-detecting device includes a first semiconductor layer with a first dopant, a light-absorbing layer, a second semiconductor layer, and a semiconductor contact layer. The second semiconductor layer is located on the first semiconductor layer and has a first region and a second region, the light absorbing layer is located between the first semiconductor layer and the second semiconductor layer and has a third region and a fourth region, the semiconductor contact layer contacts the first region. The first region includes a second dopant and a third dopant, the second region includes second dopant, and the third region includes third dopant. The semiconductor contact layer has a first thickness greater than 50 ? and smaller than 1000 ?.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: March 19, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chu-Jih Su, Chia-Hsiang Chou, Wei-Chih Peng, Wen-Luh Liao, Chao-Shun Huang, Hsuan-Le Lin, Shih-Chang Lee, Mei Chun Liu, Chen Ou
  • Publication number: 20240079434
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor including first chip and a second chip. The first chip includes a first substrate, a plurality of photodetectors disposed in the first substrate, a first interconnect structure disposed on a front side of the first substrate, and a first bond structure disposed on the first interconnect structure. The second chip underlies the first chip. The second chip includes a second substrate, a plurality of semiconductor devices disposed on the second substrate, a second interconnect structure disposed on a front side of the second substrate, and a second bond structure disposed on the second interconnect structure. A first bonding interface is disposed between the second bond structure and the first bond structure. The second interconnect structure is electrically coupled to the first interconnect structure by way of the first and second bond structures.
    Type: Application
    Filed: January 5, 2023
    Publication date: March 7, 2024
    Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Chen-Jong Wang, Dun-Nian Yaung, Yu-Chun Chen
  • Patent number: 11514851
    Abstract: A display device includes a first luminescent device, a second luminescent device, a multi-color strobe decoder, a pseudo signal circuit and a single-color driving circuit. The multi-color strobe decoder is configured to generate two gate control signals. The second luminescent device and the pseudo signal circuit are coupled to the multi-color strobe decoder. The single-color driving circuit is coupled to the first luminescent device and the multi-color strobe decoder. When the single-color driving circuit provides first current for driving the first luminescent device according to the first gate control signal and/or a brightness enhancing signal, the pseudo signal circuit is configured to couple a first bias voltage to the multi-color strobe decoder according to the first gate control signal. When the second gate control signal drives the second luminescent device, the second luminescent device is configure to couple a second bias voltage to the multi-color strobe decoder.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: November 29, 2022
    Assignee: Qisda Corporation
    Inventors: Chi-Jen Chen, Wei-Chun Huang, Sung-Po Yeh
  • Patent number: 11493486
    Abstract: A liquid chromatography reagent kit includes a mobile phase anti-adsorption concentrate. The mobile phase anti-adsorption concentrate includes a first solvent, a buffer, an acid-base regulating reagent, and an anti-adsorption reagent. A ratio of a molarity of the buffer to a molarity of the acid-base regulating reagent is 400:1 to 1:1. A ratio of the molarity of the buffer to a molarity of the anti-adsorption reagent is 100:1 to 1:2.
    Type: Grant
    Filed: January 6, 2021
    Date of Patent: November 8, 2022
    Assignee: MSonline Scientific Co., Ltd.
    Inventors: Chien-Pang Huang, Wei-Chun Huang
  • Publication number: 20210273067
    Abstract: A semiconductor device includes a contact opening extending through a source region and a body region of the device. An electrically insulative spacer lines sidewalls of the semiconductor substrate formed by the contact opening, and is recessed along the sidewalls such that at least part of the source region or body region is uncovered by the electrically insulative spacer. A body contact plug is in the contact opening. A first body contact region formed adjacent a bottom of the contact opening adjoins the body contact plug at the bottom of the contact opening. A second body contact region formed in the part of the source region or body region uncovered by the electrically insulative spacer adjoins the body contact plug along the part of the source region or body region uncovered by the electrically insulative spacer.
    Type: Application
    Filed: May 17, 2021
    Publication date: September 2, 2021
    Inventors: Wei-Chun Huang, Martin Poelzl, Thomas Feil, Maximilian Roesch
  • Publication number: 20210215647
    Abstract: A liquid chromatography reagent kit includes a mobile phase anti-adsorption concentrate. The mobile phase anti-adsorption concentrate includes a first solvent, a buffer, an acid-base regulating reagent, and an anti-adsorption reagent. A ratio of a molarity of the buffer to a molarity of the acid-base regulating reagent is 400:1 to 1:1. A ratio of the molarity of the buffer to a molarity of the anti-adsorption reagent is 100:1 to 1:2.
    Type: Application
    Filed: January 6, 2021
    Publication date: July 15, 2021
    Applicant: MSonline Scientific Co.,Ltd.
    Inventors: Chien-Pang Huang, Wei-Chun Huang
  • Patent number: 11031478
    Abstract: A semiconductor device includes a trench extending into a first main surface of a semiconductor substrate, and a gate electrode and a gate dielectric in the trench. The gate dielectric separates the gate electrode from the semiconductor substrate. A first region having a first conductivity type is formed in the semiconductor substrate at the first surface adjacent the trench. A second region having a second conductivity type is formed in the semiconductor substrate below the first region adjacent the trench. A third region having the first conductivity type is formed in the semiconductor substrate below the second region adjacent the trench. A contact opening in the semiconductor substrate extends into the second region. An electrically insulative spacer is disposed on sidewalls of the semiconductor substrate formed by the contact opening, and an electrically conductive material in the contact opening adjoins the electrically insulative spacer on the sidewalls.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: June 8, 2021
    Assignee: Infineon Technologies Austria AG
    Inventors: Wei-Chun Huang, Martin Poelzl, Thomas Feil, Maximilian Roesch
  • Publication number: 20190229198
    Abstract: A semiconductor device includes a trench extending into a first main surface of a semiconductor substrate, and a gate electrode and a gate dielectric in the trench. The gate dielectric separates the gate electrode from the semiconductor substrate. A first region having a first conductivity type is formed in the semiconductor substrate at the first surface adjacent the trench. A second region having a second conductivity type is formed in the semiconductor substrate below the first region adjacent the trench. A third region having the first conductivity type is formed in the semiconductor substrate below the second region adjacent the trench. A contact opening in the semiconductor substrate extends into the second region. An electrically insulative spacer is disposed on sidewalls of the semiconductor substrate formed by the contact opening, and an electrically conductive material in the contact opening adjoins the electrically insulative spacer on the sidewalls.
    Type: Application
    Filed: January 23, 2018
    Publication date: July 25, 2019
    Inventors: Wei-Chun Huang, Martin Poelzl, Thomas Feil, Maximilian Roesch
  • Publication number: 20180299833
    Abstract: The present disclosure provides a monitoring method, an electronic device and a non-transient computer readable recording medium. The monitoring method includes the following steps: obtaining an instant sensing signal via an acceleration sensor; converting the instant sensing signal into at least one sensing parameter; and when the at least one sensing parameter satisfies one of the parameter determining rules, determining that the electronic device is in the current state defined correspondingly by the satisfied one of the parameter determining rules.
    Type: Application
    Filed: November 28, 2017
    Publication date: October 18, 2018
    Inventors: Yun-Tse HSIAO, Ding-Chia KAO, Ling-Ying LEE, Po-Hung HUANG, Wei-Chung HUNG, Huai-Hao SYU, Yu-Siang LING, Shih-Hai LIN, Shih-Yu LIU, Wei-Chun HUANG
  • Patent number: 10069326
    Abstract: A golf system with a wireless charging function includes a golf bag, an in-bag wireless rechargeable battery apparatus, an in-bag charging apparatus and an out-of-bag wireless charging apparatus. The in-bag charging apparatus includes an in-bag charging control circuit and an in-bag wireless charging module. The out-of-bag wireless charging apparatus converts an original voltage into an out-of-bag wireless charging signal. The out-of-bag wireless charging apparatus utilizes the out-of-bag wireless charging signal to wirelessly charge the in-bag wireless rechargeable battery apparatus. The in-bag wireless rechargeable battery apparatus sends a battery voltage to the in-bag charging control circuit. The in-bag charging control circuit sends the battery voltage to the in-bag wireless charging module. The in-bag wireless charging module converts the battery voltage into an in-bag wireless charging signal.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: September 4, 2018
    Assignee: JOGTEK CORP.
    Inventors: Wei-Chun Huang, Tsung-Hsing Hsieh
  • Publication number: 20180013308
    Abstract: A golf system with a wireless charging function includes a golf bag, an in-bag wireless rechargeable battery apparatus, an in-bag charging apparatus and an out-of-bag wireless charging apparatus. The in-bag charging apparatus includes an in-bag charging control circuit and an in-bag wireless charging module. The out-of-bag wireless charging apparatus converts an original voltage into an out-of-bag wireless charging signal. The out-of-bag wireless charging apparatus utilizes the out-of-bag wireless charging signal to wirelessly charge the in-bag wireless rechargeable battery apparatus. The in-bag wireless rechargeable battery apparatus sends a battery voltage to the in-bag charging control circuit. The in-bag charging control circuit sends the battery voltage to the in-bag wireless charging module. The in-bag wireless charging module converts the battery voltage into an in-bag wireless charging signal.
    Type: Application
    Filed: July 7, 2016
    Publication date: January 11, 2018
    Inventors: Wei-Chun HUANG, Tsung-Hsing HSIEH
  • Publication number: 20170308149
    Abstract: A data recording apparatus with a power saving function includes a micro control unit, a switch unit, a timing unit, a battery, a boosting integrated circuit, a sensing unit and a dynamic tag. The switch unit is electrically connected to the micro control unit. The timing unit is electrically connected to the switch unit. The battery is electrically connected to the timing unit. The boosting integrated circuit is electrically connected to the micro control unit and the switch unit. The sensing unit is electrically connected to the boosting integrated circuit. The dynamic tag is electrically connected to the micro control unit. The timing unit turns on the switch unit once a predetermined time, so that the battery provides a battery power through the timing unit to drive the micro control unit and the boosting integrated circuit.
    Type: Application
    Filed: April 20, 2016
    Publication date: October 26, 2017
    Inventors: Wei-Chun HUANG, Tsung-Hsing HSIEH
  • Publication number: 20170027468
    Abstract: An electrocardiogram detector including a pad, an electrical connection unit, a plurality of retaining members, and a plurality of electrode pieces is disclosed. The pad has a first face, a second face, and a plurality of through-holes. The electrical connection unit has an electrical connection port and a plurality of conducting lines electrically connected to the electrical connection port. The plurality of conducting lines is arranged on the first face of the pad. The plurality of retaining members is fixed to the first face of the pad and electrically connected to the plurality of conducting lines. The plurality of electrode pieces is electrically connected to the plurality of retaining members. The plurality of electrode pieces is fixed by the plurality of retaining members. In this arrangement, convenient operation of the electrocardiogram detector is improved.
    Type: Application
    Filed: July 29, 2016
    Publication date: February 2, 2017
    Inventors: Wei-Chun Huang, Cheng-Chung Hung, Hsin-Ju Huang, Chien-Ju Huang, Tzu-Wen Lin, Jin-Shiou Yang, Shue-Ren Wann, Guang-Yuan Mar, Chun-Peng Liu