Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.

Abstract: A battery protection charging method and a charging system thereof are provided. The battery protection charging method includes obtaining an operation parameter of a battery. When a first protection condition is satisfied, a charging voltage of the battery is reduced to a first voltage. When a second protection condition is satisfied, the charging voltage of the battery is reduced to a second voltage. The second voltage is lower than the first voltage. The first (second) protection condition includes the cycle-life count is higher than a first (second) cycle-life threshold, the high voltage cumulative time is higher than a first (second) high voltage time threshold, and the high voltage-temperature cumulative time is higher than a first (second) high voltage-temperature time threshold.

Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for switching a secondary cell to a primary cell. A user equipment (UE) monitors a first radio condition of the UE for beams of a primary cell and a second radio condition for beams of one or more secondary cells configured for the UE in carrier aggregation. The UE transmits a request to configure a candidate beam of at least one candidate secondary cell as a new primary cell in response to the first radio condition not satisfying a first threshold and the second radio condition for the at least one candidate secondary cell satisfying a second threshold. A base station determines to reconfigure at least one secondary cell as the new primary cell. The base station and the UE perform a handover of the UE to the new primary cell.

Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a redistribution layer (RDL) over a semiconductor die. A portion of the RDL contacts a die pad of the semiconductor die. A metal layer is formed on a top surface and sidewalls of the RDL and configured to encase the RDL. A non-conductive layer is formed over the metal layer and underlying RDL. An opening in the non-conductive layer is formed exposing a portion of the metal layer formed on the RDL. An under-bump metallization (UBM) is formed in the opening and conductively connected to the die pad by way of the metal layer and RDL.

Abstract: A device includes a device layer comprising a first transistor; a first interconnect structure on a front-side of the device layer; and a second interconnect structure on a backside of the device layer. The second interconnect structure includes a first dielectric layer on the backside of the device layer; a contact extending through the first dielectric layer to a source/drain region of the first transistor; a conductive line electrically connected to the source/drain region of the first transistor through the contact; and a thermal dissipation path thermally connected to the device layer, the thermal dissipation path extending to a surface of the second interconnect structure opposite the device layer. The thermal dissipation path comprises a dummy via.

Abstract: A semiconductor package assembly is provided. The semiconductor package assembly includes first semiconductor die, a second semiconductor die and a memory package. The first semiconductor die and the second semiconductor die are stacked on each other. The first semiconductor die includes a first interface and a third interface. The first interface overlaps and is electrically connected to the second interface arranged on the second semiconductor die. The third interface is arranged on a first edge of the first semiconductor die. The memory package is disposed beside the first semiconductor die, wherein the memory package is electrically connected to the first semiconductor die by the third interface.

Abstract: A photo-detecting device includes a first semiconductor layer with a first dopant, a light-absorbing layer, a second semiconductor layer, and a semiconductor contact layer. The second semiconductor layer is located on the first semiconductor layer and has a first region and a second region, the light absorbing layer is located between the first semiconductor layer and the second semiconductor layer and has a third region and a fourth region, the semiconductor contact layer contacts the first region. The first region includes a second dopant and a third dopant, the second region includes second dopant, and the third region includes third dopant. The semiconductor contact layer has a first thickness greater than 50 ? and smaller than 1000 ?.

Abstract: A method for forming a packaged integrated circuit device includes providing a semiconductor wafer having a plurality of integrated circuit devices, each integrated circuit device extending into the semiconductor wafer to a first depth, and grinding a backside of the silicon wafer to no more than the first depth. The method further includes forming a backside cut between the integrated circuit devices. The backside cut extends to within the first depth, but the backside cut does not extend completely through the semiconductor wafer. The backside cut exposes a plurality of edges of each of the integrated circuit devices. The method further includes depositing, on the backside of the wafer, a metallization layer on a bottom surface of the integrated circuit devices and on the edges.

Abstract: A semiconductor structure includes a first dielectric layer over a first conductive line and a second conductive line, a high resistance layer over a portion of the first dielectric layer, a second dielectric layer on the high resistance layer, a low-k dielectric layer over the second dielectric layer, a first conductive via extending through the low-k dielectric layer and the second dielectric layer, and a second conductive via extending through the low-k dielectric layer and the first dielectric layer to the first conductive line. The first conductive via extends into the high resistance layer.

Abstract: The present disclosure discloses an image processing apparatus having lens color-shading correction mechanism. A first and a second calibration circuits perform lens color-shading correction on an input image according to a first and a second calibration parameters to generate a first and a second calibrated images. A first and a second statistic circuits perform statistic on the first and the second calibrated images to generate a first and a second statistic results.

Abstract: The present invention provides a method for fabricating an InGaP epitaxial layer by metal organic chemical vapor deposition (MOCVD). The method comprises: placing a silicon substrate in a reaction chamber; arranging the reaction chamber to have a first chamber temperature, and growing a first GaP layer with a first thickness on the Si substrate at the first chamber temperature; arranging the reaction chamber to have a second chamber temperature, and growing a second GaP layer with a second thickness on the first GaP layer at the second chamber temperature; arranging the reaction chamber to have a third chamber temperature for a first time interval, and then arranging the reaction chamber to have a fourth chamber temperature for a second time interval; and growing a multi-layered InGaP layer on the second GaP layer.

Abstract: The present invention provides a method for fabricating an InGaP epitaxial layer by metal organic chemical vapor deposition (MOCVD). The method comprises: placing a silicon substrate in a reaction chamber; arranging the reaction chamber to have a first chamber temperature, and growing a first GaP layer with a first thickness on the Si substrate at the first chamber temperature; arranging the reaction chamber to have a second chamber temperature, and growing a second GaP layer with a second thickness on the first GaP layer at the second chamber temperature; arranging the reaction chamber to have a third chamber temperature for a first time interval, and then arranging the reaction chamber to have a fourth chamber temperature for a second time interval; and growing a multi-layered InGaP layer on the second GaP layer.

Abstract: The invention proposes a simple method suitable for automatically locking frequency during USB data communication. Based on the soft plug/unplug concept proposed in the contents and the error handling mechanism defined in the USB specification, we can calibrate the clock frequency of the digitally controlled oscillator (DCO), through the token packets, to be within the acceptable frequency when USB device is attached to the host controller.

Abstract: A frequency-locking device including a digitally-controlled oscillator (DCO) and a comparing unit is disclosed. The DCO is used for generating an output frequency signal. The comparing unit receives a Keep Alive signal from a universal serial bus (USB) and the output frequency signal, and compares the Keep Alive signal with the output frequency signal to generate a calibration signal. Then, the DCO adjusts the frequency of the output frequency signal according to the calibration signal to meet the USB specification for data communication.

Abstract: A microcontroller having dual-core architecture is provided. Using a unique hardware configuration of memories, control registers and reset machines, the invention not only reduces hardware cost, but also improves management efficiency and system stability.

Abstract: The invention proposes a simple method suitable for automatically locking frequency during USB data communication. Based on the soft plug/unplug concept proposed in the contents and the error handling mechanism defined in the USB specification, we can calibrate the clock frequency of the digitally controlled oscillator (DCO), through the token packets, to be within the acceptable frequency when USB device is attached to the host controller.

Abstract: A frequency-locking device including a digitally-controlled oscillator (DCO) and a comparing unit is disclosed. The DCO is used for generating an output frequency signal. The comparing unit receives a Keep Alive signal from a universal serial bus (USB) and the output frequency signal, and compares the Keep Alive signal with the output frequency signal to generate a calibration signal. Then, the DCO adjusts the frequency of the output frequency signal according to the calibration signal to meet the USB specification for data communication.

Abstract: An absorbent sac wound dressing comprising a wound-contacting layer covered with tapered pores and the bottom surface of tapered pores contacting a wound area wherein discharged exudate penetrates through, a guiding layer transmitting discharged exudate to an absorbent layer, an absorbent layer absorbing discharged exudate to make fibers expand into the shape of gel, which is effective in preventing from backflow of exudate to a wound area, and a translucent breathing layer having a broad spread of micro pores. The placement of the above layer is one on top of another in order and the peripheral edges are joined together by heat-sealing to form a sac without side escape. More particularly, the certain concentration of water-soluble antimicrobial medicines, enzymes or growth factor agents in a suitable amount are well distributed added in the absorbent layer, which is more effective in controlling a wound infection.

Abstract: Antenna diodes used to correct antenna rule violations during the design and formation of integrated circuits are defined within filler cells laid out on the IC chip following the layout of standard electronic module cells and routing of electrical conductors on the chip. The filler cells are disposed in gaps between standard cells containing the electronic modules. The diodes are formed in unconnected pairs that are selectively connected to each other and to an adjacent conductor in order to correct antenna rule violations. Low current leakage is achieved as a result of the use of a fewer number of diode circuits, and the fact that they remain unconnected until used to correct an antenna rule violation.

Abstract: Antenna diodes used to correct antenna rule violations during the design and formation of integrated circuits are defined within filler cells laid out on the IC chip following the layout of standard electronic module cells and routing of electrical conductors on the chip. The filler cells are disposed in gaps between standard cells containing the electronic modules. The diodes are formed in unconnected pairs that are selectively connected to each other and to an adjacent conductor in order to correct antenna rule violations. Low current leakage is achieved as a result of the use of a fewer number of diode circuits, and the fact that they remain unconnected until used to correct an antenna rule violation.