Patents by Inventor Wen-Kun Yang

Wen-Kun Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7566854
    Abstract: The present invention provides an image sensor module. The image sensor module has a die formed on a substrate, the die having a micro lens area, a lens holder formed on the substrate and over the die, a lens formed in the lens holder. A filter is formed within the lens holder and between the lens and the die, and at least one passive device formed on the substrate and covered within the lens holder. Conductive bumps or LGA (leadless grid array) are formed on the bottom surface of the substrate.
    Type: Grant
    Filed: December 8, 2006
    Date of Patent: July 28, 2009
    Assignee: Advanced Chip Engineering Technology Inc.
    Inventors: Wen-Kun Yang, Jui-Hsien Chang
  • Patent number: 7557437
    Abstract: To pick and place standard dice on a new base for obtaining an appropriate and wider distance between dice than the original distance of dice on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, the die may be packaged with passive components or other dice with a side by side structure or a stacking structure.
    Type: Grant
    Filed: November 28, 2007
    Date of Patent: July 7, 2009
    Assignee: Advanced Chip Engineering Technology Inc.
    Inventors: Wen-Kun Yang, Wen-Pin Yang, Shih-Li Chen
  • Publication number: 20090166873
    Abstract: The interconnecting structure for a semiconductor die includes a die having bonding pads on an active surface; a core attached the side wall (edge) of the die by adhesion material; an isolating base adhered on the active surface of the die by adhesion glue; a through silicon via (TSV) open from the back side of the die to expose the bonding pads; a build up layer coupled between the bonding pads to terminal metal pads by the through silicon via; solder balls melted on terminal pads, wherein the terminal pads located on the core and/or the die.
    Type: Application
    Filed: December 27, 2007
    Publication date: July 2, 2009
    Inventors: Wen-Kun Yang, Jui-Hsien Chang, Chi-Chen Lee, Mon-Chin Tsai
  • Publication number: 20090160052
    Abstract: The under bump metallization (UBM) structure of semiconductor device comprises a substrate having a bonding pad disposed on an active surface; a UBM adhered on the bonding pad, wherein the UBM includes lateral embedded portions and the size of the UBM is larger than the size of the bonding pad; a dielectric layer over the UBM having opening that is smaller than the size of the UBM so as to allow the lateral embedded portions being embedded into the dielectric layer with a desired dimension; and a conductive ball melted on the UBM within the opening defined by the dielectric layer.
    Type: Application
    Filed: December 19, 2007
    Publication date: June 25, 2009
    Inventors: Wen-Kun Yang, Chin-Lung Yang
  • Publication number: 20090127686
    Abstract: The present invention disclosed a first multi-die package structure for semiconductor devices, the structure comprises a substrate having die receiving window and inter-connecting through holes formed therein; a first level semiconductor die formed under a second level semiconductor die by back-to-back scheme and within the die receiving window, wherein the first multi-die package includes first level contact pads formed under the first level semiconductor die having a first level build up layer formed there-under to couple to a first bonding pads of the first level semiconductor die; a second level contact pads formed on the second level semiconductor die having a second level build up layer formed thereon to couple to second bonding pads of the second level semiconductor die; and conductive bumps formed under the first level build up layer.
    Type: Application
    Filed: November 21, 2007
    Publication date: May 21, 2009
    Inventors: Wen-Kun Yang, Chi-Yu Wang, Hsien-Wen Hsu
  • Patent number: 7525139
    Abstract: An image sensor die comprises a substrate and an image sensor array formed over the substrate. Micro lens are disposed on the image sensor array. A protection layer is formed on the micro lens to prevent the micro lens from particle containment.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: April 28, 2009
    Assignee: Advanced Chip Engineering Technology Inc.
    Inventors: Wen-Kun Yang, Chin-Chen Yang, Wen-Ping Yang, Wen-Bin Sun, Chao-nan Chou, His-Ying Yuan, Jui-Hsien Chang
  • Patent number: 7525185
    Abstract: The present invention provides a semiconductor device package having multi-chips with side-by-side configuration comprising a substrate with die receiving through holes, connecting through holes structure and first contact pads on an upper surface and second contact pads on a lower surface of the substrate. A first die having first bonding pads and a second die having second bonding pads are respectively disposed within the die receiving through holes. The first adhesion material is formed under the first and second die and the substrate, and the second adhesion material is filled in the gap between the first and second die and sidewall of the die receiving though holes of the substrate. Further, bonding wires are formed to couple between the first bonding pads and the first contact pads, between the second bonding pads and the first contact pads. A dielectric layer is formed on the bonding wires, the first and second die and the substrate.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: April 28, 2009
    Assignee: Advanced Chip Engineering Technology, Inc.
    Inventors: Wen-Kun Yang, Diann-Fang Lin, Tung-Chuan Wang, Hsien-Wen Hsu, Chih-Ming Chen
  • Publication number: 20090096098
    Abstract: The interconnecting structure for a semiconductor die assembly comprises a build-up layers having RDL formed therein formed over a die having die pads formed thereon, wherein the RDL is coupled to the die pads; an isolation base having ball openings attached over the build-up layer to expose ball pads within the build-up layers; and conductive balls placed into the ball openings of the isolation base and attached on the ball pads within the build-up layers.
    Type: Application
    Filed: October 15, 2007
    Publication date: April 16, 2009
    Inventors: Wen-Kun Yang, Hsien-Wen Hsu
  • Publication number: 20090096093
    Abstract: The interconnecting structure for a semiconductor die assembly comprises a build-up layers having RDL formed therein formed over a die having die pads formed thereon, wherein the RDL is coupled to the die pads; an isolation base having ball openings attached over the build-up layer to expose ball pads within the build-up layers; and conductive balls placed into the ball openings of the isolation base and attached on the ball pads within the build-up layers.
    Type: Application
    Filed: November 14, 2007
    Publication date: April 16, 2009
    Inventors: Wen-Kun Yang, Hsien-Wen Hsu
  • Patent number: 7514767
    Abstract: To pick and place standard dice on a new base for obtaining an appropriate and wider distance between dice than the original distance of dice on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type wafer level package. Moreover, the die may be packaged with passive components or other dice with a side by side structure or a stacking structure.
    Type: Grant
    Filed: July 7, 2006
    Date of Patent: April 7, 2009
    Assignee: Advanced Chip Engineering Technology Inc.
    Inventor: Wen-Kun Yang
  • Patent number: 7501310
    Abstract: An image sensor die comprises a substrate and an image sensor array formed over the substrate. Micro lens are disposed on the image sensor array. A protection layer is formed on the micro lens to prevent the micro lens from particle containment.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: March 10, 2009
    Assignee: Advanced Chip Engineering Technology Inc.
    Inventors: Wen-Kun Yang, Wen-Pin Yang
  • Patent number: 7498556
    Abstract: The present invention provides an image sensor module having build-in package cavity and the Method of the same. An image sensor module structure comprising a substrate with a package receiving cavity formed within an upper surface of the substrate and conductive traces within the substrate, and a package having a die with a micro lens disposed within the package receiving cavity. A dielectric layer is formed on the package and the substrate, a re-distribution conductive layer (RDL) is formed on the dielectric layer, wherein the RDL is coupled to the die and the conductive traces and the dielectric layer has an opening to expose the micro lens. A lens holder is attached on the substrate and the lens holder has a lens attached an upper portion of the lens holder. A filter is attached between the lens and the micro lens. The structure further comprises a passive device on the upper surface of the substrate within the lens holder.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: March 3, 2009
    Assignee: Adavanced Chip Engineering Technology Inc.
    Inventors: Wen-Kun Yang, Diann-Fang Lin, Jui-Hsien Chang, Tung-Chuan Wang
  • Patent number: 7498646
    Abstract: The present invention discloses an image sensor module and forming method of wafer level package. The image sensor module comprises a metal alloy base, a wafer level package, a lens holder, and flexible printed circuits (F.P.C.). The wafer level package having a plurality of image sensor dice and a plurality of solder balls is attached to the metal alloy base. A plurality of lens are placed in the lens holder, and the lens holder is located on the image sensor dice. The lens holder is placed in the flexible printed circuits (F.P.C.), and the flexible printed circuits (F.P.C.) has a plurality of solder joints coupled to the solder balls for conveniently transmitting signal of the image sensor dice. Moreover, the image sensor dice may be packaged with passive components or other dice with a side by side structure or a stacking structure.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: March 3, 2009
    Assignee: Advanced Chip Engineering Technology Inc.
    Inventors: Wen Kun Yang, Wen Pin Yang
  • Publication number: 20090051025
    Abstract: To pick and place standard dies on a new base for obtaining an appropriate and wider distance between dies than the original distance of dies on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, the die may be packaged with passive components or other dies with a side by side structure or a stacking structure.
    Type: Application
    Filed: October 22, 2008
    Publication date: February 26, 2009
    Inventors: Wen-Kun Yang, Wen-Pin Yang, Shih-Li Chen
  • Publication number: 20090039532
    Abstract: The present invention provides a semiconductor device package, comprising a die having a back surface and an active surface formed thereon; an adhesive layer formed on the back surface of the die; a protection substrate formed on the adhesive layer; and a plurality of bumps formed on the active surface of the die for electrically connection. The present invention further provides a method for forming a semiconductor device package, comprising providing a plurality of die having a back surface and an active surface on a wafer; forming an adhesive layer on the back surface of the die; forming a protection substrates on the adhesive layer; forming a plurality of bumps on the active surface of each die; and dicing the plurality of die into individual die for singulation.
    Type: Application
    Filed: August 8, 2007
    Publication date: February 12, 2009
    Inventors: Wen-Kun Yang, Hsien-Wen Hsu
  • Publication number: 20090039497
    Abstract: The present invention provides a semiconductor device package, comprising a die having a back surface and an active surface formed thereon; an adhesive layer formed on the back surface of the die; a protection substrate formed on the adhesive layer; and a plurality of bumps formed on the active surface of the die for electrically connection. The present invention further provides a method for forming a semiconductor device package, comprising providing a plurality of die having a back surface and an active surface on a wafer; forming an adhesive layer on the back surface of the die; forming a protection substrates on the adhesive layer; forming a plurality of bumps on the active surface of each die; and dicing the plurality of die into individual die for singulation.
    Type: Application
    Filed: November 1, 2007
    Publication date: February 12, 2009
    Inventors: Wen-Kun Yang, Hsien-Wen Hsu
  • Patent number: 7476565
    Abstract: A filling paste structure and process of wafer level package is disclosed. The process comprises filling an adhesive material to fill among plurality of dice and cover the plurality of dice. The pluralities of dice are adhered to glue pattern with viscosity in common state formed on a removable substrate. A rigid substrate is coated by adhesive material to adhere the dice. Then, pluralities of dice are departed from the glue pattern by a special environment after attaching the rigid base substrate.
    Type: Grant
    Filed: May 3, 2007
    Date of Patent: January 13, 2009
    Assignee: Advanced Chip Engineering Technology Inc.
    Inventors: Wen-Kun Yang, Wen-Bin Sun, Hsi-Ying Yuan, Chun Hui Yu
  • Publication number: 20090008777
    Abstract: An interconnecting structure for a semiconductor die assembly, comprising: a substrate with pre-formed wiring circuit formed therein; a die having contact pads on an active surface; an adhesive material formed over the substrate to adhere the die over the substrate, wherein the substrate includes a via through the substrate and the adhesive material; and conductive material refilled into the via to couple the contact pads of the die to the wiring circuit of the substrate.
    Type: Application
    Filed: July 6, 2007
    Publication date: January 8, 2009
    Inventors: Diann-Fang Lin, Wen-Kun Yang
  • Publication number: 20090008729
    Abstract: The present invention discloses a structure of image sensor package utilizing a removable protection film. The structure comprises a substrate with a die receiving cavity and inter-connecting through holes. Terminal pads are formed under the inter-connecting through holes and metal pads are formed on an upper surface of the substrate. A die is disposed within the die receiving cavity by an adhesion material. Bonding pads are formed on the upper edge of the die. Bonding wires are coupled to the metal pads and the bonding pads. A protection layer is formed on the micro lens area to protect the micro lens from particle contamination. A removable protection film is formed over the protection layer to protect the micro lens from water, oil, dust or temporary impact during the packaging and assembling process.
    Type: Application
    Filed: July 3, 2007
    Publication date: January 8, 2009
    Inventors: Wen-Kun Yang, Jui-Hsien Chang, Chi-Chen Lee, Wen-Ping Yang
  • Patent number: 7468544
    Abstract: A wafer level package comprises a wafer having a plurality of dice formed thereon; a thinner metal cover with a cavity formed therein attached on the wafer by an adhesive material to improve thermal conductivity of the package. A protection film is formed on back side of the metal cover and filled into the cavity, thereby facilitating for laser marking and obtaining a better sawing quality of the package.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: December 23, 2008
    Assignee: Advanced Chip Engineering Technology Inc.
    Inventor: Wen-Kun Yang