Patents by Inventor Wen Wang

Wen Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240163517
    Abstract: Embodiments of the present disclosed provides an interaction method and device, a storage medium, and a computer program product, including displaying an input control during a process of playing a first media content through a playback control in an interaction interface; obtaining input information of a current user from the input control; displaying the input information and associated information of the input information; and judging whether the input information and the associated information meet a preset condition, and displaying a second media content based on a result of the judging.
    Type: Application
    Filed: March 11, 2022
    Publication date: May 16, 2024
    Inventors: Yijie LI, Haiqian WANG, Rongrong ZHENG, Linxing LI, Xuyuan XIANG, Wen RUAN, Yanran WANG
  • Publication number: 20240163987
    Abstract: A dimming circuit is configured to generate a dimming signal to control a brightness of a light emitting device. The brightness is correlated with a duty ratio of the dimming signal. The dimming circuit is configured to count a conduction time of the dimming signal according to a programmable period count code and a programmable brightness code, based upon a fundamental frequency, wherein when the conduction time is less than a conduction time lower limit, based upon a down conversion ratio, the dimming circuit reduces a frequency of the dimming signal according to the programmable period count code and the programmable brightness code, wherein the down conversion ratio is greater than 1 to an extent where a dimming conduction time is greater than or equal to a conduction time lower threshold.
    Type: Application
    Filed: August 30, 2023
    Publication date: May 16, 2024
    Inventors: Chun-Wen Wang, Yi-Hua Chang, Hsing-Shen Huang
  • Publication number: 20240163498
    Abstract: A support interaction method and an electronic device are provided. The method comprises: displaying a playing interface of a video program in an application program; after a first object in the video program appears in the playing interface, displaying a first component, wherein the first component is used for supporting the first object within a first time period, and the first time period is a time period within which the first object played on the playing interface appears in the video program; within the first time period, receiving a first operation executed by a user on the first component; and in response to receiving the first operation, displaying, in the first component, the number of supports from the user for the first object.
    Type: Application
    Filed: March 8, 2022
    Publication date: May 16, 2024
    Inventors: Haiqian WANG, Yijie LI, Rongrong ZHENG, Linxing LI, Wen RUAN, Xuyuan XIANG, Yanran WANG
  • Publication number: 20240162356
    Abstract: A light detecting device includes a substrate that has a lattice constant. A buffer layer is disposed on the substrate. A gradient layer is formed on the buffer layer opposite to the substrate, and includes a plurality of sublayers that have respectively lattice constants each of which is greater than the lattice constant of the substrate. The sublayers are arranged in a manner that the lattice constants of the sublayers undergo a gradual increase in lattice constant in a direction away from the substrate. A barrier layer is formed on the gradient layer opposite to the buffer layer, and has a lattice constant which is greater than that of the substrate and no smaller than the lattice constants of the sublayers. An absorption layer is formed on the barrier layer opposite to the gradient layer.
    Type: Application
    Filed: March 29, 2023
    Publication date: May 16, 2024
    Inventors: Hung-Wen HUANG, Yung-Chao CHEN, Yi-Hsiang WANG, Wei LIN
  • Publication number: 20240161022
    Abstract: Disclosed in the present invention is a fast and flexible holomorphic embedding method and apparatus for economic strategy adjustment. The method includes: obtaining product data and establishing equilibrium polynomial equations based on a Bertrand model; describing the equilibrium polynomial equations as a polynomial system and constructing a polynomial homotopy function; solving the equilibrium polynomial equations to obtain solutions of the equations: and analyzing equilibriums based on the solutions of the equations and performing economic strategy selection. The apparatus includes a memory and a processor configured to perform the fast and flexible holomorphic embedding method for economic strategy adjustment. The present invention can efficiently solve equilibrium polynomial equations based on which an economic strategy can be adjusted, to improve performance of enterprises.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 16, 2024
    Applicant: SUN YAT-SEN UNIVERSITY
    Inventors: Tao WANG, Yusi ZHANG, Wen ZHANG, Jiamin ZHANG, Yanzhi LIU
  • Publication number: 20240162833
    Abstract: A power supply unit supplies power to a load, and the power supply unit includes a power factor corrector, a DC conversion module, and an isolated conversion module. The power factor corrector is plugged into a first main circuit board and converts an AC power into a DC power. The DC conversion module is plugged into the first main circuit board and converts the DC power into a main power. The isolated conversion module includes a bus capacitor, the bus capacitor is coupled to the DC conversion module through a first power copper bar, and coupled to the power factor corrector through a second power copper bar. The first power copper bar and the second power copper bar are arranged on a side opposite to the first main circuit board, and are arranged in parallel with the first main circuit board.
    Type: Application
    Filed: November 13, 2023
    Publication date: May 16, 2024
    Inventors: Yi-Sheng CHANG, Cheng-Chan HSU, Chia-Wei CHU, Chun-Yu YANG, Deng-Cyun HUANG, Yi-Hsun CHIU, Chien-An LAI, Yu-Tai WANG, Chi-Shou HO, Zhi-Yuan WU, Ko-Wen LU
  • Patent number: 11983041
    Abstract: A flexible display, including a stand, a supporting mechanism, a flexible screen, a driving component, a driven component, and a link, is provided. The supporting mechanism is connected to the stand. The flexible screen is attached to the supporting mechanism. The driving component is disposed on the stand. The driven component is disposed on a side of the supporting mechanism distant from the stand. The link has a first end and a second end opposite to the first end. The first end is connected to the driving component, and the second end is connected to the driven component. The driving component drives the driven component through the link to move on a first horizontal plane to drive the supporting mechanism and the flexible screen to transform when the driving component moves between the first horizontal plane and a second horizontal plane that is parallel to the first horizontal plane.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: May 14, 2024
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Yu-Wen Cheng, Yan-Yu Chen, Chun-Wen Wang, Chung-Lin Hsieh
  • Patent number: 11983090
    Abstract: A method of analyzing source code includes receiving, by a processor, an updated version of a computer program, the updated version including a source code. The method also includes preprocessing, by a compiler, the source code for a target computing platform. Preprocessing the source code by the compiler includes identifying a macro condition associated with one or more computer instructions enclosed by a macro, determining object code corresponding to the one or more computer instructions based on a current value of the macro condition, and generating object code and macro information for output to a debugger, the macro information including one or more breakpoint conditions in the macro.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: May 14, 2024
    Assignee: International Business Machines Corporation
    Inventors: Xiao Ling Chen, Wen Ji Huang, Heng Wang, Sheng Shuang Li, Wen Bin Han, Peng Hui Jiang
  • Patent number: 11983848
    Abstract: Aspects of the disclosure provide a frame processor for processing frames with aliasing artifacts. For example, the frame processor can include a super-resolution (SR) and anti-aliasing (AA) engine and an attention reference frame generator coupled to the SR and AA engine. The SR and AA engine can be configured to enhance resolution and remove aliasing artifacts of a frame to generate a first high-resolution frame with aliasing artifacts and a second high-resolution frame with aliasing artifacts removed. The attention reference frame generator can be configured to generate an attention reference frame based on the first high-resolution frame and the second high-resolution frame.
    Type: Grant
    Filed: January 6, 2023
    Date of Patent: May 14, 2024
    Assignee: MEDIATEK INC.
    Inventors: Cheng-Lung Jen, Pei-Kuei Tsung, Chih-Wei Chen, Yao-Sheng Wang, Shih-Che Chen, Yu-Sheng Lin, Chih-Wen Goo, Shih-Chin Lin, Tsung-Shian Huang, Ying-Chieh Chen
  • Patent number: 11984478
    Abstract: A method includes forming a first portion of a spacer layer over a first fin and a second portion of the spacer layer over a second fin, performing a first etching process to recess the first portion of the spacer layer with respect to the second portion of the spacer layer to form first spacers on sidewalls of the first fin, subsequently performing a second etching process to recess the second portion of the spacer layer with respect to the first spacers to form second spacers on sidewalls of the second fin, where the second spacers are formed to a height greater than that of the first spacers, and forming a first epitaxial source/drain feature and a second epitaxial source/drain feature between the first spacers and the second spacers, respectively, where the first epitaxial source/drain feature is larger than that of the second epitaxial source/drain feature.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shu Wen Wang, Chih-Teng Liao, Chih-Shan Chen, Jui Fu Hsieh, Dave Lo
  • Publication number: 20240152807
    Abstract: A data processing method applied to a database system is disclosed. The method includes: obtaining a model training request, where the model training request includes a plurality of training samples and a model training policy, and the plurality of training samples is grouped into N training sample groups; generating an execution plan of the model training policy and an estimated execution cost of the execution plan executed by the database system; obtaining, based on the estimated execution cost, M training sample groups in the N training sample groups; training a to-be-trained model in parallel by using the M training sample groups, to obtain M pieces of parameter update data; and updating the to-be-trained model based on the M pieces of parameter update data, to obtain a trained model. This method reduces time overheads of the model training.
    Type: Application
    Filed: December 28, 2023
    Publication date: May 9, 2024
    Inventors: Shifu LI, Tianqing WANG, Wen NIE
  • Publication number: 20240155185
    Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 9, 2024
    Inventors: Chia-Hao CHANG, You-Tsai JENG, Kai-Wen YEH, Yi-Cheng CHEN, Te-Chuan WANG, Kai-Wen CHENG, Chin-Lung LIN, Tai-Lai TUNG, Ko-Yin LAI
  • Publication number: 20240152194
    Abstract: A power consumption reduction method can include defining y operation scenarios according to x types of extracted information, generating z power profiles each used for controlling power provided to a subset of a plurality of processors, assigning the z power profiles to the y operation scenarios in a machine learning model, collecting to-be-evaluated information by the plurality of processors, comparing the to-be-evaluated information with the x types of extracted information to find a most similar type of extracted information, using the machine learning model to select an optimal power profile from the z power profiles according to the most similar type of extracted information, and applying the optimal power profile to control the power provided to the subset of the plurality of processors. The subset of the plurality of processors are of the same type of processor. x, y and z can be an integer larger than zero.
    Type: Application
    Filed: August 18, 2023
    Publication date: May 9, 2024
    Applicant: MEDIATEK INC.
    Inventors: Wen-Wen Hsieh, Ying-Yi Teng, Chien-Chih Wang
  • Publication number: 20240155231
    Abstract: A method for performing light shaping with aid of an adaptive projector and associated apparatus are provided.
    Type: Application
    Filed: November 7, 2022
    Publication date: May 9, 2024
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventors: Wu-Feng Chen, Ching-Wen Wang, Cheng-Che Tsai, Hsueh-Tsung Lu
  • Publication number: 20240154015
    Abstract: A method includes forming a first fin and a second fin protruding from a frontside of a substrate, forming a gate stack over the first and second fins, forming a dielectric feature dividing the gate stack into a first segment engaging the first fin and a second segment engaging the second fin, and growing a first epitaxial feature on the first fin and a second epitaxial feature on the second fin. The dielectric feature is disposed between the first and second epitaxial features. The method also includes performing an etching process on a backside of the substrate to form a backside trench, and forming a backside via in the backside trench. The backside trench exposes the dielectric feature and the first and second epitaxial features. The backside via straddles the dielectric feature and is in electrical connection with the first and second epitaxial features.
    Type: Application
    Filed: March 22, 2023
    Publication date: May 9, 2024
    Inventors: Jui-Lin CHEN, Hsin-Wen SU, Chih-Ching WANG, Chen-Ming LEE, Chung-I YANG, Yi-Feng TING, Jon-Hsu HO, Lien-Jung HUNG, Ping-Wei WANG
  • Publication number: 20240154191
    Abstract: The present application provides a flow test tool, a negative pressure formation apparatus, and a battery manufacturing device. The flow test tool includes a base and a flow test module mounted on the base, the flow test module is provided with a plurality of test interfaces, and the test interface is connected to a fluid channel of a mechanism to be tested one by one.
    Type: Application
    Filed: September 22, 2023
    Publication date: May 9, 2024
    Inventors: Shaosheng Cheng, Wen Yu, Jiefei Gong, Fengyu Guo, Yanqing Chen, Wei Wang, Weidong Song, Shaohui Zhang, Gege Chen
  • Publication number: 20240153949
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip (IC). The method includes forming a first fin of semiconductor material and a second fin of semiconductor material within a semiconductor substrate. A gate structure is formed over the first fin and source/drain regions are formed on or within the first fin. The source/drain regions are formed on opposite sides of the gate structure. One or more pick-up regions are formed on or within the second fin. The source/drain regions respectively have a first width measured along a first direction parallel to a long axis of the first fin and the one or more pick-up regions respectively have a second width measured along the first direction. The second width is larger than the first width.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 9, 2024
    Inventors: Hsin-Wen Su, Lien Jung Hung, Ping-Wei Wang, Wen-Chun Keng, Chih-Chuan Yang, Shih-Hao Lin
  • Patent number: 11977336
    Abstract: A method for improving a process model for a patterning process, the method including obtaining a) a measured contour from an image capture device, and b) a simulated contour generated from a simulation of the process model. The method also includes aligning the measured contour with the simulated contour by determining an offset between the measured contour and the simulated contour. The process model is calibrated to reduce a difference, computed based on the determined offset, between the simulated contour and the measured contour.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: May 7, 2024
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Jen-Shiang Wang, Qian Zhao, Yunbo Guo, Yen-Wen Lu, Mu Feng, Qiang Zhang
  • Patent number: 11975736
    Abstract: A computer, including a processor and a memory, the memory including instructions to be executed by the processor to calibrate utility functions that determine optimal vehicle actions based on an approximate Nash equilibrium solution for multiple agents by determining a difference between model-predicted future states for the multiple agents to observed states for the multiple agents. The instructions can include further instructions to determine a vehicle path for a vehicle based on the optimal vehicle actions.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: May 7, 2024
    Assignee: Ford Global Technologies, LLC
    Inventors: Qi Dai, Jinhong Wang, Wen Guo, Xunnong Xu, Suzhou Huang, Dimitar Petrov Filev
  • Patent number: 11976091
    Abstract: The present disclosure relates generally to terpene glycosides, such as certain such compounds extracted from Stevia rebaudiana Bertoni, Rubus suavissimus, or Siraitia grosvenorii. The disclosure also provides for the use of such compounds as food ingredients, flavors, and sweeteners, and related methods. The disclosure also provides ingestible compositions comprising such compounds, as well as processes for extracting such compounds selectively from certain plant sources.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: May 7, 2024
    Assignee: Firmenich SA
    Inventors: Dan-Ting Yin, Yi-Min Wang, Xian-Wen Gan