Patents by Inventor Werner Graf

Werner Graf has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040259298
    Abstract: A method for the integration of field-effect transistors for memory and logic applications in a semiconductor substrate is disclosed. The gate dielectric and a semiconductor layer are deposited over the whole area both in the logic region and in the memory region. From these layers, the gate electrodes in the memory region are formed, the source and drain regions are implanted and the memory region is covered in a planarizing manner with an insulation material. Afterward, the gate electrodes are formed from the semiconductor layer and the gate dielectric in the logic region.
    Type: Application
    Filed: August 3, 2004
    Publication date: December 23, 2004
    Inventors: Werner Graf, Albrecht Kieslich
  • Publication number: 20040142548
    Abstract: The invention relates to a method for production of contacts on a wafer, preferably with the aid of a lithographic process. The preferred embodiment provides a method which overcomes the disadvantages of the complex point/hole lithography process, and which avoids any increase in the process complexity. This method is achieved in that a strip structure extending over two layers is used to structure the contacts. The strip structure in the first layer is rotated at a predetermined angle with respect to the strip structure in the second layer, and the contacts are formed in the mutually overlapping areas of the strip structures in the two layers.
    Type: Application
    Filed: December 18, 2003
    Publication date: July 22, 2004
    Inventors: Werner Graf, Henning Haffner, Johannes Kowalewski, Lars Heineck
  • Patent number: 6753236
    Abstract: A method for planarizing the surface of an isolating layer that is deposited on a semiconductor body is described. Zones where the isolating layer has a low level are covered with a block mask in order to be able to selectively etch zones of the isolating layer with a higher level.
    Type: Grant
    Filed: September 3, 2002
    Date of Patent: June 22, 2004
    Assignee: Infineon Technologies AG
    Inventors: Klaus Feldner, Werner Graf, Albrecht Kieslich, Hermann Sachse
  • Publication number: 20040057208
    Abstract: A power module is suggested having a simple and cost-effective arrangement and ensuring a reliable operation. To this end, a circuit arrangement comprising at least one electronic component is arranged on a carrier body. A conductor pattern is formed on the top side of the carrier body, and a structured cooling element made of the material of the carrier body, is provided on the bottom side. The invention also relates to a power module as power converter for electric motors.
    Type: Application
    Filed: July 16, 2003
    Publication date: March 25, 2004
    Inventors: Hermann Baeumel, Werner Graf, Hermann Kilian, Bernhard Schuch
  • Publication number: 20030215986
    Abstract: A gate structure of a transistor is fabricated with an additional barrier formed on a metal layer of the gate structure before the deposition of a silicon oxide layer. Applying this barrier layer on the metal layer before the deposition of the silicon oxide layer prevents an oxidation of the metal during the deposition of the silicon oxide layer. A lowering of the conductivity of the metal layer or a loss of metal through sublimating metal oxide is thereby prevented. As a result, in particular the performance of the gate structure or of the transistor is improved further. In addition, disturbing coupling effects in the circuit are significantly reduced by the use of the silicon oxide cap.
    Type: Application
    Filed: May 6, 2003
    Publication date: November 20, 2003
    Inventors: Werner Graf, Ulrike Bewersdorff-Sarlette
  • Patent number: 6586305
    Abstract: Integrated semiconductor circuits have MOS transistors whose gate electrodes are provided with dopings in order to set the electrical potential of the channel area by changing the ionization energy (work function) of the electrons. Transistors in semiconductor circuits, which have both a memory area and a logic area, are produced either using different dopings for pMOS and NMOS transistors in the logic area (dual work function) or using common source/drain electrodes in the memory area (borderless contact), with all the transistors in the semiconductor circuit receiving the same gate doping in the latter case. A method is proposed by which a dual work function and a borderless contact can be produced at the same time. Furthermore, the method results without any additional effort in a trench between the gate layer stacks of the memory area and of the logic area, which prevents lateral ion diffusion.
    Type: Grant
    Filed: August 16, 2002
    Date of Patent: July 1, 2003
    Assignee: Infineon Technologies AG
    Inventor: Werner Graf
  • Patent number: 6571859
    Abstract: A heat sink of metal material, in particular a light metal alloy, for semi-conductor elements or similar components, has plate-like cooling ribs projecting from a base plate at intervals (f) and approximately parallel to each other, protrude with a connection strip into the base plate in which they are cast. A molding tool designed for production of the heat sink includes a casting mold with a mold chamber for the base plate. The mold chamber contains an area to receive the connection strips of the cooling ribs. Two parallel side walls of the casting mold and intermediate layers arranged parallel between them, each defining a receiver gap, are arranged displaceably on at least one shaft passing through them. The walls can be moved to produce the compact casting mold after insertion of the cooling ribs in the receiver gaps.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: June 3, 2003
    Assignee: Alcan Technology & Management Ltd.
    Inventors: Werner Graf, Uwe Bock
  • Publication number: 20030049906
    Abstract: Integrated semiconductor circuits have MOS transistors whose gate electrodes are provided with dopings in order to set the electrical potential of the channel area by changing the ionization energy (work function) of the electrons. Transistors in semiconductor circuits, which have both a memory area and a logic area, are produced either using different dopings for pMOS and nMOS transistors in the logic area (dual work function) or using common source/drain electrodes in the memory area (borderless contact), with all the transistors in the semiconductor circuit receiving the same gate doping in the latter case. A method is proposed by which a dual work function and a borderless contact can be produced at the same time. Furthermore, the method results without any additional effort in a trench between the gate layer stacks of the memory area and of the logic area, which prevents lateral ion diffusion.
    Type: Application
    Filed: August 16, 2002
    Publication date: March 13, 2003
    Inventor: Werner Graf
  • Publication number: 20030045105
    Abstract: A method for planarizing the surface of an isolating layer that is deposited on a semiconductor body is described. Zones where the isolating layer has a low level are covered with a block mask in order to be able to selectively etch zones of the isolating layer with a higher level.
    Type: Application
    Filed: September 3, 2002
    Publication date: March 6, 2003
    Inventors: Klaus Feldner, Werner Graf, Albrecht Kieslich, Hermann Sachse
  • Publication number: 20020179287
    Abstract: A heat sink of metal material, in particular a light metal alloy, for semi-conductor elements or similar components, has plate-like cooling ribs projecting from a base plate at intervals (f) and approximately parallel to each other, protrude with a connection strip into the base plate in which they are cast. A molding tool designed for production of the heat sink includes a casting mold with a mold chamber for the base plate. The mold chamber contains an area to receive the connection strips of the cooling ribs. Two parallel side walls of the casting mold and intermediate layers arranged parallel between them, each defining a receiver gap, are arranged displaceably on at least one shaft passing through them. The walls can be moved to produce the compact casting mold after insertion of the cooling ribs in the receiver gaps.
    Type: Application
    Filed: July 1, 2002
    Publication date: December 5, 2002
    Inventors: Werner Graf, Uwe Bock
  • Publication number: 20020096313
    Abstract: A heat sink of metal material, in particular a light metal alloy, for semi-conductor elements or similar components, has plate-like cooling ribs projecting from a base plate at intervals (f) and approximately parallel to each other, protrude with a connection strip into the base plate in which they are cast. A molding tool designed for production of the heat sink includes a casting mold with a mold chamber for the base plate. The mold chamber contains an area to receive the connection strips of the cooling ribs. Two parallel side walls of the casting mold and intermediate layers arranged parallel between them, each defining a receiver gap, are arranged displaceably on at least one shaft passing through them. The walls can be moved to produce the compact casting mold after insertion of the cooling ribs in the receiver gaps.
    Type: Application
    Filed: March 11, 2002
    Publication date: July 25, 2002
    Applicant: ALUSUISSE TECHNOLOGY & MANAGEMENT LTD.
    Inventors: Werner Graf, Uwe Bock
  • Publication number: 20020023732
    Abstract: A heat sink of metal material, in particular a light metal alloy, for semi-conductor elements or similar components, has plate-like cooling ribs projecting from a base plate at intervals (f) and approximately parallel to each other, protrude with a connection strip into the base plate in which they are cast. A molding tool designed for production of the heat sink includes a casting mold with a mold chamber for the base plate. The mold chamber contains an area to receive the connection strips of the cooling ribs. Two parallel side walls of the casting mold and intermediate layers arranged parallel between them, each defining a receiver gap, are arranged displaceably on at least one shaft passing through them. The walls can be moved to produce the compact casting mold after insertion of the cooling ribs in the receiver gaps.
    Type: Application
    Filed: August 9, 2001
    Publication date: February 28, 2002
    Inventors: Werner Graf, Uwe Bock
  • Patent number: 6003930
    Abstract: A vehicle features a bumper which runs transverse to the longitudinal direction of the vehicle and which is attached to the vehicle by at least one deforming element. The deforming element is essentially in the form of a tube-shaped length of section of light weight metal having its longitudinal axis lying in the longitudinal direction of the vehicle and is divided into longitudinal chambers by inner struts.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: December 21, 1999
    Assignee: Alusuisse Technology & Management Ltd.
    Inventors: Simon Frank, Werner Graf
  • Patent number: 5727826
    Abstract: A bumper for vehicles, in particular for private cars, features an extruded section of light metal alloy that can be attached to the vehicle and exhibits in the form of section walls (12, 14) a compression wall (12) and a tension wall (14) that are spaced a distance (1) apart and a pair of transverse walls (16,18) that join these to form a hollow section, where at least one transverse strut (20, 22, 24) is provided between the transverse walls (16,18), joins these walls (12, 14) to each other and divides the hollow section into chambers. A vertical strut (26) is provided between the section walls (12, 14) joining the both transverse walls (16, 18) to each other and dividing the hollow section into a primary deformation part (A) with the chambers (30) bordering onto the compression wall (12) and a secondary deformation part (B) with chambers (32) bordering onto the tension wall (14).
    Type: Grant
    Filed: November 19, 1996
    Date of Patent: March 17, 1998
    Assignee: Alusuisse Technology & Management Ltd.
    Inventors: Simon Frank, Werner Graf
  • Patent number: 5597882
    Abstract: The compositions proposed contain, as their main constituents,(a) a diorganopolysiloxane with triorganosiloxy groups as terminal groups, the organic groups being hydrocarbon groups which may be halogenated,(b) the reaction product of a diacylated diorganotin compound with a disilaalkane containing, per molecule, at least two monovalent hydrocarbon groups which are bonded to silicon via oxygen and may optionally be substituted by an alkoxy group, or with an oligomer of such a disilaalkane,(c) an organosilicon compound containing, per molecule, at least one amino or amino group bonded to silicon via carbon,(d) optionally, a filler and(e) optionally, a disilaalkane and/or silane containing, per molecule, at least three monovalent hydrocarbon groups which are bonded to silicon via oxygen and may optionally be substituted by an alkoxy group, or an oligomer of such a disilaalkane and/or silane.
    Type: Grant
    Filed: September 6, 1994
    Date of Patent: January 28, 1997
    Assignee: Wacker-Chemie GmbH
    Inventors: August Schiller, Norman Dorsch, Werner Graf, Alois Strasser
  • Patent number: 5584518
    Abstract: A bumper with brackets attached for mounting it onto a vehicle, in particular a private car, is such that, at least in the region of the brackets, the bumper is bowed with respect to the front line of the vehicle, and features section walls a distance apart in the form of a compression wall and a tension wall and a pair of transverse walls joining them making up a hollow section. The brackets feature a wedge-shaped support, the sloping face of which lies against the tension wall and is connected to this in region at the highest point of the sloping face.
    Type: Grant
    Filed: November 17, 1995
    Date of Patent: December 17, 1996
    Assignee: Alusuisse Technology & Management Ltd.
    Inventors: Simon Frank, Werner Graf
  • Patent number: 5582381
    Abstract: Play-free longitudinal guiding means having rails than run inside each other, namely a lower rail and an upper rail that can be displaced in a sliding manner with respect to the lower rail, for securing seats in vehicles such as private cars. The play-free longitudinal guiding means is such that the lower rail features along its length wall parts that have the shape of alignment grooves, and the upper rail features wall parts which run parallel to the wall parts of the lower rail and are shaped into an alignment groove, and the alignment grooves of the upper and lower rails face each other and form a sliding alignment channel. In the sliding channel there are sliding elements which in the free-standing condition exhibit a larger cross-section than in the installed condition, and the sliding elements guide the lower and upper rails without any play.
    Type: Grant
    Filed: May 15, 1995
    Date of Patent: December 10, 1996
    Assignee: Alusuisse Technology & Management Ltd.
    Inventors: Werner Graf, Simon Frank, Karl Baumann
  • Patent number: 5268441
    Abstract: Compositions which have a long shelf life in the absence of water, but crosslink in the presence of water at room temperature to form elastomers which are prepared by mixing (1) an organopolysiloxane containing condensable terminal groups with (2) an organosilicon compound containing at least three hydrolyzable groups per molecule which are bonded directly to silicon, (3) a condensation catalyst and, optionally, at least one additional substance, in which the condensation catalyst (3), is a reaction product obtained from the reaction of a finely divided, inorganic oxide with a reactive titanium compound.
    Type: Grant
    Filed: November 23, 1992
    Date of Patent: December 7, 1993
    Assignee: Wacker-Chemie GmbH
    Inventors: Herbert Barthel, Werner Graf
  • Patent number: 5098747
    Abstract: The invention related to coating compositions containing (poly)borosiloxanes, which contain at least one other component selected from lead, boron and aluminum compounds and talc, and to a process for preparing vitreous protective coatings, which can be applied to a substrate to be protected and then heat-treated to a temperature of at least 500.degree. C.
    Type: Grant
    Filed: June 8, 1990
    Date of Patent: March 24, 1992
    Assignee: Wacker-Chemie GmbH
    Inventors: Wilfried Kalchauer, Werner Graf, Bernd Pachaly
  • Patent number: 4968760
    Abstract: Organopolysiloxane compositions which crosslink at room temperature to form paintable elastomers containing (3) an organopolysiloxane having SiC-bonded radicals with a basic nitrogen and/or (4) a branched organopolysiloxane.
    Type: Grant
    Filed: March 6, 1989
    Date of Patent: November 6, 1990
    Assignee: Wacker-Chemie GmbH
    Inventors: August Schiller, Norman Dorsch, Werner Graf, Karl Braunsperger