Abstract: An apparatus and a method for implanting ions are disclosed. In an embodiment, the apparatus includes a receptacle configured to support the wafer, a source of dopants configured to selectively provide dopants to an implantation region of the wafer and a source of radiation configured to selectively irradiate the implantation region.

Abstract: Disclosed is a method. The method includes forming a metal layer on a first surface of a semiconductor body; irradiating the metal layer with particles to move metal atoms from the metal layer into the semiconductor body and form a metal atom containing region in the semiconductor body; and annealing the semiconductor body. The annealing includes heating at least the metal atom containing region to a temperature of less than 500° C.

Abstract: A first doped region is formed in a single crystalline semiconductor substrate. Light ions are implanted through a process surface into the semiconductor substrate to generate crystal lattice vacancies between the first doped region and the process surface, wherein a main beam axis of an implant beam used for implanting the light ions deviates by at most 1.5 degree from a main crystal direction along which channeling of the light ions occurs. A second doped region with a conductivity type opposite to the first doped region is formed based on the crystal lattice vacancies and hydrogen atoms.

Abstract: A method for forming a semiconductor device includes implanting doping ions into a semiconductor substrate. A deviation between a main direction of a doping ion beam implanting the doping ions and a main crystal direction of the semiconductor substrate is less than ±0.5° during the implanting of the doping ions into the semiconductor substrate. The method further includes controlling a temperature of the semiconductor substrate during the implantation of the doping ions so that the temperature of the semiconductor substrate is within a target temperature range for more than 70% of an implant process time used for implanting the doping ions. The target temperature range reaches from a lower target temperature limit to an upper target temperature limit. The lower target temperature limit is equal to a target temperature minus 30° C., and the target temperature is higher than 80° C.

Abstract: A method for producing a semiconductor is disclosed, the method having: providing a semiconductor body having a first side and a second side; forming an n-doped zone in the semiconductor body by a first implantation into the semiconductor body via the first side to a first depth location of the semiconductor body; and forming a p-doped zone in the semiconductor body by a second implantation into the semiconductor body via the second side to a second depth location of the semiconductor body, a pn-junction forming between said n-doped zone and said p-doped zone in the semiconductor body.

Abstract: A method for forming a semiconductor device comprises forming an amorphous or polycrystalline semiconductor layer adjacently to at least one semiconductor doping region having a first conductivity type located in a semiconductor substrate. The method further comprises incorporating dopants into the amorphous or polycrystalline semiconductor layer during or after forming the amorphous or polycrystalline semiconductor layer. The method further comprises annealing the amorphous or polycrystalline semiconductor layer to transform at least a part of the amorphous or polycrystalline semiconductor layer into a substantially monocrystalline semiconductor layer and to form at least one doping region having the second conductivity type in the monocrystalline semiconductor layer, such that a p-n junction is formed between the at least one semiconductor doping region having the first conductivity type and the at least one doping region having the second conductivity type.

Abstract: A method for forming a semiconductor device includes determining at least one electrical parameter for each semiconductor device of a plurality of semiconductor devices to be formed in a semiconductor wafer. The method further includes implanting doping ions into device areas of the semiconductor wafer used for forming the plurality of semiconductor devices with laterally varying implantation doses based on the at least one electrical parameter of the plurality of semiconductor devices.

Abstract: A semiconductor device includes a semiconductor body with parallel first and second surfaces and containing hydrogen-related donors. A concentration profile of the hydrogen-related donors vertical to the first surface includes a maximum value of at least 1E15 cm?3 at a first distance to the first surface and does not fall below 1E14 cm?3 over at least 60% of an interval between the first surface and the first distance.

Abstract: A semiconductor body having a first surface is provided. A deep doped region of the semiconductor body is formed using masked ion implantation to implant dopant atoms into a discrete region within the semiconductor body. A structured anti-reflective coating region is formed on a portion of the first surface that is aligned with the deep doped region in a lateral direction of the semiconductor body, the lateral direction being parallel to the first surface. A laser thermal anneal of the deep doped region of the semiconductor body is performed through the anti-reflective coating region thereby activating the implanted dopant atoms in the deep doped region.

Abstract: A method for forming a semiconductor device includes implanting a predefined dose of protons into a semiconductor substrate. Further, the method comprises controlling a temperature of the semiconductor substrate during the implantation of the predefined dose of protons so that the temperature of the semiconductor substrate is within a target temperature range for more than 70% of an implant process time used for implanting the predefined dose of protons. The target temperature range reaches from a lower target temperature limit to an upper target temperature limit. Further, the lower target temperature limit is equal to a target temperature minus 30° C. and the upper target temperature limit is equal to the target temperature plus 30° C. and the target temperature is higher than 80° C.

Abstract: A transistor cell includes, in a semiconductor body, a drift region of a first doping type, a source region of the first doping type, a body region of a second doping type, and a drain region of the first doping type. The body region is arranged between the source and drift regions. The drift region is arranged between the body and drain regions. A gate electrode is adjacent the body region and dielectrically insulated from the body region by a gate dielectric, and a field electrode is dielectrically insulated from the drift region by a field electrode dielectric. The drift region includes an avalanche region having a higher doping concentration than sections of the drift region adjacent the avalanche region and which is spaced apart from the field electrode dielectric in a direction perpendicular to the current flow direction. The field electrode is arranged in a needle-shaped trench.

Abstract: Various embodiments provide a method of reducing a sheet resistance in an electronic device encapsulated at least partially in an encapsulation material, wherein the method comprises: providing an electronic device comprising a multilayer structure and being at least partially encapsulated by an encapsulation material; and locally introducing energy into the multilayer structure for reducing a sheet resistance.

Abstract: A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen concentration in a semiconductor wafer. On the basis of information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as information about a generation rate or a dissociation rate of oxygen-related thermal donors in the semiconductor wafer, a process temperature gradient is determined for generating or dissociating oxygen-related thermal donors to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration.

Abstract: An ion source for an implanter includes a first solid state source electrode disposed in an ion source chamber. The first solid state source electrode includes a source material coupled to a first negative potential node. A second solid state source electrode is disposed in the ion source chamber. The second solid state source electrode includes the source material coupled to a second negative potential node, and the first solid state source electrode and the second solid state source electrode are configured to produce ions to be implanted by the implanter.

Abstract: An ion implantation apparatus includes an ion beam directing unit, a substrate support, and a controller. The controller is configured to effect a relative movement between an ion beam passing the ion beam directing unit and the substrate support. A beam track of the ion beam on a substrate mounted on the substrate support includes circles or a spiral.

Abstract: A semiconductor device includes a semiconductor body having a semiconductor body material with a dopant diffusion coefficient that is smaller than the corresponding dopant diffusion coefficient of silicon, at least one first semiconductor region doped with dopants of a first conductivity type and having a columnar shape that extends into the semiconductor body along an extension direction, wherein a respective width of the at least one first semiconductor region continuously increases along the extension direction; and at least one second semiconductor region included in the semiconductor body. The at least one second semiconductor region is arranged adjacent to the at least one first semiconductor region, and is doped with dopants of a second conductivity type complementary to the first conductivity type.

Abstract: A semiconductor component includes a semiconductor body having a first side and a second side opposite the first side. In the semiconductor body, a dopant region is formed by a dopant composed of an oxygen complex. The dopant region extends over a section L having a length of at least 10 ?m along a direction from the first side to the second side. The dopant region has an oxygen concentration in a range of 1×1017 cm?3 to 5×1017 cm?3 over the section L.

Abstract: A method for producing a semiconductor is disclosed, the method having: providing a semiconductor body having a first side and a second side; forming an n-doped zone in the semiconductor body by a first implantation into the semiconductor body via the first side to a first depth location of the semiconductor body; and forming a p-doped zone in the semiconductor body by a second implantation into the semiconductor body via the second side to a second depth location of the semiconductor body, a pn-junction forming between said n-doped zone and said p-doped zone in the semiconductor body.

Abstract: A semiconductor device includes a semiconductor body with parallel first and second surfaces and containing hydrogen-related donors. A concentration profile of the hydrogen-related donors vertical to the first surface includes a maximum value of at least 1E15 cm?3 at a first distance to the first surface and does not fall below 1E14 cm?3 over at least 60% of an interval between the first surface and the first distance.

Abstract: An ion implantation apparatus includes an ion beam directing unit, a substrate support, and a controller. The controller is configured to effect a relative movement between an ion beam passing the ion beam directing unit and the substrate support. A beam track of the ion beam on a substrate mounted on the substrate support includes circles or a spiral.