Abstract: An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described.

Abstract: A method of providing wetting current diagnostics for a load control switch includes changing test switch settings of a detection circuit from an operational configuration to a testing configuration. The test switch settings specify respective states of first and second test switches of the detection circuit. The first and second test switches are connected to a node of the detection circuit through which, in the operational configuration, a wetting current for the load control switch flows. The method includes determining whether a voltage at the node becomes no longer indicative of the operational configuration as a result of the changed test switch settings, returning the test switch settings to the operational configuration, and providing a wetting current fault indication if the voltage at the node fails to return to a level indicative of the operational configuration after returning the test switch settings to the operational configuration.

Abstract: The present application provides a calibration device for calibrating a crank angle of a calibrateable combustion engine, the calibrateable combustion engine and a method for calibrating. The calibration device is provided to determine a trigger wheel angle offset from a combustionless driving of the combustion engine in that an in-cylinder pressure profile is recorded, on the basis of which a trigger wheel angle offset is determined and stored at an offset memory of the combustion engine. The combustion engine is configured to determine a crank angle on the basis of a measured trigger wheel angle and the stored trigger wheel angle offset.

Abstract: An electronic apparatus includes a packaging enclosure, first and second die pads disposed within the packaging enclosure, first and second semiconductor die disposed on the first and second die pads, respectively, a plurality of packaging leads, each packaging lead projecting outward from the packaging enclosure, a plurality of packaging posts disposed within the packaging enclosure and extending inward from opposite sides of the packaging enclosure between the first and second die pads, each packaging post being connected with a respective one of the plurality of packaging leads, and a plurality of wire bonds disposed within the packaging enclosure. Each packaging post of the plurality of packaging posts is connected via a first wire bond of the plurality of wire bonds to the first semiconductor die and via a second wire bond of the plurality of wire bonds to the second semiconductor die.

Abstract: The embodiments described herein can provide a variable reluctance sensor (VRS) interface that may reduce the probability of erroneous transitions in a resulting generated detect signal. As such, the VRS interface can improve the accuracy of position and/or motion determinations, and thus can improve the performance of a wide variety of devices that use variable reluctance sensors. To facilitate this, the VRS interface includes a pre-processing circuit configured to modify a VRS signal to prevent the modified VRS signal from dropping below a threshold value and generating erroneous transitions in the detect signal pulse between leading and lagging edges of a tooth. In one embodiment the pre-processing circuit comprises a peak and hold circuit. In another embodiment the pre-processing circuit comprises a resistor-capacitor circuit. In either case the pre-processing circuit can prevent erroneous transitions in the detect signal and thus may improve the performance and accuracy of the system.

Abstract: An integrated circuit haying normal and special operating modes includes a mode entry interlock (201) which is enabled by an initialization command and an externally supplied voltage at a first I/O terminal (204) to detect a conflict at the I/O terminal for reducing the likelihood of inadvertent entry into the special operating mode. The mode entry interlock also includes a second I/O terminal (212) for receiving a disassociated software command to enter into the special operating mode, and mode control logic (210, 216) for evaluating the received software command against any detected conflict at the I/O terminal to generate a special operating mode enable signal in response to receiving the first and second input signals only when the detected logic state conflicts with the first logic state.

Abstract: A diagnostic circuit is provided that includes a FET having a source connected to a first node, a drain, and a gate; a first switch connecting a current-supply node to one of the gate and a second node; a second switch connecting the first node and the second node; a variable current source providing one of a drive current and a test current to the current-supply node; a fire current source configured to provide a fire current to the drain; an error-detecting circuit connected to the second node, a reference terminal, and an error node, the error-detecting circuit generating an error signal to the error node indicating whether an error-detecting parameter at the second node exceeds a reference parameter at the reference terminal; and a control circuit generating control signals to control the variable current source, and the first and second switches.

Abstract: An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described.

Abstract: A buffer or voltage protection circuit, a circuit including same, and an associated method of operation are disclosed. In one example embodiment, the integrated circuit includes a first input terminal, a first circuit portion having a second input terminal, and a second circuit portion. The second circuit portion includes a transistor device having first, second, and third ports, where the first and second ports are respectively electrically coupled to the first input terminal and second input terminal, respectively. Additionally, the second circuit portion also includes a diode-type device that is electrically coupled between the third port and either a power source or a power input terminal, and a buffer/driver circuit and a capacitor coupled in series between the third and second ports. The second circuit portion operates to prevent the second input terminal from being exposed to an undesirably-high voltage level.

Abstract: An electronic apparatus includes a packaging enclosure, first and second die pads disposed within the packaging enclosure, first and second semiconductor die disposed on the first and second die pads, respectively, a plurality of packaging leads, each packaging lead projecting outward from the packaging enclosure, a plurality of packaging posts disposed within the packaging enclosure and extending inward from opposite sides of the packaging enclosure between the first and second die pads, each packaging post being connected with a respective one of the plurality of packaging leads, and a plurality of wire bonds disposed within the packaging enclosure. Each packaging post of the plurality of packaging posts is connected via a first wire bond of the plurality of wire bonds to the first semiconductor die and via a second wire bond of the plurality of wire bonds to the second semiconductor die.

Abstract: An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described.

Abstract: The embodiments described herein include systems with a variable reluctance sensor (VRS) interface and methods of their operation. Embodiments of VRS interfaces include a clearing signal generator configured to generate a clearing signal corresponding with the timing of a noise event. The clearing signal may be configured to clear a post-processing circuit.

Abstract: A method of switch detection is disclosed that comprises, enabling a low power mode on a switch detection device, activating a first detection circuit for detecting, at a first expiration of a first polling time interval, a first switch state of a first switch having a first priority level, the first switch state including one of a first open state and a first closed state, comparing the detected first switch state with a prior first switch state, and activating a second detection circuit for detecting, at a second expiration of a second polling time interval, a second switch state of a second switch having a second priority level, the second switch including one of a second open state and a second closed state, and the second polling time interval being greater than the first polling time interval, and the second priority level being different from the first priority level.

Abstract: The embodiments described herein include systems with a variable reluctance sensor (VRS) interface and methods of their operation that may reduce the probability of erroneous transitions in a resulting generated detect signal. As such, the VRS interface can improve the accuracy of position and/or motion determinations, and thus can improve the performance of a wide variety of devices that use variable reluctance sensors. In one embodiment the VRS interface uses a comparator with hysteresis to generate a trailing edge signal. In another embodiment the VRS interface uses bias voltages to reduce the probability of erroneous transitions in a trailing edge signal. In either case the VRS interface can prevent erroneous transitions in the detect signal and thus may improve the performance and accuracy of the system.

Abstract: The embodiments described herein can provide a variable reluctance sensor (VRS) interface that may reduce the probability of erroneous transitions in a resulting generated detect signal. As such, the VRS interface can improve the accuracy of position and/or motion determinations, and thus can improve the performance of a wide variety of devices that use variable reluctance sensors. To facilitate this, the VRS interface includes a pre-processing circuit configured to modify a VRS signal to prevent the modified VRS signal from dropping below a threshold value and generating erroneous transitions in the detect signal pulse between leading and lagging edges of a tooth. In one embodiment the pre-processing circuit comprises a peak and hold circuit. In another embodiment the pre-processing circuit comprises a resistor-capacitor circuit. In either case the pre-processing circuit can prevent erroneous transitions in the detect signal and thus may improve the performance and accuracy of the system.

Abstract: A diagnostic circuit is provided that includes a FET having a source connected to a first node, a drain, and a gate; a first switch connecting a current-supply node to one of the gate and a second node; a second switch connecting the first node and the second node; a variable current source providing one of a drive current and a test current to the current-supply node; a fire current source configured to provide a fire current to the drain; an error-detecting circuit connected to the second node, a reference terminal, and an error node, the error-detecting circuit generating an error signal to the error node indicating whether an error-detecting parameter at the second node exceeds a reference parameter at the reference terminal; and a control circuit generating control signals to control the variable current source, and the first and second switches.

Abstract: A method of testing a semiconductor device includes forming a test circuit over a semiconductor substrate. The test circuit includes a plurality of interconnects electrically connected to a set of device structures supported by the semiconductor substrate. A test, such as a gate stress or leakage current test, of each device structure is conducted with the test circuit. The plurality of interconnects are removed after conducting the test.

Abstract: A variable reluctance sensor system for processing a variable reluctance sensor signal including an arming comparator and an arming circuit. The arming comparator compares the variable reluctance sensor signal with an arming threshold which decreases proportional to 1/t from a predetermined maximum level and asserts an armed signal when the variable reluctance sensor signal reaches the arming threshold. The arming threshold may be decreased based on a scaling factor multiplied by 1/t to ensure detection of each pulse of the variable reluctance sensor signal. The arming threshold may decrease to a predetermined minimum level sufficiently low to intersect the variable reluctance sensor signal and sufficiently high relative to an expected noise level. The arming threshold is reset in response to a timing event, such as zero crossing of the variable reluctance sensor signal.

Abstract: An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described.

Abstract: A variable reluctance sensor system for processing a variable reluctance sensor signal including an arming comparator and an arming circuit. The arming comparator compares the variable reluctance sensor signal with an arming threshold which decreases proportional to 1/t from a predetermined maximum level and asserts an armed signal when the variable reluctance sensor signal reaches the arming threshold. The arming threshold may be decreased based on a scaling factor multiplied by 1/t to ensure detection of each pulse of the variable reluctance sensor signal. The arming threshold may decrease to a predetermined minimum level sufficiently low to intersect the variable reluctance sensor signal and sufficiently high relative to an expected noise level. The arming threshold is reset in response to a timing event, such as zero crossing of the variable reluctance sensor signal.