Patents by Inventor William G. Bliss

William G. Bliss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5802118
    Abstract: A sampled amplitude read channel is disclosed for reading binary data from a computer disk storage system, wherein the read channel sub-samples an analog read signal at a rate lower than the baud rate and detects the binary data from the sub-sampled values using a sequence detector. In one embodiment, the sub-sampled values are interpolated to generate synchronous sample values which are processed by a conventional sequence detector. In another embodiment, the sequence detector is modified to detect the binary data directly from the sub-sampled values. In yet another embodiment, the sequence detector comprises a remodulator and an error pattern detector for detecting and correcting bit errors in the detected binary data. In addition, for the various embodiments a channel code increases the distance property of the sequence detector in order to compensate for the degradation in performance caused by sub-sampling.
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: September 1, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: William G. Bliss, David E. Reed, Richard T. Behrens
  • Patent number: 5796535
    Abstract: A sampled amplitude read channel incorporated within a magnetic disk storage system for reading data recorded in concentric tracks on a magnetic medium, where the data comprises user data sectors recorded at varying data rates across a plurality of predefined zones and embedded servo data sectors recorded at the same data rate across the zones. The sampled amplitude read channel comprises a timing recovery component for synchronous sampling of a read signal from a magnetic read head positioned over the magnetic medium, a gain control component for adjusting the amplitude of the read signal, and a DC offset component for cancelling a DC offset in the read signal. These components are dynamically configured to operate according to whether the read channel is processing user data or embedded servo data.
    Type: Grant
    Filed: May 12, 1995
    Date of Patent: August 18, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: Tyson Tuttle, Diwakar Vishakhadatta, Jerrel P. Hein, David R. Welland, David E. Reed, Richard T. Behrens, William G. Bliss, Paul M. Romano, Trent O. Dudley, Christopher P. Zook
  • Patent number: 5771127
    Abstract: In a computer disk storage system for recording binary data, a sampled amplitude read channel comprises a sampling device for asynchronously sampling pulses in an analog read signal from a read head positioned over a disk storage medium, interpolated timing recovery for generating synchronous sample values, and a sequence detector for detecting the binary data from the synchronous sample values. The sequence detector comprises a demodulator for detecting a preliminary binary sequence which may contain bit errors, a remodulator for remodulating to estimated sample values, a means for generating sample error values, an error pattern detector for detecting the bit errors, an error detection validator, and an error corrector for correcting the bit errors. The remodulator comprises a partial erasure circuit which compensates for the non-linear reduction in amplitude of a primary pulse caused by secondary pulses located near the primary pulse.
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: June 23, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: David E. Reed, William R. Foland, Jr., William G. Bliss, Richard T. Behrens, Lisa C. Sundell
  • Patent number: 5754352
    Abstract: An improved timing recovery phase-locked loop in a partial response recording channel comprising a means for generating a frequency error and a means for generating a phase error represented by a timing gradient. The frequency error is not affected by a DC offset in the input reference signal and is less susciptible to noise due to an increase in sensitivity. A state machine for generating expected samples is used to generate the timing gradient, rather than estimated signal samples, which results in a shorter acquisition preamble. When tracking arbitrary user data, the timing gradient is smoothed to reduce variations in the gain of the loop.
    Type: Grant
    Filed: August 22, 1996
    Date of Patent: May 19, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: Richard T. Behrens, Trent Dudley, William G. Bliss
  • Patent number: 5726818
    Abstract: A sampled amplitude read channel reads user data and embedded servo data stored on a magnetic medium by detecting digital data from a sequence of discrete time interpolated sample values. A write frequency synthesizer generates a write clock for writing digital data to the magnetic medium at a predetermined baud rate for a selected zone, and upon read back, a read frequency synthesizer generates a fixed sampling clock at a frequency slightly higher than the write frequency at the outer zone. A sampling device samples the analog read signal at this fixed sampling rate across the data zones and servo wedges to generate a sequence of discrete time channel samples that are not synchronized to the baud rate. Before sampling, an analog receive filter processes the read signal to attenuate aliasing noise without having to adjust its spectrum across data zones or servo wedges. A discrete time equalizing filter equalizes the channel samples according to a predetermined partial response (PR4, EPR4, EEPR4, etc.).
    Type: Grant
    Filed: December 5, 1995
    Date of Patent: March 10, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: David E. Reed, William G. Bliss
  • Patent number: 5668678
    Abstract: A discrete time servo demodulation technique incorporated within a sampled amplitude read channel to demodulate embedded servo field information stored on a magnetic medium. The servo field information is transduced by a read head into an analog signal, and converted to a sequence of sample values in the read channel. The demodulation technique is responsive to the sample values and includes a discrete time peak detector for detecting servo data, and a discrete time servo burst amplitude detector for measuring the amplitude of servo bursts. Peaks are detected in the analog read signal by sensing a change of slope from the sequence of sample values. The peaks are qualified by polarity in that a peak is detected only if its polarity is opposite in sign from the previous peak. The servo burst amplitudes are measured by interpolating, rectifying, and accumulating the sequence of sample values corresponding to the servo bursts.
    Type: Grant
    Filed: November 14, 1994
    Date of Patent: September 16, 1997
    Assignee: Cirrus Logic, Inc.
    Inventors: David E. Reed, Richard T. Beherns, William G. Bliss
  • Patent number: 5648738
    Abstract: A read channel especially suited for disk drives, the read channel having auto-zeroing and offset compensation operative with sufficient speed to allow powering-down much of the read channel electronics between servo fields when a read operation is not being executed, is disclosed. Auto-zeroing is accomplished by temporarily shorting what would have been the signal received from a pre-amplifier, and charging capacitors in feedback loops temporarily switched in-circuit in the various circuits being auto-zeroed. After auto-zeroing, any remaining offset, including that imposed by an analog-to-digital converter converting the analog read signal to digitized samples of the read signal, is removed by filtering the digitized read signal samples by a digital filter acting as a low pass filter (integrator and lossy integrator in the embodiment disclosed), and reconverting the digital output of the filter to analog form for subtraction from the input to the analog-to-digital converter.
    Type: Grant
    Filed: November 1, 1994
    Date of Patent: July 15, 1997
    Assignee: Cirrus Logic, Inc.
    Inventors: David R. Welland, William G. Bliss
  • Patent number: 5642243
    Abstract: In a synchronous read channel for magnetic recording, a timing recovery phase-locked loop (PLL) comprises an improved discrete time frequency error detector for locking the PLL to a sinusoidal reference signal. The sinusoidal reference signal is sampled, and a frequency error is computed using three sample values which span more than half a period of the reference signal. Consequently, the frequency error detector is not affected by a DC offset in the reference signal, and it is less susceptible to noise due to an increase in sensitivity.
    Type: Grant
    Filed: August 29, 1995
    Date of Patent: June 24, 1997
    Assignee: Cirrus Logic, Inc.
    Inventor: William G. Bliss
  • Patent number: 5623377
    Abstract: A filter for compensating discrete secondary pulse formations associated with a data stream of discrete main pulses produced from data read from magnetic media. The filter's impulse response comprises a center coefficient with side compensating coefficients for attenuating the secondary pulses when the input signal is convolved with the impulse response. The magnitude and delay of the compensation coefficients are programmable and are adaptively adjusted to optimize the impulse response for a given environment. In a traditional FIR embodiment, two delay lines are used to generate the two programmable delays between the center coefficient and side compensation coefficients. In the preferred embodiment, an IIR filter provides the two programmable delays using only one delay line thereby reducing the size and cost of the circuit. Also in the preferred embodiment, the data stream is interleaved into an even and odd data stream and processed in parallel by two filters in order to double the throughput.
    Type: Grant
    Filed: April 4, 1994
    Date of Patent: April 22, 1997
    Assignee: Cirrus Logic, Inc.
    Inventors: Richard T. Behrens, Neal Glover, Trent O. Dudley, Alan J. Armstrong, Christopher P. Zook, William G. Bliss
  • Patent number: 5585975
    Abstract: In a sampled amplitude magnetic read channel, pulses in an analog signal corresponding to flux transitions on a magnetic medium are sampled and equalized into a first equalization for estimating sample values and into a second equalization for sequence detection of digital data. A gain and phase error detector generate respective error signals corresponding to the difference between estimated and actual sample values. Gain control and timing recovery use the error signals to adjust the amplitude and sampling frequency/phase of the analog read signal. A pair of programmable discrete time filters equalize the signal samples into the desired equalization. In a first embodiment, the signal samples are equalized to PR4 for estimating sample values and to EPR4 for sequence detection. A slicer processes the PR4 equalized sample values to generate the estimated sample values.
    Type: Grant
    Filed: November 17, 1994
    Date of Patent: December 17, 1996
    Assignee: Cirrus Logic, Inc.
    Inventor: William G. Bliss
  • Patent number: 5563746
    Abstract: A real time defect scanning system integrated into a sampled amplitude read channel for detecting defects in a magnetic storage medium using a discrete time filter having an impulse response substantially matched to an error signature in a read back signal caused by a defect in the medium. The scanning system operates by writing a predetermined bit sequence to the storage device and detecting medium defects upon read back. In a sinusoidal read signal mode, a discrete time notch filter removes the fundamental frequency so that any remaining sidebands indicate a media defect. The discrete time defect filter enhances the signal so that a defect can be detected with a discrete time energy detector. The impulse responses of the notch filter and defect detection filter are programmable in order to adapt the defect scanning system to a particular disk drive, data density, or magnetic media.
    Type: Grant
    Filed: November 17, 1994
    Date of Patent: October 8, 1996
    Assignee: Cirrus Logic, Inc.
    Inventor: William G. Bliss