Abstract: A method is provided, the method comprising measuring at least one parameter characteristic of processing performed on a workpiece in a processing step, and modeling the at least one characteristic parameter measured using a correlation model. The method also comprises applying the correlation model to modify the processing performed in the processing step.

Abstract: A method and apparatus for controlling wafer thickness uniformity in a multi-zone vertical furnace is provided. The multi-zone furnace bakes a plurality of wafers within each zone for a first bake time. A film thickness of at least one wafer baked in each zone of the furnace is measured using a metrology tool. A film thickness optimization unit determines a deposition rate for the at least one wafer within each zone, with the deposition rate being determined as a function of the film thickness of the wafer and the first bake time. The film thickness optimization unit then determines a second bake time to bake a subsequent set of wafers, and the subsequent set of wafers is baked in the furnace for the second bake time.

Abstract: A method is provided, the method comprising measuring at least one parameter characteristic of rapid thermal processing performed on a workpiece in a rapid thermal processing step, and modeling the at least one characteristic parameter measured using a first-principles radiation model. The method also comprises applying the first-principles radiation model to modify the rapid thermal processing performed in the rapid thermal processing step.

Abstract: A method and an apparatus for controlling a deposition process in a manufacturing process. A process recipe setting step is performed. A process run of semiconductor devices is performed based upon the process recipe. Metrology data relating to the process run of semiconductor dev determination is made whether production results are within a predetermined tolerance level, based upon the metrology data. Process recipe settings are modified in response to a determination that the production results are within a predetermined tolerance level, based upon the metrology data. A processing tool is capable of receiving at least one control input parameter and a metrology data acquisition unit is interfaced with the processing tool and is capable of acquiring metrology data from the processing tool.

Abstract: A method comprising determining a polishing profile produced by a polishing tool and manufacturing a process layer with a surface profile prior to polishing operations based upon the determined polishing profile of the polishing tool.

Abstract: The present invention provides for a method and an apparatus for automatic routing of semiconductor devices within a manufacturing area. Performance of a plurality of manufacturing tools is tracked while processing semiconductor devices. At least one optimal combination of the manufacturing tools is determined based upon the tracked performance of the manufacturing tools. A queuing system is implemented to attain the optimal combination of the manufacturing tools. A dispatch system is deployed in response to the queuing system for routing the semiconductor devices within the manufacturing area.

Abstract: The present invention provides for a method and an apparatus for running metrology standard wafer routes for calibrating metrology data. A processing order for a run of semiconductor devices is determined. A metrology route based upon the processing order is determined. A metrology standard device is routed through the metrology route. Measurement data relating to the metrology standard device being routed though the metrology route is acquired. Metrology data processing upon the acquired measurement data is performed.

Abstract: A method is provided, the method comprising measuring at least one parameter characteristic of rapid thermal processing performed on a workpiece in a rapid thermal processing step, and modeling the at least one characteristic parameter measured using a first-principles radiation model. The method also comprises applying the first-principles radiation model to modify the rapid thermal processing performed in the rapid thermal processing step.

Abstract: A method is provided, the method comprising measuring at least one parameter characteristic of processing performed on a workpiece in a processing step, and modeling the at least one characteristic parameter measured using a correlation model. The method also comprises applying the correlation model to modify the processing performed in the processing step.

Abstract: A method and apparatus for controlling wafer thickness uniformity in a multi-zone vertical furnace is provided. The multi-zone furnace bakes a plurality of wafers within each zone for a first bake time. A film thickness of at least one wafer baked in each zone of the furnace is measured using a metrology tool. A film thickness optimization unit determines a deposition rate for the at least one wafer within each zone, with the deposition rate being determined as a function of the film thickness of the wafer and the first bake time. The film thickness optimization unit then determines a second bake time to bake a subsequent set of wafers, and the subsequent set of wafers is baked in the furnace for the second bake time.

Abstract: A method is provided for manufacturing, the method including processing a first workpiece in a nitride processing step and measuring a thickness of a field oxide feature formed on the first workpiece. The method also includes forming an output signal corresponding to the thickness of the field oxide feature. In addition, the method includes feeding back a control signal based on the output signal to adjust processing performed on a second workpiece in the nitride processing step to adjust a thickness of a field oxide feature formed on the second workpiece toward at least a predetermined threshold value.

Abstract: The present invention provides for a method and an apparatus for automatic routing of semiconductor devices within a manufacturing area. Performance of a plurality of manufacturing tools is tracked while processing semiconductor devices. At least one optimal combination of the manufacturing tools is determined based upon the tracked performance of the manufacturing tools. A queuing system is implemented to attain the optimal combination of the manufacturing tools. A dispatch system is deployed in response to the queuing system for routing the semiconductor devices within the manufacturing area.

Abstract: The present invention is directed to a method of controlling the width of a gate electrode based upon the etch rate of a chemical bath. In one illustrative embodiment, the method comprises determining an etching rate for a chemical bath, determining the manufactured width of the gate electrode, and varying the time duration of an etching process performed in the bath depending upon the etch rate of the bath and the width of the gate electrode.

Abstract: The present invention is directed to the field of semiconductor processing and, more particularly, to a method of planarizing or polishing process layers formed above a surface of a semiconducting substrate. In one illustrative embodiment, the method comprises determining the thickness of a process layer formed above a semiconducting substrate and determining a polishing recipe for said process layer based upon the measured thickness of said process layer.

Abstract: A method is provided, the method comprising preheating a rapid thermal processing chamber according to a preheating recipe and processing a first plurality of workpieces in the rapid thermal processing chamber. The method also comprises performing first parameter measurements on first and second workpieces of the first plurality of workpieces, the first parameter measurements indicative of first processing differences between the first and second workpieces, and forming a first output signal corresponding to the first parameter measurements. The method further comprises adjusting the preheating recipe based on the first output signal and using the adjusted preheating recipe to preheat the rapid thermal processing chamber for processing a second plurality of workpieces in the rapid thermal processing chamber to reduce second processing differences between first and second workpieces of the second plurality of workpieces.

Abstract: The present invention is directed to a method of forming conductive interconnections in an integrated circuit device. In one embodiment, the method comprises forming a dielectric stack comprised of multiple layers, and determining a thickness ratio of the layers of the stack. The method further comprises determining an etching process to be performed on the dielectric stack to define an opening for a conductive interconnection based upon the determined thickness ration, and performing the determined etch process on the dielectric stack.

Abstract: The present invention provides for a method and an apparatus for performing automated rework in a manufacturing process. A lot of semiconductor devices is processed using a first set of control input parameters. The first set of control input parameters is stored in a memory location. Process data from the processing of the lot of semiconductor devices is acquired. Errors in the process data are analyzed. At least one automated rework procedure is performed on the lot of semiconductor devices in response to the analysis of the process data.

Abstract: A system and method for controlling the manufacture of semiconductor wafers using model predictive control is provided. In accordance with one embodiment, a tool output of the manufacturing tool is determined based on a first wafer run. Using the tool output, a tool input for a subsequent wafer run is determined by minimizing an optimization equation being dependent upon a model which relates tool output to tool process state and tool process state to tool input and previous tool process state. The tool input is then provided to the manufacturing tool for processing a second wafer run. In this manner, processing by the tool or tool age is taken into account in determining the tool input for a subsequent run. This can reduce variations in tool output from run-to-run and improve the characteristics of the ultimately formed semiconductor devices.

Abstract: The present invention is directed to the field of semiconductor processing and, more particularly, to a method of planarizing or polishing process layers formed above a surface of a semiconducting substrate. In one illustrative embodiment, the method comprises determining the thickness of a process layer formed above a semiconducting substrate and determining a polishing recipe for said process layer based upon the measured thickness of said process layer.

Abstract: The present invention is directed to semiconductor processing operations, and, more particularly, chemical mechanical polishing operations. The present invention is comprised of a method for qualifying new polishing pads used in a polishing tool without the necessity of polishing test wafers.