Patents by Inventor William N. Thompson

William N. Thompson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7190610
    Abstract: An SRAM memory cell is provided having a pair of cross-coupled CMOS inverters. The sources of the pull-up transistors forming each of the CMOS inverters are coupled to VCC through parasitic resistance of the substrate in which each is formed. The source of the p-type pull-up transistor is therefore always at a potential less than or equal to the potential of the N-well such that the emitter-base junction of the parasitic PNP transistor cannot become forward biased and latch-up cannot occur.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: March 13, 2007
    Assignee: Micron Technology, Inc.
    Inventors: John D. Porter, William N. Thompson
  • Patent number: 7180386
    Abstract: A method of finding an unknown value from within a range of values is disclosed that divides the range into weighted subranges and then, beginning with an arbitrary search value within the range, performs a number of simple comparisons to determine the value for each subrange that will result in a match with the target value. This method can also detect those cases where the target value lies outside the range. In one embodiment, the method of finding an unknown value within a range of values is applied to impedance matching. In this embodiment, the output impedance of a pin on an integrated circuit is automatically matched to the impedance of the load connected to it. The output driver has a controllable impedance that can be adjusted within a specific range of impedances to match the external load impedance it is to drive.
    Type: Grant
    Filed: October 7, 2005
    Date of Patent: February 20, 2007
    Assignee: Micron Technology, Inc.
    Inventors: William N. Thompson, John D. Porter, Larren Gene Weber
  • Patent number: 7018889
    Abstract: An SRAM memory cell is provided having a pair of cross-coupled CMOS inverters. The sources of the pull-up transistors forming each of the CMOS inverters are coupled to VCC through parasitic resistance of the substrate in which each is formed. The source of the p-type pull-up transistor is therefore always at a potential less than or equal to the potential of the N-well such that the emitter-base junction of the parasitic PNP transistor cannot become forward biased and latch-up cannot occur.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: March 28, 2006
    Assignee: Micron Technology, Inc.
    Inventors: John D. Porter, William N. Thompson
  • Patent number: 6958661
    Abstract: A method of finding an unknown value from within a range of values is disclosed that divides the range into weighted subranges and then, beginning with an arbitrary search value within the range, performs a number of simple comparisons to determine the value for each subrange that will result in a match with the target value. This method can also detect those cases where the target value lies outside the range. In one embodiment, the method of finding an unknown value within a range of values is applied to impedance matching. In this embodiment, the output impedance of a pin on an integrated circuit is automatically matched to the impedance of the load connected to it. The output driver has a controllable impedance that can be adjusted within a specific range of impedances to match the external load impedance it is to drive.
    Type: Grant
    Filed: April 8, 2003
    Date of Patent: October 25, 2005
    Assignee: Micron Technology, Inc.
    Inventors: William N. Thompson, John D. Porter, Larren Gene Weber
  • Patent number: 6865628
    Abstract: Systems, data paths and methods of transferring data. By utilizing the systems, data paths, and methods, data can be transferred at a single or double rate. One embodiment of the present invention provides a system having a data unit, an output register, and a holding register. The output register is coupled to the data unit. The holding register is coupled to the data unit and the output register. Data from the data unit is passed to the output register and the holding register substantially simultaneously and data from the holding register is then passed to the output register. Data can be output from the output register.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: March 8, 2005
    Assignee: Micron Technology, Inc.
    Inventors: John D. Porter, William N. Thompson, Larren Gene Weber
  • Patent number: 6823407
    Abstract: Systems, data paths and methods of transferring data. By utilizing the systems, data paths, and methods, data can be transferred at a single or double rate. One embodiment of the present invention provides a system having a data unit, an output register, and a holding register. The output register is coupled to the data unit. The holding register is coupled to the data unit and the output register. Data from the data unit is passed to the output register and the holding register substantially simultaneously and data from the holding register is then passed to the output register. Data can be output from the output register.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: November 23, 2004
    Assignee: Micron Technology, Inc.
    Inventors: John D. Porter, William N. Thompson, Larren Gene Weber
  • Publication number: 20040223378
    Abstract: An SRAM memory cell is provided having a pair of cross-coupled CMOS inverters. The sources of the pull-up transistors forming each of the CMOS inverters are coupled to VCC through parasitic resistance of the substrate in which each is formed. The source of the p-type pull-up transistor is therefore always at a potential less than or equal to the potential of the N-well such that the emitter-base junction of the parasitic PNP transistor cannot become forward biased and latch-up cannot occur.
    Type: Application
    Filed: June 16, 2004
    Publication date: November 11, 2004
    Inventors: John D. Porter, William N. Thompson
  • Patent number: 6767784
    Abstract: An SRAM memory cell is provided having a pair of cross-coupled CMOS inverters. The sources of the pull-up transistors forming each of the CMOS inverters are coupled to VCC through parasitic resistance of the substrate in which each is formed. The source of the p-type pull-up transistor is therefore always at a potential less than or equal to the potential of the N-well such that the emitter-base junction of the parasitic PNP transistor cannot become forward biased and latch-up cannot occur.
    Type: Grant
    Filed: December 18, 2000
    Date of Patent: July 27, 2004
    Assignee: Micron Technology, Inc.
    Inventors: John D. Porter, William N. Thompson
  • Patent number: 6657512
    Abstract: A method of finding an unknown value from within a range of values is disclosed that divides the range into weighted subranges and then, beginning with an arbitrary search value within the range, performs a number of simple comparisons to determine the value for each subrange that will result in a match with the target value. This method can also detect those cases where the target value lies outside the range. In one embodiment, the method of finding an unknown value within a range of values is applied to impedance matching. In this embodiment, the output impedance of a pin on an integrated circuit is automatically matched to the impedance of the load connected to it. The output driver has a controllable impedance that can be adjusted within a specific range of impedances to match the external load impedance it is to drive.
    Type: Grant
    Filed: October 22, 2002
    Date of Patent: December 2, 2003
    Assignee: Micron Technology, Inc.
    Inventors: William N. Thompson, John D. Porter, Larren Gene Weber
  • Publication number: 20030206075
    Abstract: A method of finding an unknown value from within a range of values is disclosed that divides the range into weighted subranges and then, beginning with an arbitrary search value within the range, performs a number of simple comparisons to determine the value for each subrange that will result in a match with the target value. This method can also detect those cases where the target value lies outside the range. In one embodiment, the method of finding an unknown value within a range of values is applied to impedance matching. In this embodiment, the output impedance of a pin on an integrated circuit is automatically matched to the impedance of the load connected to it. The output driver has a controllable impedance that can be adjusted within a specific range of impedances to match the external load impedance it is to drive.
    Type: Application
    Filed: April 8, 2003
    Publication date: November 6, 2003
    Applicant: Micron Technology, Inc.
    Inventors: William N. Thompson, John D. Porter, Larren Gene Weber
  • Patent number: 6642588
    Abstract: An SRAM memory cell is provided having a pair of cross-coupled CMOS inverters. The sources of the pull-up transistors forming each of the CMOS inverters are coupled to VCC through parasitic resistance of the substrate in which each is formed. The source of the p-type pull-up transistor is therefore always at a potential less than or equal to the potential of the N-well such that the emitter-base junction of the parasitic PNP transistor cannot become forward biased and latch-up cannot occur.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: November 4, 2003
    Assignee: Micron Technology, Inc.
    Inventors: John D. Porter, William N. Thompson
  • Publication number: 20030120843
    Abstract: Systems, data paths and methods of transferring data. By utilizing the systems, data paths, and methods, data can be transferred at a single or double rate. One embodiment of the present invention provides a system having a data unit, an output register, and a holding register. The output register is coupled to the data unit. The holding register is coupled to the data unit and the output register. Data from the data unit is passed to the output register and the holding register substantially simultaneously and data from the holding register is then passed to the output register. Data can be output from the output register.
    Type: Application
    Filed: February 3, 2003
    Publication date: June 26, 2003
    Applicant: Micron Technology, Inc.
    Inventors: John D. Porter, William N. Thompson, Larren Gene Weber
  • Publication number: 20030115386
    Abstract: Systems, data paths and methods of transferring data. By utilizing the systems, data paths, and methods, data can be transferred at a single or double rate. One embodiment of the present invention provides a system having a data unit, an output register, and a holding register. The output register is coupled to the data unit. The holding register is coupled to the data unit and the output register. Data from the data unit is passed to the output register and the holding register substantially simultaneously and data from the holding register is then passed to the output register. Data can be output from the output register.
    Type: Application
    Filed: February 3, 2003
    Publication date: June 19, 2003
    Applicant: Micron Technology, Inc.
    Inventors: John D. Porter, William N. Thompson, Larren Gene Weber
  • Patent number: 6556095
    Abstract: A method of finding an unknown value from within a range of values is disclosed that divides the range into weighted subranges and then, beginning with an arbitrary search value within the range, performs a number of simple comparisons to determine the value for each subrange that will result in a match with the target value. This method can also detect those cases where the target value lies outside the range. In one embodiment, the method of finding an unknown value within a range of values is applied to impedance matching. In this embodiment, the output impedance of a pin on an integrated circuit is automatically matched to the impedance of the load connected to it. The output driver has a controllable impedance that can be adjusted within a specific range of impedances to match the external load impedance it is to drive.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: April 29, 2003
    Assignee: Micron Technology, Inc.
    Inventors: William N. Thompson, John D. Porter, Larren Gene Weber
  • Patent number: 6545560
    Abstract: A method of finding an unknown value from within a range of values is disclosed that divides the range into weighted subranges and then, beginning with an arbitrary search value within the range, performs a number of simple comparisons to determine the value for each subrange that will result in a match with the target value. This method can also detect those cases where the target value lies outside the range. In one embodiment, the method of finding an unknown value within a range of values is applied to impedance matching. In this embodiment, the output impedance of a pin on an integrated circuit is automatically matched to the impedance of the load connected to it. The output driver has a controllable impedance that can be adjusted within a specific range of impedances to match the external load impedance it is to drive.
    Type: Grant
    Filed: August 8, 2001
    Date of Patent: April 8, 2003
    Assignee: Micron Technology, Inc.
    Inventors: William N. Thompson, John D. Porter, Larren Gene Weber
  • Patent number: 6545561
    Abstract: A method of finding an unknown value from within a range of values is disclosed that divides the range into weighted subranges and then, beginning with an arbitrary search value within the range, performs a number of simple comparisons to determine the value for each subrange that will result in a match with the target value. This method can also detect those cases where the target value lies outside the range. In one embodiment, the method of finding an unknown value within a range of values is applied to impedance matching. In this embodiment, the output impedance of a pin on an integrated circuit is automatically matched to the impedance of the load connected to it. The output driver has a controllable impedance that can be adjusted within a specific range of impedances to match the external load impedance it is to drive.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: April 8, 2003
    Assignee: Micron Technology, Inc.
    Inventors: William N. Thompson, John D. Porter, Larren Gene Weber
  • Publication number: 20030052745
    Abstract: A method of finding an unknown value from within a range of values is disclosed that divides the range into weighted subranges and then, beginning with an arbitrary search value within the range, performs a number of simple comparisons to determine the value for each subrange that will result in a match with the target value. This method can also detect those cases where the target value lies outside the range. In one embodiment, the method of finding an unknown value within a range of values is applied to impedance matching. In this embodiment, the output impedance of a pin on an integrated circuit is automatically matched to the impedance of the load connected to it. The output driver has a controllable impedance that can be adjusted within a specific range of impedances to match the external load impedance it is to drive.
    Type: Application
    Filed: October 22, 2002
    Publication date: March 20, 2003
    Applicant: Micron Technology, Inc.
    Inventors: William N. Thompson, John D. Porter, Larren Gene Weber
  • Patent number: 6516363
    Abstract: Systems, data paths and methods of transferring data. By utilizing the systems, data paths, and methods, data can be transferred at a single or double rate. One embodiment of the present invention provides a system having a data unit, an output register, and a holding register. The output register is coupled to the data unit. The holding register is coupled to the data unit and the output register. Data from the data unit is passed to the output register and the holding register substantially simultaneously and data from the holding register is then passed to the output register. Data can be output from the output register.
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: February 4, 2003
    Assignee: Micron Technology, Inc.
    Inventors: John D. Porter, William N. Thompson, Larren Gene Weber
  • Patent number: 6476640
    Abstract: A buffer having first and second input terminals and an output terminal. The buffer also includes a fast edge driver having an input terminal and an output terminal, with the input terminal connected to the first input terminal of the buffer, and the output terminal connected to the output terminal of the buffer. A shielding circuit is provided having an input terminal and an output terminal, with the input terminal connected to the second input terminal of the buffer. The buffer further includes a recovery circuit having an input terminal and an output terminal, with the input terminal connected to the output terminal of the shielding circuit, and the output terminal connected to the output terminal of the buffer.
    Type: Grant
    Filed: May 7, 2001
    Date of Patent: November 5, 2002
    Assignee: Micron Technology, Inc.
    Inventors: John D. Porter, Larren G. Weber, William N. Thompson
  • Patent number: 6469591
    Abstract: A method of finding an unknown value from within a range of values is disclosed that divides the range into weighted subranges and then, beginning with an arbitrary search value within the range, performs a number of simple comparisons to determine the value for each subrange that will result in a match with the target value. This method can also detect those cases where the target value lies outside the range. In one embodiment, the method of finding an unknown value within a range of values is applied to impedance matching. In this embodiment, the output impedance of a pin on an integrated circuit is automatically matched to the impedance of the load connected to it. The output driver has a controllable impedance that can be adjusted within a specific range of impedances to match the external load impedance it is to drive.
    Type: Grant
    Filed: June 25, 2001
    Date of Patent: October 22, 2002
    Assignee: Micron Technology, Inc.
    Inventors: William N. Thompson, John D. Porter, Larren Gene Weber