Abstract: In accordance with an embodiment, a directional coupler includes a coupler circuit and at least one amplifier coupled between a coupler circuit isolated port and a directional coupler isolated port and/or between a coupler circuit coupled port and a directional coupler coupled port. In various embodiments, the directional coupler is disposed over and/or in a substrate.

Abstract: An impedance matching network includes a first terminal, a second terminal, and a reference potential terminal. The impedance matching network further includes a first shunt branch between the first terminal and the reference potential terminal, the first shunt branch including a capacitive element. The impedance matching network also includes a second shunt branch between the second terminal and the reference potential terminal, the second shunt branch including an inductive element. Furthermore, the impedance matching network includes a transmission line transformer with a first inductor path and a second inductor path, wherein the first inductor path connects the first terminal and the second terminal. An alternative impedance matching network includes a transformer and an adaptive matching network. The transformer is configured to transform an impedance connected to a first port so that a corresponding transformed impedance lies within a confined impedance region in a complex impedance plane.

Abstract: In accordance with an embodiment, a switchable capacitance circuit includes a plurality of capacitance-switch cells that each has a first semiconductor switching circuit and a capacitance circuit having a first terminal coupled to the first semiconductor switching circuit. A resistance of the first semiconductor switching circuit of a first switch-capacitance cell of the plurality of capacitance-switch cells is within a first tolerance of a resistance of the first semiconductor switching circuit of a second capacitance-switch cell of the plurality of capacitance-switch cells, and a capacitance of the capacitance circuit of the first capacitance-switch cell is within a second tolerance of a capacitance of the capacitance circuit of the second capacitance-switch cell.

Abstract: According to a first aspect embodiments provide a transistor including at least one gate region between at least one drain region and at least one source region, wherein a ratio between a width of the gate region and a length of the gate region exceeds 300.

Abstract: In accordance with an embodiment, a circuit includes a first signal path coupled between an input port and an output port, and a second coupled between the input port and the output port in parallel with the first signal path. The first signal path includes a low noise amplifier (LNA) having an input node coupled to the input port, and the second signal path includes a switch coupled between the input port and the output port.

Abstract: An impedance matching network comprises a first and a second signal terminal and a reference potential terminal. The network further comprises a first shunt branch between the first signal terminal and the reference potential terminal, the first shunt branch comprising a variable inductive element and a first capacitive element. The impedance matching network also comprises a second shunt branch between the second signal terminal and the reference potential terminal and comprising a second capacitive element. A series branch between the first signal terminal and the second signal terminal comprises a third capacitive element. Optionally, the first, second, and/or third capacitive element may be implemented as a variable capacitive element. The variable capacitive element comprises a plurality of transistors, wherein a combination of off-capacitances Coff of the transistors provide an overall capacitance of the variable capacitive element as a function of at least two independent transistor control signals.

Abstract: A high-frequency switching circuit includes a high-frequency switching transistor, wherein a high-frequency signal-path extends via a channel-path of the high-frequency switching transistor. The high-frequency switching circuit includes a control circuit and the control circuit is configured to apply at least two different bias potentials to a substrate of the high-frequency switching transistor, depending on a control signal received by the control circuit.

Abstract: In accordance with an embodiment, a circuit includes a plurality of switching networks coupled between a corresponding plurality of RF ports and a common RF port, and a control circuit. Each of the plurality of switching networks includes a first switch coupled between its corresponding RF port and the common RF port, and at least one of the plurality of switching networks includes a selectable network coupled between the first switch and the common RF port, such that the selectable network provides a DC path in a first state and a series capacitance in a second state.

Abstract: An impedance matching network includes a first terminal, a second terminal, and a reference potential terminal. The impedance matching network further includes a first shunt branch between the first terminal and the reference potential terminal, the first shunt branch including a capacitive element. The impedance matching network also includes a second shunt branch between the second terminal and the reference potential terminal, the second shunt branch including an inductive element. Furthermore, the impedance matching network includes a transmission line transformer with a first inductor path and a second inductor path, wherein the first inductor path connects the first terminal and the second terminal. An alternative impedance matching network includes a transformer and an adaptive matching network. The transformer is configured to transform an impedance connected to a first port so that a corresponding transformed impedance lies within a confined impedance region in a complex impedance plane.

Abstract: In accordance with an embodiment, a switchable capacitance circuit includes a plurality of capacitance-switch cells that each have a capacitance circuit having a capacitance between a first terminal and a second terminal of the capacitance circuit, and a semiconductor switching circuit including a first terminal coupled to the first terminal of the capacitance circuit, a plurality of series connected radio-frequency (RF) switch cells having a load path and a common node. Each of the plurality of series connected RF switch cells has a switch transistor and a gate resistor having a first end coupled to a gate of the switch transistor and a second end coupled to the common node. The switchable capacitance circuit also includes a resistance circuit having a first end coupled to the common node and a second end coupled to a control node.

Abstract: In accordance with an embodiment, a radio frequency integrated circuit (RFIC) includes an adjustable capacitance coupled to an input terminal of the RFIC, and a first single-pole multiple-throw (SPMT) radio frequency (RF) switch having an input coupled to the adjustable capacitance and a plurality of output nodes coupled to a corresponding plurality of second output terminals of the RFIC.

Abstract: An adjustable impedance matching network includes a first terminal, a second terminal, a reference potential terminal, a transmission line transformer with a first inductor path and a second inductor path. A semiconductor switching element is configured to bridge a sub-section of the first inductor path or the second inductor path to thereby adjust an inductance of the first inductor path or the second inductor path. According to an alternative embodiment, the impedance matching network includes a selector switch to selectively connect one of a plurality of inductor nodes with at least one of the first terminal and the second terminal. Further embodiments relate to an integrated circuit for adjustable impedance matching with a transmission line transformer formed by first and second inductor paths that are implemented as conductive paths at or in a substrate of the integrated circuit.

Abstract: In accordance with an embodiment, a radio frequency (RF) switching circuit includes a plurality of series connected RF switch cells having a load path and a control node, and a switch driver coupled to the control node. Each of the plurality of series connected RF switch cells includes a switch transistor and a gate resistor having a first end coupled to a gate of the switch transistor and a second end coupled to the control node. The switch driver includes a variable output impedance that varies with a voltage of the control node.

Abstract: An RF switch includes a switchable RF transistor. The switchable RF transistor includes a stripe of a plurality of adjacent RF transistor fingers and at least one non-switchable dummy transistor that is arranged at an end of the stripe of the switchable RF transistor.

Abstract: A chip includes an RF switch arrangement that has a plurality of RF switches arranged jointly on the chip. Each of the RF switches has at least one first RF connection accessible from outside the chip and one second RF connection accessible from outside the chip. Furthermore, each of the RF switches is designed to activate, in response to a driving, at least one RF path between two of its RF connections. The RF connections of different switches from among the RF switches are separated from one another in terms of radio frequency.

Abstract: In accordance with an embodiment, a circuit includes a current sensing circuit comprising a current input terminal coupled to an input port, a current output terminal coupled to a transmitted port, and a current sensing output terminal configured to provide a current sensing signal proportional to a current flowing between the current input terminal and the current output terminal. The circuit further includes a voltage sensing circuit having a voltage input terminal coupled to the transmitted port and a voltage sensing output terminal configured to provide a voltage sensing signal proportional to a voltage at the transmitted port. A combining circuit has a first input coupled to the current sensing output terminal, a second input coupled to the voltage sensing output terminal, and a combined output node coupled to an output port.

Abstract: According to a first aspect embodiments provide a transistor including at least one gate region between at least one drain region and at least one source region, wherein a ratio between a width of the gate region and a length of the gate region exceeds 300.

Abstract: A tunable capacitance circuit comprises a plurality of varactor transistors which are coupled in series. An antenna tuner comprises such a tunable capacitance circuit.

Abstract: Embodiments provide a mobile communication device comprising an adaptive filter for filtering a RF signal and a controller. The adaptive filter comprises a first terminal, a second terminal, a reference terminal for providing a reference potential, a first filter structure connected in series between the first terminal and the second terminal, a second filter structure connected in series between the first terminal and the reference terminal, and a third filter structure connected in series between the second terminal and the reference terminal, wherein at least one filter structure of the first, second and third filter structures comprises at least one switchable filter element. The controller is configured to selectively activate or deactivate the at least one switchable filter element based on the RF signal or a baseband version thereof.

Abstract: In accordance with an embodiment, a directional coupler includes a coupler circuit and at least one amplifier coupled between a coupler circuit isolated port and a directional coupler isolated port and/or between a coupler circuit coupled port and a directional coupler coupled port. In various embodiments, the directional coupler is disposed over and/or in a substrate.