Abstract: In a system and method for order-independent stream query processing, one or more input streams of data are received, and the one or more input streams are analyzed to determine data which is older than an already emitted progress indicator. The data which is older than the already emitted progress indicator is partitioned into one or more partitions, and each of the one or more partitions are independently processed using out-of-order processing techniques. A query is received, rewritten and decomposed into one or more sub-queries that produce partial results for each of the one or more partitions, where each of the one or more sub-queries correspond to a partition. A view is also produced that consolidates the partial results for each partition. The partial results are consolidated at a consolidation time specified by the query to produce final results, and the final results are provided.

Abstract: Presently disclosed is a process and system for assembly-based parametric modeling having a single design environment in which the parts, components, and assemblies thereof may be designed concurrently. In embodiments of the present invention, every assembly has a deterministic parametric history supporting both top-down and bottom-up assembly design methodologies. Top-down components may be built in place, reducing the user interaction required to define the attachment and movement characteristics of the assembly. Bottom-up components may be inserted into an assembly using a parametric Insert Component Feature. The process and system also provides the ability to parametrically define the shape of an assembly in multiple orientations that still regenerate deterministically.

Abstract: A display device and a method for manufacturing the display device are provided. The display device includes a substrate and a color filter layer. A plurality of sub-pixel electrodes are formed on the substrate. The color filter layer is configured on the substrate. The color filter layer defines a plurality of color areas corresponding to the sub-pixel electrodes. Here, each of the color areas is partially overlapped with two of the sub-pixel electrodes adjacent to each other.

Abstract: A reflective liquid crystal panel including a first substrate, a first alignment layer, a second substrate, a second alignment layer, a liquid crystal layer and a reflection layer is provided. The first alignment layer disposed on the first substrate has a first alignment direction. The second substrate is opposite to first substrate. The second alignment disposed on the second substrate has a second alignment direction, wherein an included angle between the first alignment direction and the second alignment direction is substantially between 68 degrees and 85 degrees. The liquid crystal layer is disposed between the first substrate and the second substrate. The first alignment layer and the second alignment layer align the liquid crystal so that the liquid crystal layer has a twisted angle, wherein the twisted angle and the included angle are substantially the same. The reflection layer is disposed between the second alignment layer and the second substrate.

Abstract: We disclose a new method of preparing liquid crystal alignment layers that can produce controllable pretilt angles from near 0 to near 90°. It is based on the stacking of two alignment materials sequentially, with the first one being continuous and the second one being discontinuous leaving part of the first layer exposed.

Abstract: The present invention relates to methods of detecting and monitoring aggregation of beta-amyloid peptides which are associated with neurodegenerative diseases as well as treating and/or preventing the neurodegenerative diseases by using carbazole-based fluorophores. In particular, the present invention provides methods for labeling and imaging the beta-amyloid (A?) peptides, oligomers, and fibrils in vitro and/or in vivo, as well as treating and/or preventing Alzheimer's disease by using the carbazole-based fluorophores of the present invention.

Abstract: A display device and a method for manufacturing the display device are provided. The display device includes a substrate and a color filter layer. A plurality of sub-pixel electrodes are formed on the substrate. The color filter layer is configured on the substrate. The color filter layer defines a plurality of color areas corresponding to the sub-pixel electrodes. Here, each of the color areas is partially overlapped with two of the sub-pixel electrodes adjacent to each other.

Abstract: A light-emitting diode (LED) package including a substrate, an LED chip, a polarizer, and a supporter is provided. The LED chip is disposed on the substrate. The polarizer is disposed above the LED chip. The supporter is disposed on the substrate for supporting the polarizer.

Abstract: A method of producing spatially varying pretilt angles across a liquid crystal cell coats a substrate with a polyimide alignment layer and a layer of photoalignment material on top of the polyimide layer. An applied beam with variable light dosage spatial or temporal profiles is then used to achieve a corresponding pretilt angle distribution.

Abstract: A system for implementing a non-volatile input/output (I/O) device based memory can include an interface configured to receive a processor request specifying a data unit. The data unit can be specified by a processor address. The system can include an address-data converter coupled to the interface. The address-data converter can be configured to correlate the processor address of the data unit to a data block within the non-volatile I/O device. The system further can include an I/O controller coupled to the address-data converter. The I/O controller can be configured to issue a non-volatile I/O device command specifying the data block to the non-volatile I/O device.

Abstract: A hardwired core is embedded in an integrated circuit having programmable circuitry. The hardwired core has a microprocessor; a crossbar interconnect coupled to processor local buses of the microprocessor; and a memory controller interface coupled to the crossbar interconnect. The crossbar interconnect provides pipelines for coupling the hardwired core to the programmable circuitry. The microprocessor, the crossbar interconnect, and the memory controller interface are all capable of operating at a first frequency of operation, and the memory controller interface is further capable of being set to operate at a second frequency of operation having an integer ratio with respect to the first frequency of operation. The crossbar interconnect is configured to direct transactions initiated by the microprocessor to the memory controller interface for accessing one or more memory devices coupled to the memory controller interface via a memory controller.

Abstract: A color filter arrangement for a display panel is provided. The display panel includes a first pixel and a second pixel. The first pixel includes a plurality of first sub-pixels with different colors. The second pixel includes a plurality of second sub-pixels with different colors. A first edge sub-pixel of the first sub-pixels is adjacent to (neighbor on) a second edge sub-pixel of the second sub-pixels. The first edge sub-pixel and the second edge sub-pixel have a same color.

Abstract: A structure of a reflective display panel including a silicon substrate, a liquid crystal layer and a stacked compensation film layer is provided. The liquid crystal layer disposed on the silicon substrate has a first phase retardation which is within a first retardation range. The stacked compensation film layer disposed on the liquid crystal layer has a second phase retardation which is within a second retardation range. The stacked compensation film layer is selected according to an optical characteristic of the liquid crystal layer so as to increase a contrast of the reflective display panel.

Abstract: An embodiment of a system for implementing parallel usage of a plurality of non-volatile input/output (I/O) devices can include an interface configured to receive, from a source, a source request and a first memory coupled to the interface. The first memory can be configured to store a data unit specified by the source request. The system can include an I/O device controller coupled to the interface. The I/O device controller can be configured to correlate the source request with a plurality of I/O device requests and initiate sending of the plurality of I/O device requests to the plurality of non-volatile I/O devices in parallel. The system also can include a decoder coupled to the first memory and the I/O device controller. The decoder can be configured to receive data from the plurality of non-volatile I/O devices in parallel.

Abstract: A method for driving a reflective LCD panel is provided. The driving method includes following steps: the reflective LCD panel is driven by a driving signal with alternate positive and negative polarities, wherein the driving signal has positive polarity for a first driving duration and the driving signal has negative polarity for a second driving duration; a color beam is provided to irradiate the reflective LCD panel during a partial time period of the first driving duration; and the color beam is provided to irradiate the reflective LCD panel during a partial time period of the second driving duration.

Abstract: A display and a real-time automatic white balance method thereof are provided. The display includes a first color light source and a second color light source. The real-time automatic white balance method includes following steps. A first target luminance of the first color light source and a second target luminance of the second color light source are provided. A luminance of the first color light source is detected to obtain a first current luminance. A second current luminance of the second color light source is calculated according to a ratio of the first target luminance to the first current luminance and the second target luminance. A luminance of the second color light source is adjusted according to the second current luminance.

Abstract: In a system and method for order-independent stream query processing, one or more input streams of data are received, and the one or more input streams are analyzed to determine data which is older than an already emitted progress indicator. The data which is older than the already emitted progress indicator is partitioned into one or more partitions, and each of the one or more partitions are independently processed using out-of-order processing techniques. A query is received, rewritten and decomposed into one or more sub-queries that produce partial results for each of the one or more partitions, where each of the one or more sub-queries correspond to a partition. A view is also produced that consolidates the partial results for each partition. The partial results are consolidated at a consolidation time specified by the query to produce final results, and the final results are provided.

Abstract: A processor local bus bridge for a processor block ASIC core for embedding in an IC is described. A core logic-to-core logic bridge includes a slave processor local bus interface, a crossbar switch coupled to the slave processor local bus interface and a master processor local bus interface coupled to the crossbar switch. The slave processor local bus interface and the master processor local bus interface are coupled to one another via the crossbar switch for bidirectional communication between a first and a second portion of core logic. The bridge provides rate adaptation for bridging for use of a frequency of operation associated with the crossbar switch which has substantially greater frequencies of operation than those associated with the core logic sides of the master and slave processor local bus interfaces.

Abstract: A method of bridging a plurality of buses within a bus bridge can include determining whether a queue of the bus bridge includes a transaction request directed to a restricted address range and, for each received transaction request, determining whether an address to which the transaction request is directed is within the restricted address range. Each transaction request received by the bus bridge can be selectively rejected according to whether the address to which the transaction request is directed is within the restricted address range and whether the queue includes a transaction request directed to the restricted address range.

Abstract: A reflective liquid crystal panel including a first substrate, a first alignment layer, a second substrate, a second alignment layer, a liquid crystal layer and a reflection layer is provided. The first alignment layer disposed on the first substrate has a first alignment direction. The second substrate is opposite to first substrate. The second alignment disposed on the second substrate has a second alignment direction, wherein an included angle between the first alignment direction and the second alignment direction is substantially between 68 degrees and 85 degrees. The liquid crystal layer is disposed between the first substrate and the second substrate. The first alignment layer and the second alignment layer align the liquid crystal so that the liquid crystal layer has a twisted angle, wherein the twisted angle and the included angle are substantially the same. The reflection layer is disposed between the second alignment layer and the second substrate.