Patents by Inventor Woo-young Park

Woo-young Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180314417
    Abstract: An electronic device is provided. The electronic device includes a housing, a touch screen display that includes a first edge and a second edge, a microphone, at least one speaker, a wireless communication circuit, a memory, and a processor operably connected with the touch screen display, the microphone, the at least one speaker, the wireless communication circuit, and the memory. The processor is configured to output a home screen including a plurality of application icons in a matrix pattern. The processor is configured receive an input from the first edge to the second edge. The processor is configured output a user interface on the touch screen display that includes a button that allows user to call a first operation and a plurality of cards. To call the first operation the processor is configured to receive a user input, transmit data and receive a response, and perform a task.
    Type: Application
    Filed: April 30, 2018
    Publication date: November 1, 2018
    Inventors: Young Seok LIM, Hong Seok KWON, Ho Min MOON, Mi Jung PARK, Woo Young PARK, Ki Hyoung SON, Won Ick AHN, Pil Seung YANG, Jae Seok YOON, Gi Soo LEE, Sun Jung LEE, Jae Hyeok LEE, Hyun Yeul LEE, Hyeon Cheon JO, Doo Soon CHOI, Kyung Wha HONG, Da Som LEE, Yong Joon JEON
  • Publication number: 20180056560
    Abstract: A resin composition useful for making an inside door handle with a skin-core structure made by using co-injection, an inside door handle manufactured using the resin composition, and a method for manufacturing such a door handle are provided herein.
    Type: Application
    Filed: December 13, 2016
    Publication date: March 1, 2018
    Applicants: Hyundai Motor Company, Kia Motors Corporation, LG CHEM, LTD.
    Inventors: Jae Sik SEO, Sung Ho YOON, Woo Chul JUNG, Jeong Moo LEE, Cheol Hwan HWANG, Woo Young PARK, Dong Chul SHIM
  • Patent number: 9741044
    Abstract: The demand response system comprises an automatic meter reading (AMR) unit to generate metering information. The demand response system comprises a multiple utility complex unit (MUC) which provides DR information based on the metering information and manages utility supply schedule in combination. The demand response system comprises an eco index (EI) calculation unit which calculates an eco index based on the metering information. The demand response system comprises a demand response (DR) unit which obtains the CBL information based on the metering information and computes a the DR bill by using the CBL data, the DR information and EI obtained, and outputs the DR bill. The demand response system comprises a smart portal (SP) unit which provides users with the calculated DR bill. According to the disclosure, the demand response system can provide environmental and social information, in addition to economic information.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: August 22, 2017
    Assignee: SK TELECOM CO., LTD.
    Inventors: Kyoung Min Park, Ji Young Park, Woo Young Park, Tae Hun Kim
  • Patent number: 9732424
    Abstract: Provided are a gas injection device and substrate processing apparatus using the same. The gas injection device includes a plurality of gas injection units disposed above a substrate support part rotatably disposed within a chamber to support a plurality of substrates, the plurality of gas injection units being disposed along a circumference direction with respect to a center point of the substrate support part to inject a process gas onto the substrates. Wherein each of the plurality of gas injection units includes a top plate in which an inlet configured to introduce the process gas is provided and an injection plate disposed under the top plate to define a gas diffusion space between the injection plate and the top plate along a radius direction of the substrate support part, the injection plate having a plurality of gas injection holes under the gas diffusion space to inject the process gas introduced through the inlet and diffused in the gas diffusion space onto the substrate.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: August 15, 2017
    Assignee: WONIK IPS CO., LTD.
    Inventors: Jung-Hwan Lee, Woo-Young Park, Tae-Ho Hahm
  • Patent number: 9431402
    Abstract: A method for fabricating a semiconductor device includes: forming an insulation layer over a semiconductor substrate; forming a first conductive layer over the insulation layer; forming a plurality of buried bit lines and insulation layer patterns isolated by a plurality of trenches, wherein the plurality of trenches are formed by etching the first conductive layer and the insulation layer; forming a sacrificial layer to gap-fill the trenches; forming a second conductive layer over the buried bit lines and the sacrificial layer; and forming a plurality of pillars over each of the buried bit lines by etching the second conductive layer.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: August 30, 2016
    Assignee: Hynix Semiconductor Inc.
    Inventors: Yun-Hyuck Ji, Kwan-Woo Do, Beom-Yong Kim, Seung-Mi Lee, Woo-Young Park
  • Publication number: 20150325789
    Abstract: Disclosed herein are a variable resistance memory device and a method of fabricating the same. The variable resistance memory device may include a first electrode; a second electrode; and a variable resistance layer configured to be interposed between the first electrode and the second electrode, wherein the variable resistance layer includes a Si-added metal oxide.
    Type: Application
    Filed: July 21, 2015
    Publication date: November 12, 2015
    Inventors: Woo-Young PARK, Kwon HONG, Kee-Jeung LEE, Beom-Yong KIM
  • Patent number: 9159768
    Abstract: A semiconductor device includes: a vertical electrode provided over a substrate; a variable resistance layer provided at least a sidewall of the vertical electrode; a plurality of horizontal electrodes extending from the sidewall of the vertical electrode and having the variable resistance layer interposed; a transition metal oxide layer provided (i) between the vertical electrode and the variable resistance layer or (ii) between the plurality of horizontal electrodes and the variable resistance layer; and a threshold voltage switching layer provided in the transition metal oxide layer and selectively between the vertical electrode and the any of the plurality of horizontal electrodes.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: October 13, 2015
    Assignee: SK Hynix Inc.
    Inventors: Moon-Sig Joo, Woo-Young Park
  • Patent number: 9153586
    Abstract: A semiconductor device includes a substrate including a first region and a second region, a gate dielectric layer formed on the substrate, and a metal electrode layer formed on the gate dielectric layer and including a compound of carbon and nitrogen, wherein a metal electrode formed from the metal electrode layer in the first region has a work function lower than a work function of a metal electrode formed from the metal electrode layer in the second region and a nitrogen concentration of the metal electrode of the first region is smaller than a nitrogen concentration of the metal electrode of the second region.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: October 6, 2015
    Assignee: SK Hynix Inc.
    Inventors: Yun-Hyuck Ji, Woo-Young Park
  • Publication number: 20150263119
    Abstract: A semiconductor device includes a gate stacked structure including a gate dielectric layer over a semiconductor substrate, a metal layer formed over the gate dielectric layer, and a capping layer formed over the metal layer, where the capping layer includes a chemical element with a higher concentration at an interface between the capping layer and the metal layer than another region of the capping layer and the chemical element is operable to control an effective work function (eWF) of the gate stacked structure.
    Type: Application
    Filed: May 26, 2015
    Publication date: September 17, 2015
    Inventors: Woo-Young PARK, Kee-Jeung LEE, Yun-Hyuck JI, Seung-Mi LEE
  • Patent number: 9034747
    Abstract: A semiconductor device includes a gate insulation layer formed over a substrate and having a high dielectric constant, a gate electrode formed over the gate insulation layer and a work function control layer formed between the substrate and the gate insulation layer and inducing a work function shift of the gate electrode.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: May 19, 2015
    Assignee: SK Hynix Inc.
    Inventors: Yun-Hyuck Ji, Tae-Yoon Kim, Seung-Mi Lee, Woo-Young Park
  • Patent number: 8962437
    Abstract: A method for fabricating a capacitor includes: forming a first silicon layer over a semiconductor substrate, where the first silicon layer is doped with a dopant; forming an undoped second silicon layer over the first silicon layer; forming an opening by etching the second silicon layer and the first silicon layer; forming a storage node in the opening; and removing the first silicon layer and the second silicon layer.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: February 24, 2015
    Assignee: SK Hynix Inc.
    Inventors: Beom-Yong Kim, Kee-Jeung Lee, Yun-Hyuck Ji, Seung-Mi Lee, Jae-Hyoung Koo, Kwan-Woo Do, Kyung-Woong Park, Ji-Hoon Ahn, Woo-Young Park
  • Publication number: 20150028424
    Abstract: A semiconductor device includes a substrate including a first region and a second region, a gate dielectric layer formed on the substrate, and a metal electrode layer formed on the gate dielectric layer and including a compound of carbon and nitrogen, wherein a metal electrode formed from the metal electrode layer in the first region has a work function lower than a work function of a metal electrode formed from the metal electrode layer in the second region and a nitrogen concentration of the metal electrode of the first region is smaller than a nitrogen concentration of the metal electrode of the second region.
    Type: Application
    Filed: October 15, 2014
    Publication date: January 29, 2015
    Inventors: Yun-Hyuck JI, Woo-Young PARK
  • Patent number: 8921214
    Abstract: A method for fabricating a variable resistance memory device includes forming an oxygen-deficient first metal oxide layer over a first electrode, forming an oxygen-rich second metal oxide layer over the first metal oxide layer, treating the first and second metal oxide layers with hydrogen-containing plasma, forming an oxygen-rich third metal oxide layer, and forming a second electrode over the third metal oxide layer.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 30, 2014
    Assignee: SK Hynix Inc.
    Inventors: Kee-Jeung Lee, Beom-Yong Kim, Wan-Gee Kim, Woo-Young Park
  • Patent number: 8889515
    Abstract: A semiconductor device includes a substrate including a first region and a second region, a gate dielectric layer formed on the substrate, and a metal electrode layer formed on the gate dielectric layer and including a compound of carbon and nitrogen, wherein a metal electrode formed from the metal electrode layer in the first region has a work function lower than a work function of a metal electrode formed from the metal electrode layer in the second region and a nitrogen concentration of the metal electrode of the first region is smaller than a nitrogen concentration of the metal electrode of the second region.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: November 18, 2014
    Assignee: SK Hynix Inc.
    Inventors: Yun-Hyuck Ji, Woo-Young Park
  • Publication number: 20140268995
    Abstract: A semiconductor device includes: a vertical electrode provided over a substrate; a variable resistance layer provided at least a sidewall of the vertical electrode; a plurality of horizontal electrodes extending from the sidewall of the vertical electrode and having the variable resistance layer interposed; a transition metal oxide layer provided (i) between the vertical electrode and the variable resistance layer or (ii) between the plurality of horizontal electrodes and the variable resistance layer; and a threshold voltage switching layer provided in the transition metal oxide layer and selectively between the vertical electrode and the any of the plurality of horizontal electrodes.
    Type: Application
    Filed: July 18, 2013
    Publication date: September 18, 2014
    Inventors: Moon-Sig JOO, Woo-Young PARK
  • Publication number: 20140170830
    Abstract: A method for fabricating a variable resistance memory device includes forming an oxygen-deficient first metal oxide layer over a first electrode, forming an oxygen-rich second metal oxide layer over the first metal oxide layer, treating the first and second metal oxide layers with hydrogen-containing plasma, forming an oxygen-rich third metal oxide layer, and forming a second electrode over the third metal oxide layer.
    Type: Application
    Filed: March 15, 2013
    Publication date: June 19, 2014
    Applicant: SK HYNIX INC.
    Inventors: Kee-Jeung LEE, Beom-Yong KIM, Wan-Gee KIM, Woo-Young PARK
  • Publication number: 20140162448
    Abstract: A semiconductor device includes a gate insulation layer formed over a substrate and having a high dielectric constant, a gate electrode formed over the gate insulation layer and a work function control layer formed between the substrate and the gate insulation layer and inducing a work function shift of the gate electrode.
    Type: Application
    Filed: February 14, 2014
    Publication date: June 12, 2014
    Applicant: SK hynix Inc.
    Inventors: Yun-Hyuck JI, Tae-Yoon KIM, Seung-Mi LEE, Woo-Young PARK
  • Publication number: 20140103283
    Abstract: Disclosed herein are a variable resistance memory device and a method of fabricating the same. The variable resistance memory device may include a first electrode; a second electrode; and a variable resistance layer configured to be interposed between the first electrode and the second electrode, wherein the variable resistance layer includes a Si-added metal oxide.
    Type: Application
    Filed: March 18, 2013
    Publication date: April 17, 2014
    Applicant: SK HYNIX INC.
    Inventors: Woo-Young PARK, Kwon HONG, Kee-Jeung LEE, Beom-Yong KIM
  • Publication number: 20140097397
    Abstract: A resistive memory device includes a first electrode layer, a second electrode layer, and a first variable resistive layer and a second variable resistive layer stacked at least once between the first electrode layer and the second electrode layer. The first variable resistive material layer may include a metal nitride layer having a resistivity higher than that of the first electrode layer or the second electrode layer and less than or equal to that of an insulating material.
    Type: Application
    Filed: March 15, 2013
    Publication date: April 10, 2014
    Applicant: SK HYNIX INC.
    Inventors: Woo Young PARK, Kee Jeung LEE, Beom Yong KIM
  • Patent number: 8653611
    Abstract: A semiconductor device includes a gate insulation layer formed over a substrate and having a high dielectric constant, a gate electrode formed over the gate insulation layer and a work function control layer formed between the substrate and the gate insulation layer and inducing a work function shift of the gate electrode.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: February 18, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Yun-Hyuck Ji, Tae-Yoon Kim, Seung-Mi Lee, Woo-Young Park