Patents by Inventor Wu Chou

Wu Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11346764
    Abstract: The present invention is related to correct the errors in instruments, operation, and others using intelligent monitoring structures and machine learning, and others.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: May 31, 2022
    Assignee: Essenlix Corporation
    Inventors: Stephen Chou, Wei Ding, Wu Chou, Jun Tian, Yuecheng Zhang, Mingquan Wu, Xing Li
  • Patent number: 11342272
    Abstract: A substrate structure, a method for manufacturing the same and a semiconductor package structure including the same are provided. The substrate structure includes a substrate, a first electronic component, a second electronic component and a plurality of metal layers. The first electronic component is disposed within the substrate. The second electronic component is disposed within the substrate and arranged in a horizontal direction with the first electronic component. The metal layers are disposed above an upper surface of the substrate. The number of metal layers above the first electronic component is greater than the number of metal layers above the second electronic component.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: May 24, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wu Chou Hsu, Min-Yao Chen
  • Publication number: 20220157745
    Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate, and the electronic component includes a magnetic layer and a conductive wire. The conductive wire includes a first section embedded in the magnetic layer, and a second section connected to the first section and thinner than the first section. A first upper surface of the first section is covered by the magnetic layer, a second upper surface of the second section is lower than the first upper surface, and the magnetic layer includes a first recess disposed in the upper surface and exposing the second upper surface of the second section. The first conductive trace is in the first recess and electrically connected to the second upper surface of the second section of the conductive wire.
    Type: Application
    Filed: January 31, 2022
    Publication date: May 19, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Chih-Cheng LEE, Min-Yao CHEN, Hsing Kuo TIEN
  • Patent number: 11335650
    Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate. The electronic component includes a conductive wire comprising an alignment mark section and a connection section, and a magnetic layer partially covering the conductive wire. The magnetic layer includes an alignment window disposed in an upper surface of the magnetic layer and exposing a first upper surface of the alignment mark section, and a recess disposed in the upper surface of the magnetic layer and exposing a second upper surface of the connection section. The conductive trace is in the recess and electrically connected to the second upper surface of the connection section of the conductive wire.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: May 17, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wu Chou Hsu, Chih-Cheng Lee, Min-Yao Chen, Hsing Kuo Tien
  • Publication number: 20220144615
    Abstract: A material dispensing device, a material output volume detecting device, and a related damper device for use in an automated beverage preparation apparatus are disclosed. The material output volume detecting device includes: a damper device arranged to operably buffer liquid material flowing therethrough; and a flowmeter arranged to operably measure the flow of liquid material outputted from the damper device. The damper device includes: a damper base having a material entrance hole, a material exit hole, and a material buffer chamber positioned between the material entrance hole and the material exit hole; a diaphragm covered on the material buffer chamber; and a fastening element positioned on the diaphragm and having a hollow portion. When the volume of liquid material within the material buffer chamber exceeds a predetermined amount, the diaphragm deforms to protrude outward, so that a part of the diaphragm enters the hollow portion of the fastening element.
    Type: Application
    Filed: March 31, 2021
    Publication date: May 12, 2022
    Applicant: Botrista Technology, Inc.
    Inventors: Wu-Chou KUO, Yu-Min LEE, Jia-Hui CHEN, Yen-Jui SU
  • Publication number: 20220144617
    Abstract: A dual-mode fluid connector includes: a hollow connecting element, comprising a chamber inside the hollow connecting element; a material tube, positioned on the hollow connecting element and connected through the camber; a cleaning tube, positioned on the hollow connecting element and connected through the camber; a head portion, positioned on one terminal of the hollow connecting element and having a connecting opening, wherein the connecting opening can be detachably connected to a material container; a rear portion, positioned on another terminal of the hollow connecting element and having a through hole; and a rod, inserted into the chamber via the through hole.
    Type: Application
    Filed: September 7, 2021
    Publication date: May 12, 2022
    Applicant: Botrista Technology, Inc.
    Inventors: Yu-Min LEE, Wu-Chou KUO
  • Publication number: 20220148177
    Abstract: Among other things, the present invention provides devices and methods that stain a sample simply (e.g. one step) and quickly (e.g. <60 seconds), image it without wash, and generate, by a machine learning algorithm, a final image similar to a standard staining with wash.
    Type: Application
    Filed: June 2, 2020
    Publication date: May 12, 2022
    Applicant: Essenlix Corporation
    Inventors: Wu Chou, Hongbing Li, Susan Y. Sun, Xing Li, Wei Ding, Stephen Y. Chou
  • Publication number: 20220095462
    Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.
    Type: Application
    Filed: September 18, 2020
    Publication date: March 24, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Hsing Kuo TIEN, Chih-Cheng LEE, Min-Yao CHEN
  • Publication number: 20220039591
    Abstract: An automatic cooking machine includes: an upper portion provided with a connection port thereon; a control interface arranged to operably generate control commands based on a user's manipulations to control operation of the automatic cooking machine; a base; a heater arranged on the base; a supporting portion coupled between the upper portion and the base, and arranged to support the upper portion; a hopper for receiving materials and having a hollow feeding tube, wherein the feeding tube is detachably inserted into the connection port; a cooking pot capable of being heated on the heater; and a strainer capable of being placed in the cooking pot and receiving materials. The automatic cooking machine further comprises: a blender, comprising: two cantilever arms, multiple blending arms, a ring-shaped flange, and a positioning pillar.
    Type: Application
    Filed: October 20, 2021
    Publication date: February 10, 2022
    Applicant: Botrista Technology, Inc.
    Inventors: Wu-Chou KUO, Hao-Che HSU, Yu-Min LEE
  • Publication number: 20220044074
    Abstract: The present disclosure relates to devices, apparatus and methods of improving the accuracy of image-based assay, that uses imaging system having uncertainties or deviations (imperfection) compared with an ideal imaging system. One aspect of the present invention is to add the monitoring marks on the sample holder, with at least one of their geometric and/optical properties of the monitoring marks under predetermined and known, and taking images of the sample with the monitoring marks, and train a machine learning model using the images with the monitoring mark.
    Type: Application
    Filed: November 25, 2020
    Publication date: February 10, 2022
    Applicant: Essenlix Corporation
    Inventors: Xing Li, Wu CHOU, Stephen Y. CHOU, Wei DING
  • Publication number: 20220031117
    Abstract: An automatic cooking machine includes: an upper portion provided with a connection port thereon; a control interface arranged to operably generate control commands based on a user's manipulations to control operation of the automatic cooking machine; a base; a heater arranged on the base; a supporting portion coupled between the upper portion and the base, and arranged to support the upper portion; a hopper for receiving materials and having a hollow feeding tube, wherein the feeding tube is detachably inserted into the connection port; a cooking pot capable of being heated on the heater; a strainer capable of being placed in the cooking pot and receiving materials; a water outlet connector; an inlet valve, arranged to operably control timing of outputting cold water or hot water from the water outlet connector; and a drain valve, arranged to operably control timing of draining the liquid from the cooking pot.
    Type: Application
    Filed: October 20, 2021
    Publication date: February 3, 2022
    Applicant: Botrista Technology, Inc.
    Inventors: Wu-Chou KUO, Hao-Che HSU, Yu-Min LEE
  • Patent number: 11239184
    Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate, and the electronic component includes a magnetic layer and a conductive wire. The conductive wire includes a first section embedded in the magnetic layer, and a second section connected to the first section and thinner than the first section. A first upper surface of the first section is covered by the magnetic layer, a second upper surface of the second section is lower than the first upper surface, and the magnetic layer includes a first recess disposed in the upper surface and exposing the second upper surface of the second section. The first conductive trace is in the first recess and electrically connected to the second upper surface of the second section of the conductive wire.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: February 1, 2022
    Assignee: ADVANCED SEMICONDUTOR ENGINEERING, INC.
    Inventors: Wu Chou Hsu, Chih-Cheng Lee, Min-Yao Chen, Hsing Kuo Tien
  • Publication number: 20210391283
    Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate, and the electronic component includes a magnetic layer and a conductive wire. The conductive wire includes a first section embedded in the magnetic layer, and a second section connected to the first section and thinner than the first section. A first upper surface of the first section is covered by the magnetic layer, a second upper surface of the second section is lower than the first upper surface, and the magnetic layer includes a first recess disposed in the upper surface and exposing the second upper surface of the second section. The first conductive trace is in the first recess and electrically connected to the second upper surface of the second section of the conductive wire.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 16, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Chih-Cheng LEE, Min-Yao CHEN, Hsing Kuo TIEN
  • Publication number: 20210391271
    Abstract: A substrate structure, a method for manufacturing the same and a semiconductor package structure including the same are provided. The substrate structure includes a substrate, a first electronic component, a second electronic component and a plurality of metal layers. The first electronic component is disposed within the substrate. The second electronic component is disposed within the substrate and arranged in a horizontal direction with the first electronic component. The metal layers are disposed above an upper surface of the substrate. The number of metal layers above the first electronic component is greater than the number of metal layers above the second electronic component.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 16, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Min-Yao CHEN
  • Publication number: 20210391284
    Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate. The electronic component includes a conductive wire comprising an alignment mark section and a connection section, and a magnetic layer partially covering the conductive wire. The magnetic layer includes an alignment window disposed in an upper surface of the magnetic layer and exposing a first upper surface of the alignment mark section, and a recess disposed in the upper surface of the magnetic layer and exposing a second upper surface of the connection section. The conductive trace is in the recess and electrically connected to the second upper surface of the connection section of the conductive wire.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 16, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Chih-Cheng LEE, Min-Yao CHEN, Hsing Kuo TIEN
  • Patent number: D944580
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: March 1, 2022
    Assignee: BOTRISTA TECHNOLOGY, INC.
    Inventors: Yu-Min Lee, Carl Johan Uno Hagerling, Wu-Chou Kuo
  • Patent number: D949904
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: April 26, 2022
    Assignee: BOTRISTA TECHNOLOGY, INC.
    Inventors: Hao-Che Hsu, Wu-Chou Kuo, Carl Johan Uno Hagerling, Sung-Hua Hsieh
  • Patent number: D959465
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: August 2, 2022
    Assignee: BOTRISTA TECHNOLOGY, INC.
    Inventors: Hao-Che Hsu, Wu-Chou Kuo, Carl Johan Uno Hagerling, Sung-Hua Hsieh
  • Patent number: D959480
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: August 2, 2022
    Assignee: BOTRISTA TECHNOLOGY, INC.
    Inventors: Hao-Che Hsu, Wu-Chou Kuo, Carl Johan Uno Hagerling, Sung-Hua Hsieh
  • Patent number: D959481
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: August 2, 2022
    Assignee: BOTRISTA TECHNOLOGY, INC.
    Inventors: Hao-Che Hsu, Wu-Chou Kuo, Carl Johan Uno Hagerling, Sung-Hua Hsieh