Patents by Inventor Xiaofeng Fan

Xiaofeng Fan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160088250
    Abstract: Pixel array with shared pixels in a single column and associated devices, systems, and methods are disclosed herein. In one embodiment, a pixel array includes a floating diffusion region, a source a source follower transistor having a gate coupled to the floating diffusion region, a plurality of first pixels associated with a first color, and a plurality of second pixels associated with a second color different than the first color and arranged in a single column with the first pixels. The first and second pixels are configured to transfer charge to the floating diffusion region.
    Type: Application
    Filed: December 7, 2015
    Publication date: March 24, 2016
    Inventors: Zhiping Yin, Xiaofeng Fan, Xiangli Li
  • Patent number: 9293500
    Abstract: A method of operating an image sensor. Charge accumulated in a photodiode during a first sub-exposure may be selectively stored in a storage node responsive to a first control signal. Charge accumulated in the photodiode during a first reset period may be selectively discarded responsive to a second control signal. Charge accumulated in the photodiode during a second sub-exposure may be selectively stored responsive to the first control signal. Charge stored in the storage node from the first and second sub-exposures may be transferred to a floating diffusion node responsive to a third control signal.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: March 22, 2016
    Assignee: Apple Inc.
    Inventors: Anup K. Sharma, Xiaofeng Fan, Xiangli Li, Chung Chun Wan, Chiajen Lee, Terry L. Gilton
  • Publication number: 20160056147
    Abstract: In an embodiment, an ESD protection circuit may include a silicon-controlled rectifier (SCR) and a diode sharing a PN junction and forming a bi-directional ESD circuit. The single PN junction may reduce the capacitive load on the pin, which may allow the high speed circuit to meet its performance goals. In an embodiment, a floating P-well contact may be placed between two neighboring SCRs, to control triggering of the SCRs.
    Type: Application
    Filed: April 13, 2015
    Publication date: February 25, 2016
    Inventors: Junjun Li, Xin Yi Zhang, Xiaofeng Fan
  • Publication number: 20160056146
    Abstract: In an embodiment, an ESD protection circuit may include an STI-bound SCR and a gated SCR that may be electrically in parallel with the STI-bound SCR. The gated SCR may be perpendicular to the STI-bound SCR in a plane of the semiconductor substrate. In an embodiment, the gated SCR may trigger more quickly and turn on more quickly than the STI-bound SCR. The STI-bound SCR may form the main current path for an ESD event. A low capacitive load with rapid response to ESD events may thus be formed. In an embodiment, the anode of the two SCRs may be shared.
    Type: Application
    Filed: April 13, 2015
    Publication date: February 25, 2016
    Inventors: Junjun Li, Xin Yi Zhang, Xiaofeng Fan
  • Publication number: 20160050379
    Abstract: An optical system can include a curved light sensor and an optical system positioned in front of the curved light sensor. The curved light sensor includes a substrate and a patterned stress film formed over at least surface of the substrate.
    Type: Application
    Filed: August 18, 2014
    Publication date: February 18, 2016
    Inventors: Tongbi T. Jiang, Xiaofeng Fan
  • Publication number: 20160043126
    Abstract: A vertically stacked image sensor having a photodiode chip and a transistor array chip. The photodiode chip includes at least one photodiode and a transfer gate extends vertically from a top surface of the photodiode chip. The image sensor further includes a transistor array chip stacked on top of the photodiode chip. The transistor array chip includes the control circuitry and storage nodes. The image sensor further includes a logic chip vertically stacked on the transistor array chip. The transfer gate communicates data from the at least one photodiode to the transistor array chip and the logic chip selectively activates the vertical transfer gate, the reset gate, the source follower gate, and the row select gate.
    Type: Application
    Filed: October 17, 2015
    Publication date: February 11, 2016
    Inventor: Xiaofeng Fan
  • Publication number: 20160042539
    Abstract: Embodiments of the invention provide a multimedia reading control device, a graph acquisition device, an electronic equipment, a graph supply device and a method thereof, wherein the multimedia control device includes a reception unit which receives a graph of physiological parameters that varies with the progress of reading a multimedia file, a display unit which displays the graph of physiological parameters, and a response unit which reads the multimedia file in response to the progress selected according to the graph of physiological parameters. The graph of physiological parameters varying with the progress of reading the multimedia file is displayed when the multimedia file is read, so that a user selects the progress of the multimedia file according to the graph of physiological parameters, so as to read the part in the multimedia file in which the user is interested conveniently and efficiently.
    Type: Application
    Filed: August 29, 2014
    Publication date: February 11, 2016
    Inventors: Bizhong YE, Yu ZHANG, Xiaofeng FAN, Shuai LIN, Zhangbin YIN, Wenhui XIA
  • Patent number: 9245917
    Abstract: A vertically stacked image sensor having a photodiode chip and a transistor array chip. The photodiode chip includes at least one photodiode and a transfer gate extends vertically from a top surface of the photodiode chip. The image sensor further includes a transistor array chip stacked on top of the photodiode chip. The transistor array chip includes the control circuitry and storage nodes. The image sensor further includes a logic chip vertically stacked on the transistor array chip. The transfer gate communicates data from the at least one photodiode to the transistor array chip and the logic chip selectively activates the vertical transfer gate, the reset gate, the source follower gate, and the row select gate.
    Type: Grant
    Filed: July 5, 2014
    Date of Patent: January 26, 2016
    Assignee: Apple Inc.
    Inventor: Xiaofeng Fan
  • Publication number: 20160020203
    Abstract: In an embodiment, an ESD protection circuit is provided in which diodes may be formed between N+ and P+ diffusions within an insulated semiconductor region and in which additional diodes may be formed between adjacent insulated regions of opposite conduction type as well. The diodes may be used in parallel to form an ESD protection circuit, which may have low on resistance and may sink high ESD current per unit area. To support the formation of the ESD protection circuit, each silicon region may have alternating N+ and P+ diffusions, and adjacent silicon regions may have N+ and P+ diffusions alternating in opposite locations. That is a perpendicular drawn between the N+ diffusions of one adjacent region may intersect P+ diffusions in the other adjacent region, and vice versa.
    Type: Application
    Filed: November 5, 2014
    Publication date: January 21, 2016
    Inventors: Xin Yi Zhang, Xiaofeng Fan, Junjun Li
  • Publication number: 20150380397
    Abstract: Various embodiments of ESD protection circuits and methods for operating the same are disclosed. In one embodiment, one or more driver circuits are protected by a first ESD protection circuit configured to activate and discharge current responsive to an ESD event. The driver circuit may include a pull-up transistor and a pull-down transistor each coupled to drive an output node. A second ESD protection circuit may be associated with and dedicated to the pull-up transistor in the driver circuit.
    Type: Application
    Filed: September 30, 2014
    Publication date: December 31, 2015
    Inventors: Sanjay Dabral, Xiaofeng Fan
  • Patent number: 9209620
    Abstract: Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. In an example method, a thyristor is triggered to conduct current from a signal node to a reference voltage node using leakage currents provided by a transistor formed in a semiconductor doped well shared with the base of the thyristor. The leakage currents are responsive to a noise event (e.g., electrostatic discharge (ESD) event) at the signal node, and increase the voltage of the semiconductor doped well to forward bias the base and the collector of the thyristor. The triggered thyristor conducts the current resulting from the ESD event to the reference voltage node.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: December 8, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Xiaofeng Fan, Michael D. Chaine
  • Patent number: 9210347
    Abstract: A method and apparatus for reducing space and pixel circuit complexity by using a 4-way shared vertically aligned pixels in a same column. The at least four pixels in the pixel circuit share a reset transistor and a source follower transistor, can have a plurality of same colored pixels and a plurality of colors, but do not include a row select transistor.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: December 8, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Zhiping Yin, Xiaofeng Fan, Xiangli Li
  • Publication number: 20150270258
    Abstract: ESD protection circuitry is disclosed. In one embodiment, an integrated circuit includes first and second sensor circuits. The first sensor circuit has a first resistive-capacitive (RC) time constant, while the second sensor circuit has a second RC time constant. The RC time constant of the first sensor circuit is at least one order of magnitude greater than that of the second sensor circuit. A first clamp transistor is coupled to and configured to be activated by the first sensor circuit responsive to the latter detecting an ESD event. A second clamp transistor is coupled to and configured to be activated by the second sensor circuit responsive to the latter detecting the ESD event.
    Type: Application
    Filed: March 20, 2014
    Publication date: September 24, 2015
    Applicant: Apple Inc.
    Inventors: Sanjay Dabral, Xiaofeng Fan, Geertjan Joordens
  • Publication number: 20150256725
    Abstract: A CMOS imager assembly may include an integrated circuit (IC) having an active-pixel image sensor that is mounted on a printed circuit board (PCB) substrate using flip chip packaging technology. The IC and the PCB may be physically and electrically connected to each other through multiple electrically conductive connectors. An underfill material (which may include an anti-reflective material) may, during assembly, be introduced around the connectors in the space between the IC and the PCB. A chemical or physical discontinuity on the integrated circuit may, during assembly, prevent the underfill material from entering an area framed by the discontinuity, which may include the pixel array of the image sensor. The discontinuity may include a dam-like structure built up on the IC, a trench-like structure created on the IC, or a low surface tension material that has been applied to the surface of the IC.
    Type: Application
    Filed: March 10, 2014
    Publication date: September 10, 2015
    Applicant: APPLE INC.
    Inventors: Tongbi T. Jiang, Xiaofeng Fan
  • Publication number: 20150163422
    Abstract: An image sensor includes pixels that accumulate charge during a first integration period and pixels that accumulate charge during shorter second integration periods when an image is captured. The pixels having the shorter second integration period accumulate charge at two or more different times during the first integration period. Charge is read out of the pixels associated with the first integration period at the end of the first integration period, while charge is read out of the pixels having the second integration period at the end of each second integration period.
    Type: Application
    Filed: December 5, 2013
    Publication date: June 11, 2015
    Applicant: Apple Inc.
    Inventors: Xiaofeng Fan, Chiajen Lee, Michael R. Malone, Anup K. Sharma
  • Patent number: 9038020
    Abstract: A system described herein includes a receiver component that receives third party code for execution in a host environment, wherein the third party code corresponds to a dynamic programming language, and wherein the third party code has at least one object reference to a first object that is used by the third party code. A detouring component automatically replaces the first object referenced by the third party code with a proxy object such that the third party code at runtime calls the proxy object instead of the first object.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: May 19, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: John Dunagan, Xiaofeng Fan, Jiahe Wang
  • Publication number: 20150035028
    Abstract: A pixel in an image sensor can include a photodetector and a storage region disposed in one substrate, or a photodetector disposed in one substrate and a storage region in another substrate. A buried light shield is disposed between the photodetector and the storage region. A sense region, such as a floating diffusion, can be adjacent to the storage region, with the buried light shield disposed between the photodetector and the storage and sense regions. When the photodetector and the storage region are disposed in separate substrates, a vertical gate can be formed through the buried light shield and used to initiate the transfer of charge from the photodetector and the storage region. A transfer channel formed adjacent to, or around the vertical gate provides a channel for the charge to transfer from the photodetector to the storage region.
    Type: Application
    Filed: August 5, 2013
    Publication date: February 5, 2015
    Applicant: Apple Inc.
    Inventors: Xiaofeng Fan, Philip H. Li, Chung Chun Wan, Anup K. Sharma, Xiangli Li
  • Publication number: 20140320718
    Abstract: A vertically stacked image sensor having a photodiode chip and a transistor array chip. The photodiode chip includes at least one photodiode and a transfer gate extends vertically from a top surface of the photodiode chip. The image sensor further includes a transistor array chip stacked on top of the photodiode chip. The transistor array chip includes the control circuitry and storage nodes. The image sensor further includes a logic chip vertically stacked on the transistor array chip. The transfer gate communicates data from the at least one photodiode to the transistor array chip and the logic chip selectively activates the vertical transfer gate, the reset gate, the source follower gate, and the row select gate.
    Type: Application
    Filed: July 5, 2014
    Publication date: October 30, 2014
    Inventor: Xiaofeng Fan
  • Patent number: 8872093
    Abstract: An electronic device may be provided with an image sensor for capturing digital images. The image sensor may be used as part of image-sensor-based ambient light sensing circuitry for producing ambient light sensor readings. The image-sensor-based ambient light sensing circuitry may include a reference array. The reference array may be formed from an array of light sensor elements that are matched to elements in the image sensor but that are covered with a light blocking material. Control circuitry can measure current flow into the reference array and the image sensor array and can use current measurements from these arrays in producing a calibrated ambient light sensor reading. The control circuitry may make current measurements by measuring a decay time associated with the voltage of a discharging capacitor. A comparator, pulse generator, and switch may be used in periodically recharging the capacitor. The capacitor may be adjusted to ensure accurate readings.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: October 28, 2014
    Assignee: Apple Inc.
    Inventors: Chiajen Lee, Anup Sharma, Xiaofeng Fan
  • Patent number: 8862975
    Abstract: Web workflow service information may include implementations, contracts, addresses, bindings, and other information that is sprinkled throughout source files, configuration files, and other locations. A service explorer extracts service information, and visualizes service information in a form that supports navigation, thereby helping developers understand and use workflow service information. A workflow service structure underlying the visualization is constructed with the extracted service information. A hierarchical node visualization of the service structure is displayed in a service explorer GUI. A developer navigates by expanding/contracting nodes, searching nodes, selecting nodes, and running tools with node-specific information, e.g., for testing, tracing, publication, workflow design, and so on. The visualization is automatically updated after service configuration changes.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: October 14, 2014
    Assignee: Microsoft Corporation
    Inventors: Min Liao, Minmin Xue, Zaiyue Xue, Xiaofeng Fan