Abstract: Method of operating an integrated circuit device might include applying a first voltage level to a first conductor while applying a second voltage level to a second conductor, applying a third voltage level to the first conductor while applying a fourth voltage level to the second conductor, and applying a fifth voltage level to the first conductor while applying the second voltage level to the second conductor. The second voltage level might correspond to a target voltage level for the second conductor. A difference between the third voltage level and the first voltage level might have a polarity opposite the polarity of a difference between the fourth voltage level and the second voltage level, and the same polarity of a difference between the fifth voltage level and the first voltage level. The fifth voltage level might correspond to a target voltage level for the first conductor.

Abstract: Apparatus and methods are disclosed for providing a bias. A main diode has first and second terminals that connect to a high voltage (HV) line and to an HV regulated line, respectively. The main diode provides a voltage on the HV regulated line lower than a voltage of the HV line. A first current mirror provides a first current. The current mirror connects to the first terminal of the main diode and the HV regulated line. A second current mirror provides a second current. The second current mirror connects to the HV line, the first current mirror, and a low-voltage (LV) line. An impedance is between the LV line and the HV regulated line. A voltage differential between the HV regulated line and the LV line below a low-voltage threshold, and a voltage differential between the HV regulated line and the HV line above the low-voltage threshold are provided.

Abstract: A memory device includes a memory array, a plurality of voltage generation systems, and a controller. The memory array includes a plurality of planes. Each voltage generation system of the plurality of voltage generation systems is electrically coupled to a corresponding plane of the plurality of planes. The controller is configured to turn on each voltage generation system of the plurality of voltage generation systems in response to a first command to access a first plane of the plurality of planes.

Abstract: Disclosed are systems and methods of dynamically calibrating a memory control voltage more accurately. According to disclosed implementations, a memory control voltage such as Vpass or Vwlrv may be calibrated during memory operation as a function of the change in slope of total string current, even during increase in the wordline voltage. In one exemplary method, the wordlines are increased in sequence from a start voltage to an end voltage in steps, slope change is measured at every step, the measured slope change is compared against a threshold, and an adjusted memory control voltage is determined as a function of a wordline voltage at which the change in slope reaches the threshold. As such, memory control voltage may be determined and dynamically calibrated with less sensitivity to operating parameters such as temperature, pattern, and/or time of programming.

Abstract: Devices and techniques are disclosed herein to provide a high-voltage bias signal in a standby state of the storage system without exceeding a limited maximum standby current allowance of the storage system. The high-voltage bias signal can enable a string driver circuit in the standby state to couple a global word line to a local word line, to provide a bias to, or sink a voltage from, a pillar of a string of memory cells of the storage system in the standby state, such as to reduce read disturbances in the storage system.

Abstract: Devices and techniques are disclosed herein to provide a high-voltage bias signal in a standby state of the storage system without exceeding a limited maximum standby current allowance of the storage system. The high-voltage bias signal can enable a string driver circuit in the standby state to couple a global word line to a local word line, to provide a bias to, or sink a voltage from, a pillar of a string of memory cells of the storage system in the standby state, such as to reduce read disturbances in the storage system.

Abstract: An electronic device includes a reconfigurable charge pump including selectively connectable pump units for varying a generated voltage level. A control circuit may is configured to activate or deactivate the reconfigurable charge pump. The reconfigurable charge pump may track a duration based on activating the reconfigurable charge pump. When the duration exceeds a threshold, the control circuit may generates a signal according to the generated voltage level to reconfigure the electrical connections between the selectively connectable pump units.

Abstract: Apparatus and methods are disclosed for providing a bias. A main diode has first and second terminals that connect to a high voltage (HV) line and to an HV regulated line, respectively. The main diode provides a voltage on the HV regulated line lower than a voltage of the HV line. A first current mirror provides a first current. The current mirror connects to the first terminal of the main diode and the HV regulated line. A second current mirror provides a second current. The second current mirror connects to the HV line, the first current mirror, and a low-voltage (LV) line. An impedance is between the LV line and the HV regulated line. A voltage differential between the HV regulated line and the LV line below a low-voltage threshold, and a voltage differential between the HV regulated line and the HV line above the low-voltage threshold are provided.

Abstract: Apparatus, systems, and methods are disclosed, including a charge pump having a pumping function that includes multiple pump stages connected in series. Each pump stage includes a capacitor node coupled to a capacitive element, a low-voltage device including a dielectric layer having a threshold voltage, and an output node coupled to the capacitor node through the low-voltage device. The charge pump also includes a common discharge circuit coupled between a reference voltage and a common node. The charge pump also includes multiple high-voltage diodes, each coupled between the output node of a respective pump stage and the common node. The common discharge circuit includes a current source configured to supply a current to the output nodes when the pumping function of the charge pump is disabled.

Abstract: An electronic device includes a reconfigurable charge pump including pump units that can be arranged differently for varying an output voltage generated by the reconfigurable charge pump; a pump regulator coupled to the reconfigurable charge pump, the pump regulator configured to monitor the output voltage and turn the reconfigurable charge pump on or off based on the output voltage; and an arrangement control mechanism coupled to the pump regulator, the arrangement control mechanism configured to control operation of the pump regulator based on the output voltage to generate arrangement control output, wherein the arrangement control output controls electrical connections between the pump units.

Abstract: Apparatus and methods are disclosed for providing a bias. A main diode has first and second terminals that connect to a high voltage (HV) line and to an HV regulated line, respectively. The main diode provides a voltage on the HV regulated line lower than a voltage of the HV line. A first current mirror provides a first current. The current mirror connects to the first terminal of the main diode and the HV regulated line. A second current mirror provides a second current. The second current mirror connects to the HV line, the first current mirror, and a low-voltage (LV) line. An impedance is between the LV line and the HV regulated line. A voltage differential between the HV regulated line and the LV line below a low-voltage threshold, and a voltage differential between the HV regulated line and the HV line above the low-voltage threshold are provided.

Abstract: Methods of operating a memory device applying a programming pulse having a plurality of different voltage levels to an access line coupled to a plurality of memory cells, enabling a particular memory cell of the plurality of memory cells for programming while the programming pulse has a particular voltage level of the plurality of different voltage levels, and, after enabling the particular memory cell for programming, inhibiting the particular memory cell from programming while the programming pulse has a second voltage level of the plurality of different voltage levels, different than the particular voltage level.

Abstract: An electronic device includes a reconfigurable charge pump including pump units that can be arranged differently for varying an output voltage generated by the reconfigurable charge pump; a pump regulator coupled to the reconfigurable charge pump, the pump regulator configured to monitor the output voltage and turn the reconfigurable charge pump on or off based on the output voltage; and an arrangement control mechanism coupled to the pump regulator, the arrangement control mechanism configured to control operation of the pump regulator based on the output voltage to generate arrangement control output, wherein the arrangement control output controls electrical connections between the pump units.

Abstract: Apparatuses and methods for mixed charge pumps with voltage regulator circuits is disclosed. An example apparatus comprises a first charge pump circuit configured to provide a first voltage, a second charge pump circuit configured to provide a second voltage, a plurality of coupling circuits configured to voltage couple and current couple the first voltage and the second voltage to a common node to provide a regulated voltage, and a feedback circuit configured to regulate the first voltage and the second voltage based on the regulated voltage.

Abstract: Methods of operating a memory include determining a target voltage level for an access line voltage, determining a target overdrive voltage level for gating the access line voltage to an access line coupled to a plurality of memory cells, generating a voltage level for the access line voltage in response to its target voltage level and generating a voltage level for gating the access line voltage to the access line in response to the target overdrive voltage level, and applying the access line voltage to the access line while applying the voltage level for gating the access line voltage to a control gate of a string driver connected to the access line.

Abstract: Methods of operating a memory include determining a target voltage level for an access line voltage, determining a target overdrive voltage level for gating the access line voltage to an access line coupled to a plurality of memory cells, generating a voltage level for the access line voltage in response to its target voltage level and generating a voltage level for gating the access line voltage to the access line in response to the target overdrive voltage level, and applying the access line voltage to the access line while applying the voltage level for gating the access line voltage to a control gate of a string driver connected to the access line. Apparatus include a voltage regulator having variable resistance paths between a voltage signal node and an output node, and between the voltage signal node and an input of a comparator of the voltage regulator.

Abstract: Methods of operating a memory include determining a target voltage level for an access line voltage, determining a target overdrive voltage level for gating the access line voltage to an access line coupled to a plurality of memory cells, generating a voltage level for the access line voltage in response to its target voltage level and generating a voltage level for gating the access line voltage to the access line in response to the target overdrive voltage level, and applying the access line voltage to the access line while applying the voltage level for gating the access line voltage to a control gate of a string driver connected to the access line. Apparatus include a voltage regulator having variable resistance paths between a voltage signal node and an output node, and between the voltage signal node and an input of a comparator of the voltage regulator.

Abstract: An electronic device includes a reconfigurable charge pump including pump units that can be arranged differently for varying an output voltage generated by the reconfigurable charge pump; a pump regulator coupled to the reconfigurable charge pump, the pump regulator configured to monitor the output voltage and turn the reconfigurable charge pump on or off based on the output voltage; and an arrangement control mechanism coupled to the pump regulator, the arrangement control mechanism configured to control operation of the pump regulator based on the output voltage to generate arrangement control output, wherein the arrangement control output controls electrical connections between the pump units.

Abstract: Methods of operating integrated circuit devices include generating a voltage level at a particular node in response to a first voltage level applied to a termination device and a second voltage level applied to a reference resistance; determining whether a plurality of available resistance values of the termination device satisfy a criterion that each available resistance value is either less than a resistance value of the reference resistance, or each available resistance value is greater than the resistance value of the reference resistance; and, when the plurality of available resistance values of the termination device satisfy the criterion, determining whether a voltage level generated at the particular node for a particular available resistance value of the plurality of available resistance values is between a voltage level of a first reference voltage and a voltage level of a second reference voltage.

Abstract: Apparatuses and methods for mixed charge pumps with voltage regulator circuits is disclosed. An example apparatus comprises a first charge pump circuit configured to provide a first voltage, a second charge pump circuit configured to provide a second voltage, a plurality of coupling circuits configured to voltage couple and current couple the first voltage and the second voltage to a common node to provide a regulated voltage, and a feedback circuit configured to regulate the first voltage and the second voltage based on the regulated voltage.