Patents by Inventor Yao Cheng

Yao Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240151661
    Abstract: A radiographic inspection apparatus and a vehicle-mounted security inspection system. The radiographic inspection apparatus includes a scanning device, where the scanning device includes: an upright framework; a slip ring rotatably provided on the upright framework; and a locking mechanism. The locking mechanism includes: a driving mechanism provided on the upright framework; and a contact portion provided on the driving mechanism to come into contact with an outer ring of the slip ring under a driving of the driving mechanism, so as to prevent the slip ring from rotating relative to the upright framework.
    Type: Application
    Filed: January 14, 2022
    Publication date: May 9, 2024
    Inventors: Li ZHANG, Zhiqiang CHEN, Qingping HUANG, Mingzhi HONG, Yi CHENG, Minghua QIU, Yao ZHANG, Jianxue YANG, Lei ZHENG
  • Patent number: 11980000
    Abstract: A back film for a display device and the display device are provided in the present disclosure. The back film includes an opening region and a non-opening region, and the back film includes a first flexible material layer and a polyimide layer laminated one on another. An opening penetrating through the first flexible material layer and the second flexible material layer is formed in the back film, and a region corresponding to the opening is the opening region. The back film further includes a protection member covering the camera region.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: May 7, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yao Huang, Yuanyou Qiu, Yudiao Cheng
  • Patent number: 11980071
    Abstract: A display substrate and a display device. The display substrate includes a display region, a first connecting wire, and a second connecting wire. A first display region includes a first sub-pixel array, including a plurality of light emitting elements arranged in an array, and the plurality of light emitting elements include a first light emitting element and a second light emitting element. The second display region includes a first pixel circuit array, including a plurality of first pixel circuit units, and the plurality of pixel circuit units include a first pixel circuit (D10) and a second pixel circuit. The first connecting wire (151) is connected to the first pixel circuit and the first light emitting element. The second connecting wire is connected to the second pixel circuit and the second light emitting element. The second connecting wire extends in a first direction, the first connecting wire extends in a second direction.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: May 7, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yuanyou Qiu, Weiyun Huang, Yao Huang, Yue Long, Tianyi Cheng
  • Patent number: 11972072
    Abstract: The present disclosure provides an electronic device including a first sensing circuit, a second sensing circuit and a power line. The first sensing circuit includes a first sensing unit and a first transistor, and a first end of the first sensing unit is coupled to a control end of the first transistor. The second sensing circuit includes a second sensing unit and a second transistor, and a first end of the second sensing unit is coupled to a control end of the second transistor. A first end of the first transistor and a first end of the second transistor are coupled to the power line.
    Type: Grant
    Filed: November 1, 2022
    Date of Patent: April 30, 2024
    Assignee: InnoLux Corporation
    Inventors: Shu-Fen Li, Chuan-Chi Chien, Hsiao-Feng Liao, Rui-An Yu, Chang-Chiang Cheng, Po-Yang Chen, I-An Yao
  • Patent number: 11973423
    Abstract: A system includes a load and a switching converter coupled to the load. The switching converter includes at least one switching module and an output inductor coupled to a switch node of each switching module. The switching converter also includes a controller coupled to each switching module, where the controller is configured to adjust a pulse clock rate and a switch on-time for each switching module. The controller comprises a pulse truncation circuit configured to detect a voltage overshoot condition and to truncate an active switch on-time pulse in response to the detected voltage overshoot condition.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: April 30, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kuang-Yao Cheng, Muthusubramanian Venkateswaran, Dattatreya Baragur Suryanarayana, Preetam Charan Anand Tadeparthy
  • Publication number: 20240138214
    Abstract: A display substrate and a display device. The display substrate includes a display region, a first connecting wire and a second connecting wire. The display region includes a first display region and a second display region. The first display region includes a plurality of light emitting devices arranged in an array, and the plurality of light emitting devices includes a first light emitting device and a second light emitting device. The second display region includes a plurality of first pixel circuit units, and the plurality of pixel circuit units includes a first pixel circuit and a second pixel circuit. The first connecting wire is connected to the first pixel circuit and the first light emitting device. The second connecting wire is connected to the second pixel circuit and the second light emitting device. The first direction and the second direction intersect each other.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 25, 2024
    Applicants: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yuanyou QIU, Weiyun HUANG, Yao HUANG, Yue LONG, Tianyi CHENG
  • Publication number: 20240128148
    Abstract: A method includes attaching a package component to a package substrate, the package component includes: an interposer disposed over the package substrate; a first die disposed along the interposer; and a second die disposed along the interposer, the second die being laterally adjacent the first die; attaching a first thermal interface material to the first die, the first thermal interface material being composed of a first material; attaching a second thermal interface material to the second die, the second thermal interface material being composed of a second material different from the first material; and attaching a lid assembly to the package substrate, the lid assembly being further attached to the first thermal interface material and the second thermal interface material.
    Type: Application
    Filed: January 6, 2023
    Publication date: April 18, 2024
    Inventors: Chang-Jung Hsueh, Po-Yao Lin, Hui-Min Huang, Ming-Da Cheng, Kathy Yan
  • Patent number: 11961899
    Abstract: A semiconductor device includes a gate structure extending along a first lateral direction. The semiconductor device includes a source/drain structure disposed on one side of the gate structure along a second lateral direction, the second lateral direction perpendicular to the first lateral direction. The semiconductor device includes an air gap disposed between the gate structure and the source/drain structure along the second lateral direction, wherein the air gap is disposed over the source/drain structure.
    Type: Grant
    Filed: January 23, 2023
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Hsiao Wen Lee, Yu-Shan Cheng, Chao-Cheng Chen
  • Publication number: 20240121479
    Abstract: Embodiments of the present disclosure relate to multimedia processing method, apparatus, device and medium, wherein the method includes: presenting a first multimedia interface comprising first content; receiving an interface switching request of a user in the first multimedia interface; and switching from the first multimedia interface currently presented to a second multimedia interface, and presenting second content in the second multimedia interface, wherein the first content comprises the second content and other content associated with the second content, and the second content comprises a target audio and a target subtitle corresponding to the target audio.
    Type: Application
    Filed: April 7, 2022
    Publication date: April 11, 2024
    Inventors: Kojung CHEN, Yinuo ZHOU, Biao GONG, Jingsheng YANG, Tian ZHAO, Jinghui LIU, Daqian LU, Yao YANG, Tao CHENG, Zaofeng PAN, Tianhui SHI, Rongyi TANG, Guodong GONG
  • Publication number: 20240103196
    Abstract: A radiographic inspection device and a method of inspecting an object are provided. The radiographic inspection device includes a support frame, where an inspection space applicable to inspect an object is formed within the support frame, and the inspection space has a first opening connecting to an outside; a transfer mechanism applicable to carry the object and move through the inspection space; a shielding curtain mounted at the first opening; and a driving mechanism. The driving mechanism includes: a driver mounted on the support frame; and a joint portion, where an upper end of the shielding curtain is connected to the joint portion. The driver is configured to synchronously drive two ends of the joint portion, so that the shielding curtain moves up and down with the joint portion to open or close the first opening.
    Type: Application
    Filed: January 18, 2022
    Publication date: March 28, 2024
    Inventors: Zhiqiang CHEN, Li ZHANG, Yi CHENG, Qingping HUANG, Mingzhi HONG, Minghua QIU, Yao ZHANG, Jianxue YANG, Lei ZHENG
  • Publication number: 20240105654
    Abstract: A method of making a semiconductor device includes patterning a conductive layer over a substrate to define a conductive pad having a first width. The method includes depositing a passivation layer, wherein the passivation layer directly contacts the conductive pad. The method includes depositing a protective layer over the passivation layer, wherein the protective layer directly contacts the conductive pad. The method includes depositing an under-bump metallization (UBM) layer directly contacting the conductive pad, wherein the UBM layer has a second width greater than the first width. The method includes depositing a mask layer over the UBM layer; and forming an opening in the mask layer wherein the opening has the second width. The method includes forming a conductive pillar in the opening on the UBM layer; and etching the UBM layer using the conductive pillar as a mask, wherein the etched UBM layer has the second width.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 28, 2024
    Inventors: Chita CHUANG, Yao-Chun CHUANG, Tsung-Shu LIN, Chen-Cheng KUO, Chen-Shien CHEN
  • Patent number: 11935470
    Abstract: A pixel circuit and a driving method thereof, and a display device are provided. The pixel circuit includes a driving sub-circuit, a data writing sub-circuit, a first light-emitting control sub-circuit, a second light-emitting control sub-circuit, a compensation sub-circuit, and a first reset sub-circuit, and is configured to generate a driving current to control a light-emitting element to emit light, the first reset sub-circuit comprises a first transistor, the compensation sub-circuit comprises a second transistor, the first transistor and the second transistor are both polysilicon oxide thin film transistors, and an active layer type of the first transistor and an active layer type of the second transistor are different from an active layer type of a transistor comprised in at least one selected from a group consisting of the driving sub-circuit, the data writing sub-circuit, the first light-emitting control sub-circuit, and the second light-emitting control sub-circuit.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: March 19, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP C0., LTD.
    Inventors: Rui Wang, Ming Hu, Haijun Qiu, Weiyun Huang, Yao Huang, Chao Zeng, Yuanyou Qiu, Shaoru Li, Tianyi Cheng
  • Publication number: 20240087644
    Abstract: A forming operation of resistive memory device is provided. The operation includes: applying a pre-forming gate voltage and a pre-forming bit line voltage to a target memory cell; performing a dense switching forming operation, wherein the dense switching forming operation includes alternately performing dense set operations and dense reset operations on the target memory cell, wherein the dense set operation includes applying a dense switching gate voltage and a dense set bit line voltage; and performing a normal set operation on the target memory cell, wherein the normal set operation includes applying a normal set gate voltage and a normal set bit line voltage to the target memory cell, the normal set gate voltage is greater than the pre-forming gate voltage and the dense switching gate voltage, and the normal set bit line voltage is less than the pre-forming bit line voltage and the dense set bit line voltage.
    Type: Application
    Filed: August 29, 2023
    Publication date: March 14, 2024
    Applicant: Winbond Electronics Corp.
    Inventors: I-Hsien Tseng, Lung-Chi Cheng, Ju-Chieh Cheng, Jun-Yao Huang, Ping-Kun Wang
  • Patent number: 11927628
    Abstract: The present disclosure provides a semiconductor wafer. The semiconductor wafer includes: a scribe line between a first row of dies and a second row of dies; and a benchmark circuit disposed adjacent to the scribe line and electrically coupled to a first conductive contact and a second conductive contact. The benchmark circuit includes a first device-under-test (DUT); a second DUT; a first switching circuit configured to selectively couple the first DUT and the second DUT to the first conductive contact; and a second switching circuit configured to selectively couple the first DUT and the second DUT to the second conductive contact.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chu-Feng Liao, Hung-Ping Cheng, Yuan-Yao Chang, Shuo-Wen Chang
  • Publication number: 20240078970
    Abstract: Provided are a display panel and a display device. The display panel includes: a base substrate; light-emitting elements including groups of light-emitting elements, at least one group of light-emitting elements including first-region light-emitting elements and second-region light-emitting elements; pixel circuits including groups of pixel circuits, at least one group of pixel circuits including first-type pixel circuits and second-type pixel circuits, at least one second-type pixel circuit is connected with at least one second-region light-emitting element through a conductive line, first light-emitting elements are connected with first pixel circuits through first conductive lines, in the at least one group of light-emitting elements and the at least one group of pixel circuits, first pixel circuits connected with first light-emitting elements are closer to the second display region than each of second pixel circuits connected with second light-emitting elements.
    Type: Application
    Filed: October 18, 2023
    Publication date: March 7, 2024
    Inventors: Yao HUANG, Weiyun HUANG, Yue LONG, Yudiao CHENG
  • Publication number: 20240079850
    Abstract: A semiconductor device includes a first contact layer, a second contact layer, an active layer, a photonic crystal layer, a passivation layer, a first electrode and a second electrode. The first contact layer has a first surface and a second surface opposite to each other. Microstructures are located on the second surface. The second contact layer is located below the first surface. The active layer is located between the first contact layer and the second contact layer. The photonic crystal layer is located between the active layer and the second contact layer. The passivation layer is located on the second contact layer. The first electrode is located on the passivation layer and is electrically connected the first surface of the first contact layer. The second electrode is located on the passivation layer and is electrically connected to the second contact layer.
    Type: Application
    Filed: December 28, 2022
    Publication date: March 7, 2024
    Inventors: Wen-Cheng HSU, Yu-Heng HONG, Yao-Wei HUANG, Kuo-Bin HONG, Hao-Chung KUO
  • Publication number: 20240074263
    Abstract: Disclosed are an array substrate and a display panel, including: a base substrate; and a wiring layer, an anode layer, and a light-emitting layer which are stacked on the base substrate sequentially, wherein the wiring layer includes a signal wiring, a first wiring and a second wiring, a projection of the first wiring on the base substrate is separated from a projection of the second wiring on the base substrate, the first and second wirings are respectively disposed on two sides of the anode layer below the anode layer, the signal wiring is between the first and second wirings, the projections of the first and second wirings on the base substrate respectively overlap projections of two sides of the anode layer on the base substrate, and a length of the second wiring is less than that of the signal wiring in an extension direction of the signal wiring.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: Meng Li, Sen Du, Tianyi Cheng, Tiaomei Zhang, Yao Huang, Tingliang Liu
  • Publication number: 20240073038
    Abstract: A certificate requesting method, a certificate issuing method, a certificate system and a computer-readable medium thereof are provided, in which subscriber identity identification information, a private key and a public key certificate bound to a first security chip are converted into a private key bound to a second security chip via an online identity authentication procedure, and the corresponding public key certificate is issued by a certificate authority server, so as to improve the usability, the convenience and the security thereof.
    Type: Application
    Filed: August 30, 2023
    Publication date: February 29, 2024
    Inventors: Wen-Cheng WANG, Yao-Kuan HUANG, Wan-Ju YANG
  • Patent number: 11917874
    Abstract: A display substrate and a display device. The display substrate includes a display region, a first connecting wire, and a second connecting wire. A first display region includes a first sub-pixel array, including a plurality of light emitting elements arranged in an array, and the plurality of light emitting elements include a first light emitting element and a second light emitting element. The second display region includes a first pixel circuit array, including a plurality of first pixel circuit units, and the plurality of pixel circuit units include a first pixel circuit (D10) and a second pixel circuit. The first connecting wire (151) is connected to the first pixel circuit and the first light emitting element. The second connecting wire is connected to the second pixel circuit and the second light emitting element. The second connecting wire extends in a first direction, the first connecting wire extends in a second direction.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: February 27, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yuanyou Qiu, Weiyun Huang, Yao Huang, Yue Long, Tianyi Cheng
  • Patent number: 11906905
    Abstract: A verification device for verifying a design file for digital lithography comprises a memory and a controller. The memory comprises the design file. The controller is configured to access the design file and apply one or more compliance rules to the design file to determine compliance of the design file. The compliance rules comprises at least one of detecting non-orthogonal edges within the design file, detecting non-compliant overlapping structures within the design file, and detecting a non-compliant interaction between a reference layer of the design file and a target layer of the design file. The controller is further configured to verify the design file in response to a comparison of a number of non-orthogonal edges, non-compliant overlapping structures and non-compliant interactions to a threshold.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: February 20, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Chung-Shin Kang, Yinfeng Dong, Rick R. Hung, Yao Cheng Yang, Tsaichuan Kao