Abstract: An A-D converter includes a plurality of comparators, each of which compares an analog input signal to analog threshold values; an upper field determination section which, during an upper determination phase, supplies in parallel to each of the plurality of comparators the plurality of analog threshold values expressing boundaries of ranges corresponding to each data value acquired from the upper field of a number of bits previously designated in the digital output signal, detects whether the analog input signal is associated with one of the ranges based on comparison results by the plurality of comparators, and narrows data values of the upper field to data values corresponding to a range between the largest analog threshold value less than or equal to the analog input signal and the smallest analog threshold value greater than or equal to the analog input signal; and a lower field determination section which, during the lower determination phase, determines values of conversion target bits based on a plural

Abstract: An A-D converter that outputs a digital output signal obtained by digitalizing an analog input signal includes a plurality of comparators that each compare the analog input signal and an analog threshold value based on designated digital threshold data, a high-order field determining section that narrows down a data value corresponding to a high-order field of a predetermined bit number in the digital output signal based on a plurality of comparison results obtained by supplying threshold data different from one another to the plurality of comparators, a low-order field computing section that computes a plurality of candidate values for a data value corresponding to a low-order field of a predetermined bit number located at a side lower than the high-order field, and a low-order field determining section that determines a data value corresponding to the low-order field based on the plurality of candidate values.

Abstract: There is provided an A/D converter that outputs a digital output signal obtained by digitalizing an analog input signal. The A/D converter includes a bit selecting section that selects a conversion object bit from a high-order bit to a low-order bit of the digital output signal in order, a threshold-value controlling section that determines a threshold data expressing a boundary value between zero and one of the conversion object bit, a D/A converting section that digital-to-analog converts the threshold data and generates an analog threshold value, a comparing section that compares, at a plurality of different timings in a conversion time interval determining a value of the conversion object bit, the analog input signal and the analog threshold value and outputs a plurality of comparison results at the timings, and a bit determining section that determines the value of the conversion object bit.

Abstract: There is provided an A-D converter that outputs a digital output signal obtained by digitalizing an analog input signal. The converter includes a plurality of comparators that each compares the analog input signal and an analog threshold value according to designated digital threshold data, a high-order field determining section that narrows down a data value corresponding to a high-order field of a predetermined bit number in the digital output signal based on a plurality of comparison results obtained by supplying threshold data different from one another to the plurality of comparators, a low-order field computing section that computes a plurality of candidate values for a data value corresponding to a low-order field of a predetermined bit number located at a side lower than the high-order field by means of the plurality of comparators, and a low-order field determining section that determines a data value corresponding to the low-order field based on the plurality of candidate values.

Abstract: An A-D converter includes a plurality of comparators, each of which compares an analog input signal to analog threshold values; an upper field determination section which, during an upper determination phase, supplies in parallel to each of the plurality of comparators the plurality of analog threshold values expressing boundaries of ranges corresponding to each data value acquired from the upper field of a number of bits previously designated in the digital output signal, detects whether the analog input signal is associated with one of the ranges based on comparison results by the plurality of comparators, and narrows data values of the upper field to data values corresponding to a range between the largest analog threshold value less than or equal to the analog input signal and the smallest analog threshold value greater than or equal to the analog input signal; and a lower field determination section which, during the lower determination phase, determines values of conversion target bits based on a plural

Abstract: There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement, having a pulse generator for outputting a pulse signal having a pulse width set in advance corresponding to edges-under-measurement from which the timing jitter is to be measured in the signal-under-measurement, a filter for removing a carrier frequency components of the signal-under-measurement from the pulse signal and a jitter calculator for calculating the jitter in the signal-under-measurement based on the signal outputted out of the filter

Abstract: There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement having a first pulse generator for detecting edges of the data-signal-under-measurement to output a first pulse signal having a pulse width set in advance corresponding to the edge, a second pulse generator for detecting boundaries of data sections where data values do not change in the data-signal-under-measurement to output a second pulse signal having a pulse width set in advance corresponding to timing of the detected boundaries of the data sections, a filter for removing carrier frequency components of said data-signal-under-measurement from first and second pulse signals and a jitter calculating section for calculating timing jitter in the data-signal-under-measurement based on the first and second pulse signals.