Patents by Inventor Yasuhiro Fukuda
Yasuhiro Fukuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7763952Abstract: A semiconductor device has a fuse, an internal circuit and a protection capacitor. The fuse has a first terminal connected to be applied to a fixed voltage and a second terminal. The internal circuit includes a transistor. The transistor has a threshold voltage and a gate. The protection capacitor is connected between the second terminal of the fuse and the gate of the transistor. The protection capacitor supplies the threshold voltage to the transistor where the fuse supplies the fixed voltage to the protection capacitor.Type: GrantFiled: November 10, 2008Date of Patent: July 27, 2010Assignee: Oki Semiconductor Co., Ltd.Inventor: Yasuhiro Fukuda
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Publication number: 20100134938Abstract: A semiconductor device with an ESD protection function has an SOI substrate, first to fourth diffusion layers, and a gate. The SOI substrate has a semiconductor layer on an insulation layer. The first diffusion layer is of a first conductivity type and is formed on the semiconductor layer. The second diffusion layer is of the first conductivity type and is formed on the semiconductor layer. The third diffusion layer is of a second conductivity type and is formed on the semiconductor layer so as to be adjacent to the first and second diffusion layers. The fourth diffusion layer is of the second conductivity type and is formed on the semiconductor layer so as to be adjacent to the first diffusion layer and electrically connected to the second diffusion layer. The gate is formed over the third diffusion layer.Type: ApplicationFiled: January 15, 2010Publication date: June 3, 2010Applicant: OKI SEMICONDUCTOR CO., LTD.Inventor: Yasuhiro Fukuda
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Patent number: 7723794Abstract: A load driving device includes a drive control signal generation circuit generating a load drive control signal and a semiconductor buffer circuit generating an output signal in response to the load drive control signal. The buffer circuit has a pair of gate driven switching elements which are connected to each other in push-pull configuration and driven at their gate terminals by the load drive control signal. The buffer circuit has an output terminal which is connected to a connection point between ends of controlled electrodes of the gate driven switching elements, and a power source terminal and a ground connection terminal respectively connected to the remaining ends of the other controlled electrodes of the gate driven switching elements. A ground connection side element of a pair of gate driven switching elements has a set of MOS transistors which are connected across the connection point and the ground connection terminal.Type: GrantFiled: September 7, 2006Date of Patent: May 25, 2010Assignee: Oki Semiconductor Co., Ltd.Inventors: Toshikazu Kuroda, Hirokazu Hayashi, Yasuhiro Fukuda
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Patent number: 7675116Abstract: A semiconductor device with an ESD protection function has an SOI substrate, first to fourth diffusion layers, and a gate. The SOI substrate has a semiconductor layer on an insulation layer. The first diffusion layer is of a first conductivity type and is formed on the semiconductor layer. The second diffusion layer is of the first conductivity type and is formed on the semiconductor layer. The third diffusion layer is of a second conductivity type and is formed on the semiconductor layer so as to be adjacent to the first and second diffusion layers. The fourth diffusion layer is of the second conductivity type and is formed on the semiconductor layer so as to be adjacent to the first diffusion layer and electrically connected to the second diffusion layer. The gate is formed over the third diffusion layer.Type: GrantFiled: November 14, 2005Date of Patent: March 9, 2010Assignee: Oki Semiconductor Co., Ltd.Inventor: Yasuhiro Fukuda
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Patent number: 7671415Abstract: An electro-static discharge protection circuit and a semiconductor device having the same is disclosed. The electro-static discharge protection circuit has a current control circuit. The current control circuit has a first capacitive element. When the external source voltage is applied to the external source voltage supply line, the booster circuit in the internal circuitry boosts the internal source voltage of the internal source voltage supply line. The external source voltage becomes transiently greater than the internal source voltage at the early stage of the boosting step when the booster circuit boosts the internal source voltage based on the external source voltage.Type: GrantFiled: March 15, 2006Date of Patent: March 2, 2010Assignee: Oki Semiconductor Co., Ltd.Inventors: Toshikazu Kuroda, Hirokazu Hayashi, Yasuhiro Fukuda
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Patent number: 7550817Abstract: A semiconductor device has a fuse, an internal circuit and a protection capacitor. The fuse has a first terminal connected to be applied to a fixed voltage and a second terminal. The internal circuit includes a transistor. The transistor has a threshold voltage and a gate. The protection capacitor is connected between the second terminal of the fuse and the gate of the transistor. The protection capacitor supplies the threshold voltage to the transistor where the fuse supplies the fixed voltage to the protection capacitor.Type: GrantFiled: March 18, 2005Date of Patent: June 23, 2009Assignee: Oki Semiconductor Co., Ltd.Inventor: Yasuhiro Fukuda
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Publication number: 20090079028Abstract: A semiconductor device has a fuse, an internal circuit and a protection capacitor. The fuse has a first terminal connected to be applied to a fixed voltage and a second terminal. The internal circuit includes a transistor. The transistor has a threshold voltage and a gate. The protection capacitor is connected between the second terminal of the fuse and the gate of the transistor. The protection capacitor supplies the threshold voltage to the transistor where the fuse supplies the fixed voltage to the protection capacitor.Type: ApplicationFiled: November 10, 2008Publication date: March 26, 2009Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Yasuhiro Fukuda
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Publication number: 20090058845Abstract: The invention provides a display device wherein provisions are made to be able to properly adjust the image viewing direction, viewing angle, or viewing range on the display device. The display device includes a display section capable of displaying independent images intended for a plurality of different viewing directions on the same screen, an information acquiring section for acquiring orientation information concerning the orientation of the images, and an image direction varying section for varying the orientation of the images based on the orientation information acquired by the information acquiring section.Type: ApplicationFiled: October 20, 2005Publication date: March 5, 2009Inventors: Yasuhiro Fukuda, Mitsuhiro Kamoto, Hiroyuki Fujimoto, Yoshiyuki Hashimoto, Taku Yokawa, Yoshikazu Ueta, Takumi Yoshimoto, Tomoki Saito, Takashi Kato
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Patent number: 7498615Abstract: An electro-static discharge protection circuit includes a thyristor mode ensuring circuit and a thyristor rectifier circuit. The thyristor mode ensuring circuit includes a capacitive element connected between a higher potential line and a lower potential line, and ensures a constant and sufficient capacity independently of the number of input/output signal bits, even when the number of input/output signal bits is a theoretical minimum, i.e. 1, so that a surge current induced by electro-static discharge (ESD) applied to an output pad is injected into the first capacitive element to charge it. Thus, by means of the current caused by the surge current, the thyristor rectifier circuit is triggered into a thyristor mode, which allows the surge current to flow to the lower potential line through the thyristor rectifier circuit, protecting circuitry against the surge current.Type: GrantFiled: February 28, 2006Date of Patent: March 3, 2009Assignee: Oki Electric Industry Co., Ltd.Inventors: Toshikazu Kuroda, Hirokazu Hayashi, Yasuhiro Fukuda
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Publication number: 20070052033Abstract: A load driving device includes a drive control signal generation circuit generating a load drive control signal and a semiconductor buffer circuit generating an output signal in response to the load drive control signal. The buffer circuit has a pair of gate driven switching elements which are connected to each other in push-pull configuration and driven at their gate terminals by the load drive control signal. The buffer circuit has an output terminal which is connected to a connection point between ends of controlled electrodes of the gate driven switching elements, and a power source terminal and a ground connection terminal respectively connected to the remaining ends of the other controlled electrodes of the gate driven switching elements. A ground connection side element of a pair of gate driven switching elements has a set of MOS transistors which are connected across the connection point and the ground connection terminal.Type: ApplicationFiled: September 7, 2006Publication date: March 8, 2007Inventors: Toshikazu Kuroda, Hirokazu Hayashi, Yasuhiro Fukuda
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Publication number: 20070018446Abstract: Sheet-like audio information recording/reproducing means capable of recording/reproducing audio information is sandwiched between two support sheets from front and back only in part of the area thereof and these two support sheets are further sandwiched between two surface sheets and the support sheets and surface sheets are bonded together.Type: ApplicationFiled: August 30, 2004Publication date: January 25, 2007Applicant: Toppan Forms Co., Ltd.Inventors: Yukihiko Isetani, Takaaki Okada, Hideo Shimizu, Yoshiaki Ide, Yasuhiro Fukuda, Takeshi Yamakami, Fumihiro Hanazawa, Akira Yamazaki
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Publication number: 20060220137Abstract: An electro-static discharge protection circuit and a semiconductor device having the same is disclosed. The electro-static discharge protection circuit has a current control circuit. The current control circuit has a first capacitive element. When the external source voltage is applied to the external source voltage supply line, the booster circuit in the internal circuitry boosts the internal source voltage of the internal source voltage supply line. The external source voltage becomes transiently greater than the internal source voltage at the early stage of the boosting step when the booster circuit boosts the internal source voltage based on the external source voltage.Type: ApplicationFiled: March 15, 2006Publication date: October 5, 2006Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventors: Toshikazu KURODA, Hirokazu HAYASHI, Yasuhiro FUKUDA
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Publication number: 20060220136Abstract: An electro-static discharge protection circuit comprises a thyristor mode ensuring circuit and a thyristor rectifier circuit. The thyristor mode ensuring circuit includes a capacitive element C1 connected between a higher potential line Vdd and a lower potential line Vss, and ensures a constant and sufficient capacity independently of the number of input/output signal bits, even when the number of input/output signal bits is the theoretical minimum, i.e. 1, so that a surge current induced by electro-static discharge (ESD) applied to an output pad Vout is injected into the first capacitive element C1 in order to charge it. Thus, by means of the current caused by the surge current, the thyristor rectifier circuit is triggered into a thyristor mode, which allows the surge current to flow to the lower potential line Vss through the thyristor rectifier circuit, resulting in a CMOS inverter of an internal circuitry being effectively protected against the surge current.Type: ApplicationFiled: February 28, 2006Publication date: October 5, 2006Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventors: Toshikazu KURODA, Hirokazau HAYASHI, Yasuhiro FUKUDA
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Patent number: 7102863Abstract: An electrostatic breakdown preventing circuit has first and second conductive lines, a diode, a power clamp circuit and first and second capacitors. The first and second conductive lines are connected to a first potential source and a second potential source, respectively. The internal circuit is connected between the first and second conductive lines. The internal circuit operates in response to an input signal. The diode is connected in a forward direction between an input terminal and the second conductive line. The first capacitor is connected between the node and the first conductive line. The second capacitor is connected between the node and the second power conductive line. The capacitances of the first and second capacitors are set in such a manner that the transistor is brought to an OFF state upon a normal operation and brought to an ON state upon the input of an electrostatic surge.Type: GrantFiled: January 31, 2003Date of Patent: September 5, 2006Assignee: Oki Electric Industry Co., Ltd.Inventor: Yasuhiro Fukuda
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Publication number: 20060114628Abstract: A semiconductor device with an ESD protection function has an SOI substrate, first to fourth diffusion layers, and a gate. The SOI substrate has a semiconductor layer on an insulation layer. The first diffusion layer is of a first conductivity type and is formed on the semiconductor layer. The second diffusion layer is of the first conductivity type and is formed on the semiconductor layer. The third diffusion layer is of a second conductivity type and is formed on the semiconductor layer so as to be adjacent to the first and second diffusion layers. The fourth diffusion layer is of the second conductivity type and is formed on the semiconductor layer so as to be adjacent to the first diffusion layer and electrically connected to the second diffusion layer. The gate is formed over the third diffusion layer.Type: ApplicationFiled: November 14, 2005Publication date: June 1, 2006Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Yasuhiro Fukuda
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Publication number: 20060054993Abstract: A semiconductor device has a fuse, an internal circuit and a protection capacitor. The fuse has a first terminal connected to be applied to a fixed voltage and a second terminal. The internal circuit includes a transistor. The transistor has a threshold voltage and a gate. The protection capacitor is connected between the second terminal of the fuse and the gate of the transistor. The protection capacitor supplies the threshold voltage to the transistor where the fuse supplies the fixed voltage to the protection capacitor.Type: ApplicationFiled: March 18, 2005Publication date: March 16, 2006Inventor: Yasuhiro Fukuda
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Publication number: 20060049466Abstract: A semiconductor device having a semiconductor substrate, an insulating layer, a fuse, a diffusion layer and a resistor. The semiconductor substrate has a first conductivity type. The insulating layer is selectively formed on the surface of the semiconductor substrate. The fuse is formed on the insulating layer. The diffusion layer has a second conductivity type. The diffusion layer is formed on the surface of the semiconductor substrate and electrically connected to the fuse. The first resistor is electrically connected to the fuse.Type: ApplicationFiled: March 18, 2005Publication date: March 9, 2006Inventors: Noboru Egawa, Yasuhiro Fukuda
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Patent number: 6919870Abstract: The objective of this invention is to compensate or avoid the influence of offset in an easy and efficient manner, to correctly match the voltage of the output signal with the voltage of the input signal, that is, the target value, and to significantly reduce the current consumption. When voltage follower 32L supplies bias voltage VBn to each of constant current source circuits 58L, 60L, it acts as a source-type voltage follower. However, when the bias voltage applied to each of constant current source circuits 58L, 60L is changed from VBn to Vss of the power supply voltage level, each of constant current source circuits 58L, 60L is turned off, and no current flows through them. When the constant current source circuit 58 is turned off in differential input part 44L, the potential at the output terminal (node) NL rises almost to the level of the power supply voltage Vdd. In this way, the driving transistor 62L is also turned off in output part 46L.Type: GrantFiled: June 22, 2001Date of Patent: July 19, 2005Assignee: Texas Instruments IncorporatedInventor: Yasuhiro Fukuda
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Patent number: 6687866Abstract: A LSI includes a logic circuit, a PLL circuit and a built-in self-test (BIST) circuit. When the PLL circuit detects a phase lock of the system clock signal of the LSI with a reference clock signal under the condition of presence of a test instruction signal, the PLL delivers a test enable signal to the BIST circuit. The BIST circuit responds to the test enable signal to test the logic circuit in a functional test. The BIST circuit transmits the test result data to an IC tester after the functional test. Throughput of the functional test can be improved by eliminating transmission of the test enable signal from the IC tester to the LSI.Type: GrantFiled: December 21, 2000Date of Patent: February 3, 2004Assignee: NEC Electronics CorporationInventor: Yasuhiro Fukuda
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Publication number: 20030235020Abstract: An electrostatic breakdown preventing circuit has first and second conductive lines, a diode, a power clamp circuit and first and second capacitors. The first and second conductive lines are connected to a first potential source and a second potential source, respectively. The internal circuit is connected between the first and second conductive lines. The internal circuit operates in response to an input signal. The diode is connected in a forward direction between an input terminal and the second conductive line. The first capacitor is connected between the node and the first conductive line. The second capacitor is connected between the node and the second power conductive line. The capacitances of the first and second capacitors are set in such a manner that the transistor is brought to an OFF state upon a normal operation and brought to an ON state upon the input of an electrostatic surge.Type: ApplicationFiled: January 31, 2003Publication date: December 25, 2003Inventor: Yasuhiro Fukuda