Abstract: The present disclosure relates to an imaging device and an electronic device capable of restricting an occurrence of a sunspot phenomenon in a simple configuration. The imaging device includes: a sample/hold part configured to sample and hold a reset voltage as a reset level voltage of a pixel signal; and an AD conversion part configured to analog digital (AD) convert the pixel signal, in which the AD conversion part selects and outputs one of a first output signal as the AD converted pixel signal and a second output signal at a predetermined level on the basis of a comparison result between the reset voltage held by the sample/hold part and a predetermined reference voltage. The technology according to the present disclosure can be applied to a CMOS image sensor, for example.

Abstract: Noise is reduced in a circuit that converts voltage. A voltage conversion circuit includes a conversion transistor, a current source transistor, and a control circuit. In this voltage conversion circuit, the conversion transistor converts a potential of an input signal, the potential being changed from one of two different potentials to the other, by using predetermined current, and outputs the converted signal as an output signal. Furthermore, the current source transistor supplies the predetermined current. Then, in a case where the potential of the input signal is changed to the other potential, the control circuit stops supplying the predetermined current.

Abstract: The present disclosure relates to a solid-state imaging device, an image pickup apparatus, and an electronic device capable of stably supplying high-speed control signals and clock signals. In the area AD method in which analog-digital conversion of a pixel signal is performed for each ADC area corresponding to a pixel group including a plurality of pixels, a repeater element is regularly arranged in each area group unit including one or more ADC areas, to re-drive control signals for controlling a plurality of the ADC areas. The present disclosure is applicable to a solid-state imaging device.

Abstract: The present disclosure relates to a solid-state imaging device, an image pickup apparatus, and an electronic device capable of stably supplying high-speed control signals and clock signals. In the area AD method in which analog-digital conversion of a pixel signal is performed for each ADC area corresponding to a pixel group including a plurality of pixels, a repeater element is regularly arranged in each area group unit including one or more ADC areas, to re-drive control signals for controlling a plurality of the ADC areas. The present disclosure is applicable to a solid-state imaging device.

Abstract: An imaging device comprising a pixel substrate including pixel element circuitry, a logic substrate including read circuitry configured to receive an output signal voltage from the pixel element circuitry, and electrically-conductive material arranged between the pixel substrate and the logic substrate, wherein the electrically-conductive material is configured to transfer at least one reference voltage from the logic substrate to the pixel substrate, wherein the electrically-conductive material comprises a Cu—Cu bonding portion.

Abstract: There is provided an electronic circuit including a timing signal generation unit for generating a timing signal; a data signal supply unit for synchronizing with the timing signal generated to supply a data signal; a data signal transmission circuit for transmitting the data signal supplied; a timing signal transmission circuit for transmitting the timing signal generated by a circuit having a substantially same delay time as the data signal transmission circuit; and a data holding unit for synchronizing with the timing signal transmitted to hold and output the data signal transmitted. Also, there are provided a solid state image capturing apparatus and a method of controlling the electronic circuit.

Abstract: There is provided an electronic circuit including a timing signal generation unit for generating a timing signal; a data signal supply unit for synchronizing with the timing signal generated to supply a data signal; a data signal transmission circuit for transmitting the data signal supplied; a timing signal transmission circuit for transmitting the timing signal generated by a circuit having a substantially same delay time as the data signal transmission circuit; and a data holding unit for synchronizing with the timing signal transmitted to hold and output the data signal transmitted. Also, there are provided a solid state image capturing apparatus and a method of controlling the electronic circuit.

Abstract: A vibration electricity generation device according to an embodiment of the present invention includes a fixed unit provided with a coil and a movable unit provided with a magnet. The movable unit is supported on the fixed unit in a suspended manner via a pair of coil springs. The movable unit is thus configured to vibrate in the up and down direction with a rather simple structure. A coil supporting member of the fixed unit is configured to cover a coil accommodating portion from both thickness direction sides thereof and a friction reducing treatment is applied to the surfaces of both thickness direction sides of the coil supporting member. The coefficient of kinetic friction is thus maintained low enough and a pair of guide shafts conventionally used are not required, thereby the electricity generation efficiency being improved.

Abstract: The present technique relates to a clock generation circuit including a phase difference comparison circuit configured to compare a phase of each of an input clock signal and a feedback signal, and provides a phase difference signal indicating a phase difference between the input clock signal and the feedback signal, a filter circuit configured to suppress a high frequency component in the phase difference signal, an output circuit configured to modulate the phase difference signal in such a manner as to decrease a noise component of a low frequency band and increase a noise component of a high frequency band, and generate and output an output clock signal from the modulated phase difference signal and a reference clock signal, and a frequency dividing circuit configured to divide a frequency of the output clock signal, at a predetermined frequency dividing ratio, and feed it back to the phase comparison circuit.

Abstract: A signal generation circuit includes a phase difference detector configured to detect a phase difference between a certain oscillation signal of a plurality of oscillation signals and a predetermined reference signal; an oscillator to which a plurality of delay elements are connected annularly, the oscillator being configured to generate the plurality of oscillation signals depending on the detected phase difference; a low-speed signal generation circuit configured to generate a low-speed signal having a lower frequency than the oscillation signal; a detection circuit configured to detect a difference between a predetermined reference timing and a timing at which the low-speed signal has changed; a selection unit configured to select the oscillation signal so that the phase difference with respect to the reference signal is close to the detected difference; and an output unit configured to output the generated low-speed signal in synchronization with the selected oscillation signal.

Abstract: The configuration is provided with three flexible arms extending in the same circumferential direction, as a suspension for supporting the magnetic circuit unit in displaceable fashion in the vertical direction with respect to a coil support member. This assures sufficient length of each of the flexible arms, enhancing the vibration characteristics. Next, arm insertion slots having approximately the same vertical Width as the flexible arms are formed at three locations in the circumferential direction in the coil support member. The distal end of each flexible arm is then inserted into the arm insertion slot, doing so in the aforementioned same circumferential direction, causing a barb to engage an engaging part and detain the flexible arm.

Abstract: An analog-to-digital conversion device includes a plurality of counting period supply units that supply a period of length according to a voltage of an analog signal inputted into each counting period supply unit based on the voltage of the analog signal as a counting period, a plurality of counter circuits which are connected to a common power supply and which perform a counting operation that counts a count value in the counting period different from each other and generate a digital signal indicating the count value, and a plurality of compensation circuits which are connected to the power supply and which operate so that the greater the number of counter circuits that stop the counting operation among the plurality of counter circuits, the greater the number of the compensation circuits that operate.

Abstract: A clock tree unit cell circuit includes a first input terminal configured to receive a clock signal from an upstream side of a clock tree; a first output terminal configured to output a clock signal to a downstream side of the clock tree; a second input terminal configured to receive a standby signal from the upstream side of the clock tree; a third input terminal configured to receive a standby signal from the downstream side of the clock tree; a logic circuit configured to perform a predetermined logical operation on the clock signal inputted to the first input terminal and output the clock signal to the first output terminal; and a control circuit that is connected to the second input terminal, the third input terminal, and an output control terminal of the logic circuit.

Abstract: A voltage conversion circuit includes: a first voltage conversion unit configured to perform voltage conversion on an input signal, the voltage conversion causing a predetermined delay time, and supply a resultant signal as a first converted signal; a second voltage conversion unit configured to perform voltage conversion on the input signal, the voltage conversion causing a delay time that is different from the predetermined delay time, and supply a resultant signal as a second converted signal; and an output unit configured to generate and output an output signal corresponding to the first and second converted signals in a matching period of time in which voltages of the first converted signal and the second converted signal are matched with each other, and continuously output the output signal in a period of time excluding the matching period of time, the output signal being output in the matching period of time.

Abstract: A clock tree unit cell circuit includes a first input terminal configured to receive a clock signal from an upstream side of a clock tree; a first output terminal configured to output a clock signal to a downstream side of the clock tree; a second input terminal configured to receive a standby signal from the upstream side of the clock tree; a third input terminal configured to receive a standby signal from the downstream side of the clock tree; a logic circuit configured to perform a predetermined logical operation on the clock signal inputted to the first input terminal and output the clock signal to the first output terminal; and a control circuit that is connected to the second input terminal, the third input terminal, and an output control terminal of the logic circuit.

Abstract: A vibration electricity generation device according to an embodiment of the present invention includes a fixed unit provided with a coil and a movable unit provided with a magnet. The movable unit is supported on the fixed unit in a suspended manner via a pair of coil springs. The movable unit is thus configured to vibrate in the up and down direction with a rather simple structure. A coil supporting member of the fixed unit is configured to cover a coil accommodating portion from both thickness direction sides thereof and a friction reducing treatment is applied to the surfaces of both thickness direction sides of the coil supporting member. The coefficient of kinetic friction is thus maintained low enough and a pair of guide shafts conventionally used are not required, thereby the electricity generation efficiency being improved.

Abstract: A voltage conversion circuit includes: a first voltage conversion unit configured to perform voltage conversion on an input signal, the voltage conversion causing a predetermined delay time, and supply a resultant signal as a first converted signal; a second voltage conversion unit configured to perform voltage conversion on the input signal, the voltage conversion causing a delay time that is different from the predetermined delay time, and supply a resultant signal as a second converted signal; and an output unit configured to generate and output an output signal corresponding to the first and second converted signals in a matching period of time in which voltages of the first converted signal and the second converted signal are matched with each other, and continuously output the output signal in a period of time excluding the matching period of time, the output signal being output in the matching period of time.

Abstract: A signal generation circuit includes a phase difference detector configured to detect a phase difference between a certain oscillation signal of a plurality of oscillation signals and a predetermined reference signal; an oscillator to which a plurality of delay elements are connected annularly, the oscillator being configured to generate the plurality of oscillation signals depending on the detected phase difference; a low-speed signal generation circuit configured to generate a low-speed signal having a lower frequency than the oscillation signal; a detection circuit configured to detect a difference between a predetermined reference timing and a timing at which the low-speed signal has changed; a selection unit configured to select the oscillation signal so that the phase difference with respect to the reference signal is close to the detected difference; and an output unit configured to output the generated low-speed signal in synchronization with the selected oscillation signal.

Abstract: An analog-to-digital conversion device includes a plurality of counting period supply units that supply a period of length according to a voltage of an analog signal inputted into each counting period supply unit based on the voltage of the analog signal as a counting period, a plurality of counter circuits which are connected to a common power supply and which perform a counting operation that counts a count value in the counting period different from each other and generate a digital signal indicating the count value, and a plurality of compensation circuits which are connected to the power supply and which operate so that the greater the number of counter circuits that stop the counting operation among the plurality of counter circuits, the greater the number of the compensation circuits that operate.

Abstract: The present technique relates to a clock generation circuit including a phase difference comparison circuit configured to compare a phase of each of an input clock signal and a feedback signal, and provides a phase difference signal indicating a phase difference between the input clock signal and the feedback signal, a filter circuit configured to suppress a high frequency component in the phase difference signal, an output circuit configured to modulate the phase difference signal in such a manner as to decrease a noise component of a low frequency band and increase a noise component of a high frequency band, and generate and output an output clock signal from the modulated phase difference signal and a reference clock signal, and a frequency dividing circuit configured to divide a frequency of the output clock signal, at a predetermined frequency dividing ratio, and feed it back to the phase comparison circuit.