Patents by Inventor Yasuo Kobayashi

Yasuo Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040175944
    Abstract: The present invention provides method and apparatus for surface treatment which, when employed in process steps of manufacturing semiconductor devices, can result in the final products having enhanced reliability. According to the surface processing method, an obeject to be processed W is introduced in a processing vessel 10, which is then supplied with ClF3 gas serving as cleaning gas from a supply unit 26. The ClF3 gas is bound to the surface of the object to be processed W, and although the supply of the gas to the processing vessel is interrupted, the ClF3 gas bound to the surface of the object to be processed W serves to clean the surface of the object to be processed. Next, reducing gas is introduced into the processing vessel W to remove chlorine from the object to be processed W, the chlorine being derived from the ClF3 gas. After that, the introduction of the reducing gas is interrupted, and the cleaned object to be processed W is exported from the processing vessel 10.
    Type: Application
    Filed: March 15, 2004
    Publication date: September 9, 2004
    Applicant: Tokyo Electron Limited
    Inventor: Yasuo Kobayashi
  • Patent number: 6781496
    Abstract: A primary winding 12 connected to a high-voltage, a large-current power supply 1, a secondary winding 14 connected to an electromagnetic forming coil 2, and a magnetic core 16 for guiding the magnetic flux produced by the primary winding. The magnetic core 16 is composed of a primary core 16a on which the primary winding is wound and a secondary core 16b on which the secondary winding is wound. The primary core and the secondary core are magnetically connected in contact or in close proximity. The primary core and the secondary core are separated each other when the connector is disconnected. Thus, current pulses at a high voltage (for instance, 10 kV) with a large current (for example, 100 kA or more) and a narrow pulse width (e.g., 30 &mgr;sec or less) can be efficiently transmitted, and the connector easily attached and removed.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: August 24, 2004
    Assignee: Ishikawajima-Harima Heavy Industries Co., Ltd.
    Inventors: Yasuo Kobayashi, Takashi Majima, Yuuji Sasaki
  • Patent number: 6776874
    Abstract: A processing method and apparatus for removing a native oxide film from the surface of a subject to be treated, wherein plasma is generated from N2 and H2 gases and then activated to form an activated gas species, NF3 gas is added to the activated gas species to generate an activated gas of these three gases, the subject is cooled to not higher than a predetermined temperature by a cooling means, gas generated from the N2, H2 and NF3 gases is reacted with the surface of the subject to degenerate the native oxide film into a reactive film, the reactive film is sublimated and thus the native oxide film is removed if the subject is heated to a given temperature; a cluster system which includes the above apparatus and other apparatuses and which is capable of carrying a subject to be treated in an unreactive atmosphere.
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: August 17, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Yasuo Kobayashi, Kotaro Miyatani, Kaoru Maekawa
  • Patent number: 6756723
    Abstract: A fluorescent lamp having a stem provided with first and second lead wires for energization of an electrode and an electrically-insulating member provided therein with a first hole and a second hole larger in cross-sectional area than said second lead wire. The first and second lead wires are inserted in the first and second holes of the electrically-insulating member, respectively, and an outer diameter of a glass envelope of the fluorescent lamp is not smaller than 13 mm and not larger than 29 mm.
    Type: Grant
    Filed: January 3, 2002
    Date of Patent: June 29, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Mamoru Fukushima, Yasuo Kobayashi, Soichiro Ogawa
  • Patent number: 6706334
    Abstract: Disclosed are a processing method and apparatus for removing a native oxide film from the surface of a subject to be treated. In this method and apparatus, gas generated from N2, H2 and NF3 gases is reacted with the surface of the subject to degenerate the native oxide film into a reactive film. If the subject is heated to a given temperature, the reactive film is sublimated and thus the native oxide film is removed. Plasma is generated from the N2 and H2 gases and then activated to form an activated gas species. The NF3 gas is added to the activated gas species to generate an activated gas of these three gases. In the step of forming the reactive film, the subject is cooled to not higher than a predetermined temperature by a cooling means. In the step of sublimating the reactive film, the subject is lifted up to a predetermined heating position.
    Type: Grant
    Filed: November 10, 1999
    Date of Patent: March 16, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Yasuo Kobayashi, Kotaro Miyatani, Kaoru Maekawa
  • Patent number: 6537621
    Abstract: A method for forming a titanium film and a titanium nitride film on a surface of a substrate by lamination, by which contamination of the substrate due to the by-product is suppressed and the contact resistance of the titanium film is reduced. The method comprises the steps of forming a titanium film on the surface of the substrate using a first process gas containing TiCl4 and a reducing gas, subjecting the substrate to a plasma process using a second process gas containing N2 gas and a reducing gas, thereby decreasing Cl in the titanium film and nitriding the surface of the titanium film to form a nitride layer, and forming a barrier metal (e.g., a titanium nitride film) on the titanium film having the nitride layer. Thus, the titanium film and the titanium nitride film are formed on the substrate by lamination. The second process gas contains N2 gas in a ratio of 0.5 or lower with respect to the reducing gas.
    Type: Grant
    Filed: December 29, 1999
    Date of Patent: March 25, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Yasuo Kobayashi, Kunihiro Tada, Hideki Yoshikawa
  • Patent number: 6517144
    Abstract: An impact absorbing member is composed of a first impact absorbing portion disposed between a roof side panel and a roof head lining, a second impact absorbing portion disposed between the roof head lining and a region that is in a reinforcement and that is spaced from the roof side panel towards a central portion of the roof, and a third impact absorbing portion connecting the first impact absorbing portion to the second impact absorbing portion. The third impact absorbing portion is thinner than the first impact absorbing portion and the second impact absorbing portion.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: February 11, 2003
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventor: Yasuo Kobayashi
  • Publication number: 20020171525
    Abstract: The major components are a primary winding 12 connected to a high-voltage, a large-current power supply 1, a secondary winding 14 connected to an electromagnetic forming coil 2, and a magnetic core 16 for guiding the magnetic flux produced by the primary winding. The magnetic core 16 is composed of a primary core 16a on which the primary winding is wound and a secondary core 16b on which the secondary winding is wound. The primary core and the secondary core are magnetically connected together by putting them in contact or in close proximity. And the primary core and the secondary core are separeated each other when the connector is disconnected. Thus, current pulses at a high voltage (for instance, 10 kV) with a large current (for example, 100 kA or more) and a narrow pulse width (e.g., 30 &mgr;sec or less) can be efficiently transmitted, and the connector can be easily attached and removed.
    Type: Application
    Filed: February 19, 2002
    Publication date: November 21, 2002
    Applicant: Ishikawajima-Harima Heavy
    Inventors: Yasuo Kobayashi, Takashi Majima, Yuuji Sasaki
  • Publication number: 20020062790
    Abstract: A processing apparatus 51 includes a processing container 53 having a wafer W arranged therein, an activated-gas seeds induction port 79 for supplying activated N2-gas and H2-gas into the processing container 53 and nozzle orifices 105 for supplying NF3-gas activated by both N2-gas and H2-gas on activation. Thus, the processing apparatus allows N2-gas and H2-gas to activate NF3-gas, so that the wafer W is processed by the activated NF3-gas. The activated-gas seeds induction port 79 and the nozzle orifices 105 are together formed in a top plate 71 of the processing container 53, realizing an uniform distribution of NF3-gas on the object to be processed in the processing chamber.
    Type: Application
    Filed: September 18, 2001
    Publication date: May 30, 2002
    Inventors: Kyoko Ikeda, Yasuo Kobayashi, Noriaki Matsushima
  • Publication number: 20020053877
    Abstract: A fluorescent lamp having a stem provided with first and second lead wires for energization of an electrode and an electrically-insulating member provided therein with a first hole and a second hole larger in cross-sectional area than said second lead wire. The first and second lead wires are inserted in the first and second holes of the electrically-insulating member, respectively, and an outer diameter of a glass envelope of the fluorescent lamp is not smaller than 13 mm and not larger than 29 mm.
    Type: Application
    Filed: January 3, 2002
    Publication date: May 9, 2002
    Inventors: Mamoru Fukushima, Yasuo Kobayashi, Soichiro Ogawa
  • Patent number: 6342763
    Abstract: A high frequency operation fluorescent lamp which can reduce a possibility of over-heat damage of a flare stem at the end of its life. In the lamp, a pair of intermediate lead wires are passed through the flare stem at each end of a light emitting envelope, and an insulator is provided to cover a top of the flare stem.
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: January 29, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Mamoru Fukushima, Yasuo Kobayashi, Soichiro Ogawa
  • Patent number: 6322662
    Abstract: In a plasma treatment system, the increase of the electric field of a treatment space facing the central portion of a flat antenna member is relieved, and the ununiformity of the density of plasma in a plasma forming region is relieved. Microwave generated by a microwave generator 50 are supplied from a waveguide 52 to a flat antenna member 44. The flat antenna member 44 has a plurality of slots 60. The space between adjacent two of the slots 60 is longer than the guide wavelength of microwaves in the waveguide 52, and the length of each of the slots 60 is shorter than half of the guide wavelength. The slots 60 are arranged in a region other than the central portion of the flat antenna member 44 so as not to be axisymmetric.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: November 27, 2001
    Assignees: Tokyo Electron Limited
    Inventors: Nobuo Ishii, Yasuo Kobayashi, Tamotsu Morimoto, Makoto Ando, Naohisa Goto
  • Publication number: 20010042988
    Abstract: An impact absorbing member is composed of a first impact absorbing portion disposed between a roof side panel and a roof head lining, a second impact absorbing portion disposed between the roof head lining and a region that is in a reinforcement and that is spaced from the roof side panel towards a central portion of the roof, and a third impact absorbing portion connecting the first impact absorbing portion to the second impact absorbing portion. The third impact absorbing portion is thinner than the first impact absorbing portion and the second impact absorbing portion.
    Type: Application
    Filed: May 16, 2001
    Publication date: November 22, 2001
    Applicant: Toyota Jidosha Kabushiki Kaisha
    Inventor: Yasuo Kobayashi
  • Patent number: 6317851
    Abstract: A memory test circuit in which time required for a memory test is reduced is disclosed. A memory test circuit according to the present invention is provided with stripe data generating means for generating stripe data composed of plural bits based upon a block address signal, means for writing the above stripe data to a predetermined address of a memory, means for reading information written to the above predetermined address of the memory and compare means for judging whether the above read information is the same as the stripe data or not. The above stripe data generating means generates stripe data in a cycle 2 in response to a first state of the above block address signal and generates stripe data in a cycle 4 in response to a second state of the block address signal.
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: November 13, 2001
    Assignee: NEC Corporation
    Inventor: Yasuo Kobayashi
  • Publication number: 20010015261
    Abstract: Disclosed are a processing method and apparatus for removing a native oxide film from the surface of a subject to be treated. In this method and apparatus, gas generated from N2, H2 and NF3 gases is reacted with the surface of the subject to degenerate the native oxide film into a reactive film. If the subject is heated to a given temperature, the reactive film is sublimated and thus the native oxide film is removed. Plasma is generated from the N2 and H2 gases and then activated to form an activated gas species. The NF3 gas is added to the activated gas species to generate an activated gas of these three gases. In the step of forming the reactive film, the subject is cooled to not higher than a predetermined temperature by a cooling means. In the step of sublimating the reactive film, the subject is lifted up to a predetermined heating position.
    Type: Application
    Filed: December 15, 2000
    Publication date: August 23, 2001
    Applicant: TOKYO ELECTRO LIMITED
    Inventors: Yasuo Kobayashi, Kotaro Miyatani, Kaoru Maekawa
  • Patent number: 6229757
    Abstract: In a double data rate type synchronous dynamic random access memory (DDR-SDRAM) device, a large latch margin of input data is secured. The DDR-SDRAM device is arranged by a data strobe signal processing circuit for detecting at least one of a rise edge of a data strobe signal and a fall edge thereof to thereby produce at least a first one-shot pulse signal; a clock signal processing circuit for detecting a rise edge of a clock signal to thereby produce a second one-shot pulse signal; and a data-in processing circuit for latching input data by using the first one-shot pulse signal produced from the data strobe signal, and further for latching the latched input data by using the second one-shot pulse signal produced from the clock signal, and also for simultaneously writing both the latched data into a memory cell in a parallel manner.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: May 8, 2001
    Assignee: NEC Corporation
    Inventors: Kyoichi Nagata, Yasuo Kobayashi
  • Patent number: 6197674
    Abstract: A method of forming a CVD-Ti film includes the steps of loading a Si wafer into a chamber, setting an interior of the chamber at a predetermined reduced-pressure atmosphere, introducing TiCl4 gas, H2 gas, and Ar gas into the chamber, and generating a plasma of the introduced gas in the chamber to form a Ti film in a hole formed in an SiO2 film on the wafer. A wafer temperature is set to 400° to 800°, a supplied power is set to 100 W to 300 W, an internal chamber pressure is set to 0.5 Torr to 3.0 Torr, a flow rate ratio of TiCl4 gas to a sum of H2 gas and Ar gas is 1:100 to 1:300, and a flow rate ratio of H2 gas to Ar gas is 1:1 to 2:1.
    Type: Grant
    Filed: July 9, 1998
    Date of Patent: March 6, 2001
    Assignee: Tokyo Electron Limited
    Inventors: Hideki Yoshikawa, Yasuo Kobayashi, Kunihiro Tada
  • Patent number: 6130567
    Abstract: A semiconductor delay circuit which can realize a fine delay time regulation pitch and can set a number of regulation steps is provided. A plurality of inverter tree circuit each having a plurality of propagation paths having delay times different with an equal pitch are connected in series and outputs of the propagation paths are selectively transmitted externally by a switch circuit.
    Type: Grant
    Filed: April 8, 1998
    Date of Patent: October 10, 2000
    Assignee: NEC Corporation
    Inventor: Yasuo Kobayashi
  • Patent number: 6081434
    Abstract: A switch circuit comprising a semiconductor switch and an inverse-parallel diode is connected between a main electricity storage unit 4 and a primary winding 142P of an insulating transformer 142 and a switch circuit including a semiconductor switch and a diode is connected in inverse-parallel between a secondary winding 142S of the insulating transformer 142 and an auxiliary electricity storage unit 10. The switch circuits are controlled on/off, whereby power is supplied from the main electricity storage unit 4 to the auxiliary electricity storage unit 10 or from the auxiliary electricity storage unit 10 to the main electricity storage unit 4 for charging the electricity storage unit 10 or 4.
    Type: Grant
    Filed: March 22, 1999
    Date of Patent: June 27, 2000
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Shigenori Kinoshita, Kouichi Ueki, Yasuo Kobayashi
  • Patent number: 6051281
    Abstract: A method of forming a titanium film and a titanium nitride film on a substrate by lamination which method is capable of suppressing contamination of the substrate due to the by-product and of reducing a contact resistance value of the titanium film. By carrying out the step of forming a titanium film on a surface of a substrate, the step of subjecting the substrate to the plasma processing in an atmosphere of the mixed gas of nitrogen gas and hydrogen gas, thereby nitriding a surface layer of the titanium film to form thereon a nitride layer, and the step of forming a barrier film (e.g., a titanium nitride film) on the titanium film having the nitride layer formed thereon, both the titanium film and the titanium nitride film are formed on the substrate by lamination.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: April 18, 2000
    Assignee: Tokyo Electron Limited
    Inventors: Yasuo Kobayashi, Kunihiro Tada, Hideki Yoshikawa