Patents by Inventor Yasuo Yamagishi
Yasuo Yamagishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20030116857Abstract: The circuit substrate comprises a silicon substrate 10 with through-holes 12 formed in, conducting films 18a, 18a, 18c formed on the inside walls of the through-holes 12, and an organic resin film 20 formed on the surface of at least one side of the silicon substrate and covering at least parts of the through-holes 12. Accordingly, even in a case where the through-holes formed, micronized at a small pitch, the substrate does not lower the mechanical strength. Thus, the circuit substrate which is applicable to high-density packaging can be provided.Type: ApplicationFiled: November 21, 2002Publication date: June 26, 2003Applicant: FUJITSU LIMITEDInventors: Osamu Taniguchi, Yasuo Yamagishi, Koji Omote
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Patent number: 6580169Abstract: The present invention relates to a method for forming bumps on a substrate provided with electrode pads. The method includes providing a mask having openings corresponding to the electrode pads, filling each of the openings with a solder paste, and heat treating the solder paste, wherein the solder paste includes solder powder. Preferably, the solder powder contains no more than 10 wt % of particles whose diameter is greater than the thickness of the mask and no more than 1.5 times this thickness. Preferably, the solder powder contains no more than 10 wt % of particles whose diameter is not less than 40% the diameter of the opening portions, or no less than 30 wt % of particles whose diameter is 40 to 100% the thickness of the mask.Type: GrantFiled: July 10, 2002Date of Patent: June 17, 2003Assignee: Fujitsu LimitedInventors: Seiki Sakuyama, Yasuo Yamagishi, Masataka Mizukoshi
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Publication number: 20030080400Abstract: A semiconductor apparatus comprises a support substrate having through holes filles with conductor adapted to a first pitch; a capacitor formed on or above said support substrate; a wiring layer formed on or above said support substrate, leading some of said through holes filles with conductor upwards through said capacitor, having branches, and having wires of a second pitch different from said first pitch; and plural semiconductor elements disposed on or above said wiring layer, having terminals adapted to the second pitch, and connected with said wiring layer via said terminals. A semiconductor apparatus, in which semiconductor elements having a narrow terminal pitch, a support having through wires at a wider pitch, and a capacitor are suitably electrically connected to realize the decoupling function with reduced inductance and large capacitance.Type: ApplicationFiled: March 8, 2002Publication date: May 1, 2003Applicant: Fujitsu LimitedInventors: Keishiro Okamoto, Takeshi Shioga, Osamu Taniguchi, Koji Omote, Yoshihiko Imanaka, Yasuo Yamagishi
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Publication number: 20030082897Abstract: The present invention relates to a method for forming bumps on a substrate provided with electrode pads. The method includes providing a mask having openings corresponding to the electrode pads, filling each of the openings with a solder paste, and heat treating the solder paste, wherein the solder paste includes solder powder. Preferably, the solder powder contains no more than 10 wt % of particles whose diameter is greater than the thickness of the mask and no more than 1.5 times this thickness. Preferably, the solder powder contains no more than 10 wt % of particles whose diameter is not less than 40% the diameter of the opening portions, or no less than 30 wt % of particles whose diameter is 40 to 100% the thickness of the mask.Type: ApplicationFiled: July 10, 2002Publication date: May 1, 2003Applicant: FUJITSU LIMITEDInventors: Seiki Sakuyama, Yasuo Yamagishi, Masataka Mizukoshi
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Publication number: 20030059148Abstract: The optical deflector comprises: an optical waveguide 12 of a dielectric material having electrooptical effect; and a pair of electrodes 10, 14 opposed to each other across the optical waveguide, an electric field is applied between the opposed electrodes to change a refractive index of the dielectric material to thereby control a propagating direction of signal light propagating in the optical waveguide 12, wherein the dielectric material has a first refractive index in its initial state, has a second refractive index by application of an electric field of a first polarity, and retains as a third refractive index a refractive index obtained after the electric field has been removed. The dielectric material has the third refractive index has the first refractive index by the application of an electric field of a second polarity different from the first polarity and removal of the electric field.Type: ApplicationFiled: February 26, 2002Publication date: March 27, 2003Applicant: Fujitsu LimitedInventors: Motoyuki Nishizawa, Masatoshi Ishii, Yasuo Yamagishi
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Publication number: 20030045085Abstract: The objective of the present invention is to provide a reliable thin-film circuit substrate or via formed substrate that is provided with minute via plugs at a fine pitch. The objective is served by forming an insulation layer that functions as an etching stopper on a Si substrate, and then via holes are formed in the Si substrate, using a semiconductor process, until the etching stopper layer is exposed. Further, a thin-film circuit is formed on the insulation layer, and the insulation layer is removed at the via holes such that the thin-film circuit is exposed. As necessary, the thin film circuit is heat-treated, and then the via holes are filled with an electrically conductive material and vamp electrodes are formed.Type: ApplicationFiled: March 1, 2002Publication date: March 6, 2003Applicant: Fujitsu LimitedInventors: Osamu Taniguchi, Tomoko Miyashita, Yasuo Yamagishi, Koji Omote, Yoshihiko Imanaka
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Patent number: 6528346Abstract: First and second ball forming plates are prepared. The cavities of the first plate and the cavities of the second plate 20 are filled with solder paste, respectively. The first plate and the second plate are placed in a facing relationship to each other and heated to form metal balls each of which corresponds to the total metal components of the solder paste in one cavity of the first plate and one cavity in the second plate. The metal balls are formed in the cavities of the lower plate 10. The metal balls are transferred from the cavities of the first plate to a device on which bumps are to be formed.Type: GrantFiled: December 28, 2000Date of Patent: March 4, 2003Assignee: Fujitsu LimitedInventors: Masayuki Ochiai, Hidefumi Ueda, Michio Sono, Ichiro Yamaguchi, Kazuhiko Mitobe, Koki Otake, Junichi Kasai, Nobuo Kamehara, Yasuo Yamagishi, Masataka Mizukoshi
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Patent number: 6518163Abstract: The present invention relates to a bump formation method, comprising the steps of providing a mask, in which a plurality of openings have been formed corresponding to a plurality of electrode pads, to a substrate provided with this plurality of electrode pads, filling the openings with a solder paste, and heat treating the solder paste. The solder paste contains a solder powder. This solder powder is one that contains no more than 10 wt % particles whose diameter is greater than the thickness of the mask and no more than 1.5 times this thickness. Preferably, this solder powder is one that contains no more than 10 wt % particles whose diameter is greater than 40% of the diameter of the openings, or one that contains no more than 30 wt % particles whose diameter is 40 to 100% the thickness of the mask.Type: GrantFiled: December 26, 2000Date of Patent: February 11, 2003Assignee: Fujitsu LimitedInventors: Seiki Sakuyama, Yasuo Yamagishi, Masataka Mizukoshi
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Patent number: 6504966Abstract: A prism pair is employed as an optical deflecting element. The prism pair is constructed by a slab waveguide, and first and second upper electrodes and first and second lower electrodes arranged on and under the slab waveguide. These electrodes are shaped into a wedge shape (e.g., triangular shape), and change the refractive index of a part of the slab waveguide by utilizing the electrooptic effect to change the propagation direction of light.Type: GrantFiled: February 15, 2002Date of Patent: January 7, 2003Assignee: Fujitsu LimitedInventors: Masayuki Kato, Akio Sugama, Koji Tsukamoto, Masatoshi Ishii, Kishio Yokouchi, Yasuo Yamagishi, Motoyuki Nishizawa, Tsuyoshi Aoki
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Publication number: 20020197010Abstract: An optical waveguide and a first lens are formed on an underlying surface. The optical waveguide guides light along a first direction. The first lens is continuous with one end of the waveguide and converges light radiated from the end plane of the optical waveguide and diverging along directions parallel to the underlying surface. A second lens converges light transmitted through the first lens and diverging along directions perpendicular to the underlying surface. A support member supports the first and second lenses. It is possible to prevent a shift of positions of the optical waveguide and lens to be caused by a temperature change and to prevent a light coupling efficiency from being lowered.Type: ApplicationFiled: May 31, 2002Publication date: December 26, 2002Applicant: FUJITSU LIMITEDInventors: Masayuki Kato, Akio Sugama, Koji Tsukamoto, Yasuo Yamagishi
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Publication number: 20020182958Abstract: A multilayer printed wiring board includes a core member including a plurality of glass clothes impregnated with a resin. Each of the glass clothes is woven with glass yarns each of which includes a bundle of glass filaments. One or more buildup layers are laminated on one or each surface of the core member. The core member has an elastic modulus which is no less than 100 times that of the buildup layer at 240° C.Type: ApplicationFiled: September 26, 2001Publication date: December 5, 2002Applicant: Fujitsu LimitedInventors: Motoaki Tani, Nobuyuki Hayashi, Hiroyuki Machida, Takeshi Ishitsuka, Yasuo Yamagishi
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Publication number: 20020175316Abstract: A conductive composition layer, conductive particles as a raw material, a conductive composition therefor, a manufacturing method of the conductive composition layer, etc. are provided wherewith heat conductance can be accelerated between electronic devices or electronic devices can be electrically connected. The conductive composition layer is formed by subjecting to heat treatment at a temperature lower than 230° C. a conductive composition comprising conductive particles having a metal base material and a metal coating material thereon as well as a thermosetting resin having a curing temperature that is lower than 230° C. and/or a thermoplastic resin having a melting point that is lower than 230° C.Type: ApplicationFiled: March 5, 2002Publication date: November 28, 2002Applicant: Fujitsu LimitedInventors: Kozo Shimizu, Yasuo Yamagishi
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Publication number: 20020144228Abstract: A thermal analysis in heating a print-circuit board in a reflowing furnace is simulated by a processor using data required for the design and thermal analysis of the printed-circuit board that carries solder-bonded components. The result of simulation indicates the possibility of existence of unmelted solder bonds heated at peak temperature below a predetermined lower limit and solder bonds heated at temperature above a predetermined upper limit. On the basis of the result, the components that are likely to be heated at inapplicable temperature are redesigned so that they can actually be heated at temperature in the predetermined range. The modification of design is displayed.Type: ApplicationFiled: May 28, 2002Publication date: October 3, 2002Applicant: FUJITSU LIMITEDInventors: Hiroki Uchida, Yasuo Yamagishi
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Publication number: 20020114556Abstract: A prism pair is employed as an optical deflecting element. The prism pair is constructed by a slab waveguide, and first and second upper electrodes and first and second lower electrodes arranged on and under the slab waveguide. These electrodes are shaped into a wedge shape (e.g., triangular shape), and change the refractive index of a part of the slab waveguide by utilizing the electrooptic effect to change the propagation direction of light.Type: ApplicationFiled: February 15, 2002Publication date: August 22, 2002Inventors: Masayuki Kato, Akio Sugama, Koji Tsukamoto, Masatoshi Ishii, Kishio Yokouchi, Yasuo Yamagishi, Motoyuki Nishizawa, Tsuyoshi Aoki
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Publication number: 20020102432Abstract: A solder paste, includes a flux, a solder alloy particle scattered or mixed in the flux and including Sn and Zn as composition elements, and a metal particle scattered or mixed in the flux and including an element in the IB group in the periodic table as a composition element.Type: ApplicationFiled: November 27, 2001Publication date: August 1, 2002Applicant: Fujitsu LimitedInventors: Masayuki Ochiai, Yasuo Yamagishi, Hiroki Uchida, Masayuki Kitajima, Masakazu Takesue, Tadaaki Shono
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Patent number: 6319810Abstract: Method for forming solder bumps on a first member such as a semiconductor chip having electrode pads formed thereon. A flat plate having holes is prepared and the holes are filled with solder paste by squeezing. The flat plate is then overlapped with the first member with the flat plate above the first plate. The flat plate and the first member are heated to a temperature higher than the melting point of the solder alloy in the solder paste. Therefore, solder bumps having identical sizes and uniform structures can be obtained.Type: GrantFiled: June 6, 1996Date of Patent: November 20, 2001Assignee: Fujitsu LimitedInventors: Masayuki Ochiai, Yasuo Yamagishi, Ichiro Yamaguchi, Masahiro Yoshikawa, Koki Otake, Masataka Mizukoshi, Yuuji Watanabe
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Publication number: 20010028109Abstract: The main subject of the present invention is a semiconductor device with a semiconductor element bonded on a circuit substrate by a bump comprising a solder alloy. Here, the solder alloy is an Sn—Ag-based alloy having a 90 (wt %) or more Sn content, a 0.01 or less (cph/cm2) &agr; ray amount in Sn, and a 1.5 (wt %) to 2.8 (wt %) Ag content. Accordingly, a solder alloy capable of preventing generation of a needle-like projection generated in a solder alloy at the time of bonding a semiconductor element on a circuit substrate for coping with frequent generation of a soft error accompanying the fine pitch, in executing the flip-chip bonding in a Pb-free solder alloy mainly containing Sn, with a long fatigue life without causing deterioration of the insulation resistance, and without generation of a soft error by &agr; rays, and a semiconductor device using the same are realized.Type: ApplicationFiled: December 8, 2000Publication date: October 11, 2001Inventors: Kozo Shimizu, Masayuki Ochiai, Yasuo Yamagishi
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Publication number: 20010018263Abstract: First and second ball forming plates are prepared. The cavities of the first plate and the cavities of the second plate 20 are filled with solder paste, respectively. The first plate and the second plate are placed in a facing relationship to each other and heated to form metal balls each of which corresponds to the total metal components of the solder paste in one cavity of the first plate and one cavity in the second plate. The metal balls are formed in the cavities of the lower plate 10. The metal balls are transferred from the cavities of the first plate to a device on which bumps are to be formed.Type: ApplicationFiled: December 28, 2000Publication date: August 30, 2001Inventors: Masayuki Ochiai, Hidefumi Ueda, Michio Sono, Ichiro Yamaguchi, Kazuhiko Mitobe, Koki Otake, Junichi Kasai, Nobuo Kamehara, Yasuo Yamagishi, Masataka Mizukoshi
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Publication number: 20010008310Abstract: The present invention relates to a bump formation method, comprising the steps of providing a mask, in which a plurality of openings have been formed corresponding to a plurality of electrode pads, to a substrate provided with this plurality of electrode pads, filling the openings with a solder paste, and heat treating the solder paste. The solder paste contains a solder powder. This solder powder is one that contains no more than 10 wt % particles whose diameter is greater than the thickness of the mask and no more than 1.5 times this thickness. Preferably, this solder powder is one that contains no more than 10 wt % particles whose diameter is greater than 40% of the diameter of the openings, or one that contains no more than 30 wt % particles whose diameter is 40 to 100% the thickness of the mask.Type: ApplicationFiled: March 15, 2001Publication date: July 19, 2001Applicant: FUJITSU LIMITEDInventors: Seiki Sakuyama, Yasuo Yamagishi, Masataka Mizukoshi
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Patent number: 6140286Abstract: The defluxing agent for flux residue after soldering contains an acid (preferably an organic acid, and particularly an acid stronger than abietic acid; for example, acrylic acid, acetic acid, propionic acid, benzoic acid) and an organic solvent (for example, xylene, benzyl acetate, methyl .alpha.-hydroxyisobutyrate, cyclohexanone, methyl .beta.-methoxyisobutyrate), and if necessary it further contains a monohydric alcohol, a surfactant and a corrosion inhibitor. Rinsing is preferably performed after the cleaning, using a solvent which is miscible with the defluxing agent, in order to completely remove the acid. There is also disclosed a cleaning apparatus which may be generally used for this and other cleaning.Type: GrantFiled: May 30, 1997Date of Patent: October 31, 2000Assignee: Fujitsu LimitedInventors: Keiji Watanabe, Masayuki Ochiai, Yasuo Yamagishi, Ei Yano, Nobuo Igusa, Isamu Takachi