Patents by Inventor Yasutaka Shimizu
Yasutaka Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11862553Abstract: An object is to provide a semiconductor device capable of reducing inductance between a high potential terminal and a low potential terminal while achieving downsizing of the semiconductor device. A semiconductor device includes: the insulating substrate; the circuit pattern including a low potential circuit pattern and a high potential circuit pattern provided on a region adjacent to the low potential circuit pattern; a plurality of semiconductor chips mounted on the circuit pattern; a low potential terminal having one end portion connected to the low potential circuit pattern; and a high potential terminal having one end portion connected to the high potential circuit pattern, wherein the high potential terminal and the low potential terminal include electrode parts and constituting parallel flat plates vertically disposed in parallel to each other and extending on a side of the low potential circuit pattern and electrode parts and protruding from the insulating substrate.Type: GrantFiled: November 15, 2021Date of Patent: January 2, 2024Assignee: Mitsubishi Electric CorporationInventors: Hidetaka Matsuo, Ryo Goto, Yasutaka Shimizu
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Publication number: 20230343748Abstract: A semiconductor device includes: a first circuit pattern having a recessed part in a planar view; a second circuit pattern positioned in the recessed part; a plurality of semiconductor chips bonded onto the first circuit pattern; and wires connecting top electrodes of the plurality of semiconductor chips to the second circuit pattern, wherein a width of the second circuit pattern increases from upstream to downstream on a current path by which a current flows through the second circuit pattern, and the first circuit pattern has a step in a planar view on a side of the recessed part, and a width of the recessed part increases in a tiered way to match an increase in the width of the second circuit pattern.Type: ApplicationFiled: September 9, 2022Publication date: October 26, 2023Applicant: Mitsubishi Electric CorporationInventor: Yasutaka SHIMIZU
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Patent number: 11780071Abstract: There is provided a power tool in which impact applied to a power transmission portion can be mitigated to thereby suppress components constituting the power transmission portion from being deformed and damaged. The power tool includes a brushless motor 3 having a rotation shaft portion 31 rotatable about a rotation axis A1, a housing 2 accommodating therein the brushless motor 3, a power transmission portion 6 configured to receive a rotation force of the rotation shaft portion 31 and to transmit a driving force based on the rotation force, and a driven portion 7 configured to be driven by receiving the transmitted driving force. The rotation shaft portion 31 is supported by the housing 2 so as to be movable relative to the housing 2 in an axial direction of the rotation axis A1.Type: GrantFiled: November 30, 2018Date of Patent: October 10, 2023Assignee: KOKI HOLDINGS CO., LTD.Inventors: Yasutaka Shimizu, Yoshikazu Yokoyama, Naoki Tadokoro, Ryosuke Nakano
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Patent number: 11710671Abstract: A semiconductor module includes a semiconductor element, a substrate on which the semiconductor module is mounted, a heat radiating plate on which the substrate is mounted, a resin case, and a first main current electrode and a second main current electrode, in which in the first main current electrode and the second main current electrode, one end of each thereof is joined to a circuit pattern on the substrate, an other end of each thereof is extended through and incorporated in a side wall of the resin case so as to project outward of the resin case, and each thereof has at least a portion of overlap at which a part thereof overlaps in parallel with each other with a gap therebetween, and each thereof has a slope portion provided between an external projection portion and an internal projection portion.Type: GrantFiled: November 16, 2021Date of Patent: July 25, 2023Assignee: Mitsubishi Electric CorporationInventors: Ryo Goto, Yasutaka Shimizu
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Patent number: 11676871Abstract: A semiconductor device includes a case enclosing a region where a semiconductor element as a component of an electric circuit exists. A resin part is fixed to an inside of the case in contact with the region. The resin part is provided with a conductive film, which is a part of the electric circuit. The conductive film is provided in the resin part so that the conductive film comes into contact with the region.Type: GrantFiled: October 26, 2021Date of Patent: June 13, 2023Assignee: Mitsubishi Electric CorporationInventor: Yasutaka Shimizu
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Patent number: 11610873Abstract: An object of the present disclosure is to provide a semiconductor device capable of confirming withstand voltage of a snubber circuit after providing the snubber circuit and a method of manufacturing the semiconductor device. A semiconductor device according to the present disclosure includes: an insulating substrate; a circuit patterns provided on the insulating substrate; a snubber circuit substrate provided on the insulating substrate separately from the circuit patterns; a resistance provided on one of the circuit patterns and the snubber circuit substrate; a capacitor provided on another one of the circuit patterns and the snubber circuit substrate; and at least one semiconductor element electrically connected to the resistance and the capacitor.Type: GrantFiled: October 23, 2020Date of Patent: March 21, 2023Assignee: Mitsubishi Electric CorporationInventors: Ryo Goto, Takami Otsuki, Yasutaka Shimizu, Shingo Tomioka
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Publication number: 20220328383Abstract: According to an aspect of the present disclosure, a semiconductor device includes a substrate, a resin case surrounding a region just above the substrate in a planar view, a semiconductor chip provided in the region and an electrode including a first portion pulled out from an upper surface of the resin case and a second portion provided below the upper surface of the resin case and to be inserted into the resin case, and being electrically connected to the semiconductor chip, wherein a first notch is formed over the first portion to the second portion in the electrode, and a first groove is formed to expose a portion, formed in the second portion, in the first notch on the upper surface of the resin case.Type: ApplicationFiled: October 26, 2021Publication date: October 13, 2022Applicant: Mitsubishi Electric CorporationInventor: Yasutaka Shimizu
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Publication number: 20220262717Abstract: An object is to provide a semiconductor device capable of reducing inductance between a high potential terminal and a low potential terminal while achieving downsizing of the semiconductor device. A semiconductor device includes: the insulating substrate; the circuit pattern including a low potential circuit pattern and a high potential circuit pattern provided on a region adjacent to the low potential circuit pattern; a plurality of semiconductor chips mounted on the circuit pattern; a low potential terminal having one end portion connected to the low potential circuit pattern; and a high potential terminal having one end portion connected to the high potential circuit pattern, wherein the high potential terminal and the low potential terminal include electrode parts and constituting parallel flat plates vertically disposed in parallel to each other and extending on a side of the low potential circuit pattern and electrode parts and protruding from the insulating substrate.Type: ApplicationFiled: November 15, 2021Publication date: August 18, 2022Applicant: Mitsubishi Electric CorporationInventors: Hidetaka MATSUO, Ryo Goto, Yasutaka Shimizu
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Publication number: 20220230929Abstract: A semiconductor module includes a semiconductor element, a substrate on which the semiconductor module is mounted, a heat radiating plate on which the substrate is mounted, a resin case, and a first main current electrode and a second main current electrode, in which in the first main current electrode and the second main current electrode, one end of each thereof is joined to a circuit pattern on the substrate, an other end of each thereof is extended through and incorporated in a side wall of the resin case so as to project outward of the resin case, and each thereof has at least a portion of overlap at which a part thereof overlaps in parallel with each other with a gap therebetween, and each thereof has a slope portion provided between an external projection portion and an internal projection portion.Type: ApplicationFiled: November 16, 2021Publication date: July 21, 2022Applicant: Mitsubishi Electric CorporationInventors: Ryo Goto, Yasutaka Shimizu
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Patent number: 11348851Abstract: An object is to provide a technology for enabling reduction in the time and cost taken to manufacture a die to be used for molding a case that surrounds semiconductor elements. A semiconductor device includes a base plate, a cooling plate, an insulating substrate, a semiconductor element, a case, a lead frame formed integrally with the case and including a terminal formed on one end portion of the lead frame and protruding outward, and a sealant. The case includes a pair of first case components arranged to face each other, and a pair of second case components arranged to face each other and crossing the pair of first case components. Joining end portions of the first case components to end portions of the pair of second case components forms the case.Type: GrantFiled: November 30, 2020Date of Patent: May 31, 2022Assignee: Mitsubishi Electric CorporationInventor: Yasutaka Shimizu
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Publication number: 20220044977Abstract: A semiconductor device includes a case enclosing a region where a semiconductor element as a component of an electric circuit exists. A resin part is fixed to an inside of the case in contact with the region. The resin part is provided with a conductive film, which is a part of the electric circuit. The conductive film is provided in the resin part so that the conductive film comes into contact with the region.Type: ApplicationFiled: October 26, 2021Publication date: February 10, 2022Applicant: Mitsubishi Electric CorporationInventor: Yasutaka SHIMIZU
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Patent number: 11244875Abstract: A semiconductor device includes a case enclosing a region where a semiconductor element as a component of an electric circuit exists. A resin part is fixed to an inside of the case in contact with the region. The resin part is provided with a conductive film, which is a part of the electric circuit. The conductive film is provided in the resin part so that the conductive film comes into contact with the region.Type: GrantFiled: September 3, 2019Date of Patent: February 8, 2022Assignee: Mitsubishi Electric CorporationInventor: Yasutaka Shimizu
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Publication number: 20210296189Abstract: An object is to provide a technology for enabling reduction in the time and cost taken to manufacture a die to be used for molding a case that surrounds semiconductor elements. A semiconductor device includes a base plate, a cooling plate, an insulating substrate, a semiconductor element, a case, a lead frame formed integrally with the case and including a terminal formed on one end portion of the lead frame and protruding outward, and a sealant. The case includes a pair of first case components arranged to face each other, and a pair of second case components arranged to face each other and crossing the pair of first case components. Joining end portions of the first case components to end portions of the pair of second case components forms the case.Type: ApplicationFiled: November 30, 2020Publication date: September 23, 2021Applicant: Mitsubishi Electric CorporationInventor: Yasutaka SHIMIZU
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Publication number: 20210249389Abstract: An object of the present disclosure is to provide a semiconductor device capable of confirming withstand voltage of a snubber circuit after providing the snubber circuit and a method of manufacturing the semiconductor device. A semiconductor device according to the present disclosure includes: an insulating substrate; a circuit patterns provided on the insulating substrate; a snubber circuit substrate provided on the insulating substrate separately from the circuit patterns; a resistance provided on one of the circuit patterns and the snubber circuit substrate; a capacitor provided on another one of the circuit patterns and the snubber circuit substrate; and at least one semiconductor element electrically connected to the resistance and the capacitor.Type: ApplicationFiled: October 23, 2020Publication date: August 12, 2021Applicant: Mitsubishi Electric CorporationInventors: Ryo GOTO, Takami OTSUKI, Yasutaka SHIMIZU, Shingo TOMIOKA
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Publication number: 20210187722Abstract: There is provided a power tool in which impact applied to a power transmission portion can be mitigated to thereby suppress components constituting the power transmission portion from being deformed and damaged. The power tool includes a brushless motor 3 having a rotation shaft portion 31 rotatable about a rotation axis A1, a housing 2 accommodating therein the brushless motor 3, a power transmission portion 6 configured to receive a rotation force of the rotation shaft portion 31 and to transmit a driving force based on the rotation force, and a driven portion 7 configured to be driven by receiving the transmitted driving force. The rotation shaft portion 31 is supported by the housing 2 so as to be movable relative to the housing 2 in an axial direction of the rotation axis A1.Type: ApplicationFiled: November 30, 2018Publication date: June 24, 2021Applicant: KOKI HOLDINGS CO., LTD.Inventors: Yasutaka SHIMIZU, Yoshikazu YOKOYAMA, Naoki TADOKORO, Ryosuke NAKANO
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Publication number: 20200185287Abstract: A semiconductor device includes a case enclosing a region where a semiconductor element as a component of an electric circuit exists. A resin part is fixed to an inside of the case in contact with the region. The resin part is provided with a conductive film, which is a part of the electric circuit. The conductive film is provided in the resin part so that the conductive film comes into contact with the region.Type: ApplicationFiled: September 3, 2019Publication date: June 11, 2020Applicant: Mitsubishi Electric CorporationInventor: Yasutaka SHIMIZU
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Patent number: 10601307Abstract: The object is to provide a technology for enabling detection of the voltage resistance in an assembled snubber substrate. A semiconductor device includes: a snubber substrate fixed to a base while being spaced from a p electrode and an n electrode; a snubber circuit disposed on the snubber substrate and electrically connected to the p electrode and the n electrode; and a semiconductor element electrically connected to the snubber circuit. The base includes an insulating component insulating the p electrode, the n electrode, and the snubber substrate from one another.Type: GrantFiled: June 24, 2019Date of Patent: March 24, 2020Assignee: Mitsubishi Electric CorporationInventors: Yasutaka Shimizu, Yuji Miyazaki, Kazuya Okada
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Publication number: 20200083801Abstract: The object is to provide a technology for enabling detection of the voltage resistance in an assembled snubber substrate. A semiconductor device includes: a snubber substrate fixed to a base while being spaced from a p electrode and an n electrode; a snubber circuit disposed on the snubber substrate and electrically connected to the p electrode and the n electrode; and a semiconductor element electrically connected to the snubber circuit. The base includes an insulating component insulating the p electrode, the n electrode, and the snubber substrate from one another.Type: ApplicationFiled: June 24, 2019Publication date: March 12, 2020Applicant: Mitsubishi Electric CorporationInventors: Yasutaka Shimizu, Yuji Miyazaki, Kazuya Okada
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Patent number: 10504817Abstract: Provided is a technique for improving product attachment. In a semiconductor device, the following expression is satisfied by an angle A formed by an imaginary line connecting two attachment holes together and an imaginary line connecting together a lowest point of one of two projections positioned in a surrounding portion of one of the two attachment holes and a contact point between a bulge and a heat sink, with a screw fastened to the heat sink through the one attachment hole, where M represents a vertical direction between the lower end of a body and the lower end of a case, where W represents a bulge amount of the bulge, where T represents a height of the projection, where L represents a horizontal distance from the outer peripheral end of the case to the outer peripheral end of the heat dissipation plate: 0<A<arctan((M+W?T)/L).Type: GrantFiled: June 11, 2018Date of Patent: December 10, 2019Assignee: Mitsubishi Electric CorporationInventors: Kazuya Okada, Hiroki Muraoka, Koichi Masuda, Yasutaka Shimizu, Shoji Izumi
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Patent number: 10276464Abstract: Provided is a technique of reducing detachment of a sealing resin in a semiconductor device, thereby achieving an increased improvement in lifetime of the semiconductor device. The semiconductor device includes the following: an insulating substrate; a metal block disposed on the upper surface of the insulating substrate; a semiconductor element mounted on the upper surface of the metal block; a case enclosing the semiconductor element, the metal block, and the insulating substrate; and a sealing resin sealing the semiconductor element and the metal block. The metal block includes at least one groove on a surface of the metal block, the surface being in contact with the sealing resin. The opening of the at least one groove has a width narrower than a width of the bottom surface of the at least one groove.Type: GrantFiled: December 14, 2017Date of Patent: April 30, 2019Assignee: Mitsubishi Electric CorporationInventors: Yasutaka Shimizu, Takuya Takahashi, Yoshitaka Otsubo