Patents by Inventor Yen Chuang

Yen Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190312144
    Abstract: A semiconductor device includes a gate stack over a semiconductor substrate. A spacer extends substantially along a first sidewall of the gate stack. An epitaxy structure is in the semiconductor substrate. A liner wraps around the epitaxy structure and has an outer surface in contact with the semiconductor substrate and an inner surface facing the epitaxy structure. The outer surface of the liner has a first facet extending upwards and towards the gate stack from a bottom of the first liner and a second facet extending upwards and towards an outer sidewall of the spacer from a top of the first facet to a top of the liner, such that a corner is formed between the first facet and the second facet, and the inner surface of the first liner defines a first curved corner pointing towards the corner formed between the first facet and the second facet.
    Type: Application
    Filed: June 7, 2019
    Publication date: October 10, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Fen CHEN, Chui-Ya PENG, Ching YU, Pin-Hen LIN, Yen CHUANG, Yuh-Ta FAN
  • Patent number: 10319857
    Abstract: A semiconductor device includes a substrate, a liner, and an epitaxy structure. The substrate has a recess. The liner is disposed in the recess. The liner is denser than the substrate. The epitaxy structure is disposed in the recess. The liner is disposed between the epitaxy structure and the substrate.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: June 11, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Fen Chen, Chui-Ya Peng, Ching Yu, Pin-Hen Lin, Yen Chuang, Yuh-Ta Fan
  • Publication number: 20180282515
    Abstract: A superabsorbent polymer includes polymeric particles, surface cross-linking agents and an extract of a plant of Sapindaceae. The polymeric particles have cross-linking inside the polymeric particles. The surface cross-linking agents are covalently bound to the surface of the polymeric particles so as to constitute a layer of surface cross-linked region at the surface of each polymeric particle, and the extract of the plant of Sapindaceae covers the surface of the polymeric particles.
    Type: Application
    Filed: November 23, 2017
    Publication date: October 4, 2018
    Inventors: Zhong-Yi Chen, Yu-Yen Chuang, Li-Han Huang, Yu-Sam Lin, Feng-Yi Chen, Ching-Hua Liang
  • Publication number: 20180282507
    Abstract: A superabsorbent polymer includes polymer particles, surface cross-linking agents and particles made of silicon-containing inorganic salt. The polymer particles have cross-linking inside the polymer particles. The surface cross-linking agents are covalently bound to the surface of the polymer particles so as to constitute a surface cross-linked region at the surface of each said resin particle, and the particles made of silicon-containing inorganic salt cover the surface of the polymer particles.
    Type: Application
    Filed: December 4, 2017
    Publication date: October 4, 2018
    Inventors: Zhong-Yi Chen, Yu-Yen Chuang, Li-Han Huang, Yu-Sam Lin, Feng-Yi Chen, Ching-Hua Liang
  • Patent number: 10029162
    Abstract: A ball bat includes a barrel in which one or more stiffening elements or damping elements, or both, are located. The stiffening or damping elements may be positioned at a variety of locations, and may have a variety of configurations, for selectively reducing the barrel's performance without appreciably increasing the bat's moment of inertia.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: July 24, 2018
    Assignee: EASTON DIAMOND SPORTS, LLC
    Inventors: Dewey Chauvin, William B. Giannetti, Hsing-Yen Chuang, Ian Montgomery
  • Publication number: 20180069120
    Abstract: A semiconductor device includes a substrate, a liner, and an epitaxy structure. The substrate has a recess. The liner is disposed in the recess. The liner is denser than the substrate. The epitaxy structure is disposed in the recess. The liner is disposed between the epitaxy structure and the substrate.
    Type: Application
    Filed: October 30, 2017
    Publication date: March 8, 2018
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Fen CHEN, Chui-Ya PENG, Ching YU, Pin-Hen LIN, Yen CHUANG, Yuh-Ta FAN
  • Patent number: 9898115
    Abstract: A touch electrode layer includes a plurality of first touch electrodes and a plurality of second touch electrodes. The first touch electrodes are arranged to form a rectangle, wherein shapes of the first touch electrodes have the same size. The second touch electrodes are disposed around a periphery of the first touch electrodes. The second touch electrodes and the first touch electrodes are arranged to form a circle or a quasi-circle so as to define a circuit touch area or a quasi-circle touch area. A shape of each of the second touch electrodes is an arcuate triangle.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: February 20, 2018
    Assignee: ITE TECH. INC.
    Inventors: Tsang-Chih Wu, Tsung-Yen Chuang, Yu-Fen Weng, Fang-Nan Chu
  • Patent number: 9812570
    Abstract: A semiconductor device includes a substrate, a liner, and an epitaxy structure. The substrate has a recess. The liner is disposed in the recess. The liner is denser than the substrate. The epitaxy structure is disposed in the recess. The liner is disposed between the epitaxy structure and the substrate.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: November 7, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Fen Chen, Chui-Ya Peng, Ching Yu, Pin-Hen Lin, Yen Chuang, Yuh-Ta Fan
  • Patent number: 9748482
    Abstract: A semiconductor sensing device that includes a nanowire conductive layer, a semiconductor sensing layer, and a conductive layer is provided. The nanowire conductive layer includes a plurality of connected conductive nanowires, and gaps are formed between the conductive nanowires. The semiconductor sensing layer is electrically connected to the nanowire conductive layer. The conductive layer is electrically connected to the semiconductor sensing layer. The semiconductor sensing layer is located between the nanowire conductive layer and the conductive layer. A manufacturing method of a semiconductor sensing device is also provided.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: August 29, 2017
    Assignee: E Ink Holdings Inc.
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Pei-Chen Yu, Ming-Yen Chuang, Chia-Chun Yeh
  • Patent number: 9744416
    Abstract: A composite ball bat includes multiple failure planes within a barrel wall. By including multiple failure planes in a barrel wall, the bat exhibits a drop in performance when subjected to rolling or other extreme deflection, with no temporary increase in barrel performance. Because the barrel performance does not increase, the ball bat is able to comply with performance limitations imposed by regulatory associations.
    Type: Grant
    Filed: April 3, 2014
    Date of Patent: August 29, 2017
    Assignee: EASTON DIAMOND SPORTS, LLC
    Inventors: Hsing-Yen Chuang, Dewey Chauvin
  • Patent number: 9721827
    Abstract: One or more semiconductor arrangements are provided. The semiconductor arrangements include a buried layer over a well, a dielectric layer over the buried layer, a first gate stack over the dielectric layer and a S/D region disposed proximate the first gate stack. The S/D region has a first tip proximity region that extends under the first gate stack. One or more methods of forming a semiconductor arrangement are also provided. The methods include forming a S/D recess in at least one of a dielectric layer, a buried layer or a well, wherein the S/D recess is proximate a first gate stack and has a first recess tip proximity region that extends under the first gate stack as a function of the buried layer, and forming a S/D region in the S/D recess such that the S/D region has a first tip proximity region that extends under the first gate stack.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: August 1, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Wei-Fan Lee, Yuan-feng Chao, Yen Chuang
  • Publication number: 20170024030
    Abstract: A touch electrode layer includes a plurality of first touch electrodes and a plurality of second touch electrodes. The first touch electrodes are arranged to form a rectangle, wherein shapes of the first touch electrodes have the same size. The second touch electrodes are disposed around a periphery of the first touch electrodes. The second touch electrodes and the first touch electrodes are arranged to form a circle or a quasi-circle so as to define a circuit touch area or a quasi-circle touch area. A shape of each of the second touch electrodes is an arcuate triangle.
    Type: Application
    Filed: October 7, 2015
    Publication date: January 26, 2017
    Applicant: ITE TECH. INC.
    Inventors: Tsang-Chih Wu, Tsung-Yen Chuang, Yu-Fen Weng, Fang-Nan Chu
  • Publication number: 20170005196
    Abstract: A semiconductor device includes a substrate, a liner, and an epitaxy structure. The substrate has a recess. The liner is disposed in the recess. The liner is denser than the substrate. The epitaxy structure is disposed in the recess. The liner is disposed between the epitaxy structure and the substrate.
    Type: Application
    Filed: June 30, 2015
    Publication date: January 5, 2017
    Inventors: Chih-Fen CHEN, Chui-Ya PENG, Ching YU, Pin-Hen LIN, Yen CHUANG, Yuh-Ta FAN
  • Patent number: 9463364
    Abstract: A ball bat includes one or more low-durability regions fortified by one or more reinforcing elements, such as a structural patch. If the reinforcing element is altered or removed, the durability of the ball bat is significantly reduced. For example, if the ball bat is subjected to internal shaving or external rolling in an attempt to increase the bat's performance, the reinforcing element would be removed or damaged such that the durability of the bat is reduced to the point that the ball bat's performance remains below a specified limit.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: October 11, 2016
    Assignee: EASTON BASEBALL/SOFTBALL INC.
    Inventors: Hsing-Yen Chuang, Dewey Chauvin
  • Patent number: 9396063
    Abstract: An operating method of a storage device is provided. The operating method comprises the following steps. First, a first data is read from a target address of a first storage unit. Then, an assisting unit checks whether the target address is corresponding to a second data stored in a second storage unit. If the target address is corresponding to the second data, the assisting unit updates the first data according to the second data to generate an updated data. Next, an Error Correction Code (ECC) performs a decoding process on the updated data to generate a decoded data.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: July 19, 2016
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Ren-Shuo Liu, Meng-Yen Chuang, Chia-Lin Yang, Cheng-Hsuan Li, Kin-Chu Ho, Hsiang-Pang Li
  • Publication number: 20150293169
    Abstract: Present example embodiments relate generally to methods, logic, systems, and devices for inspecting a semiconductor device. Example methods comprise applying an initial energy from an energy source to a first location of a conductive layer of the semiconductor device. Example methods further comprise measuring a resultant energy passing through the conductive layer using a probe at a second location of the conductive layer and analyzing the measured resultant energy passing through the conductive layer. Example methods further comprise determining a presence of an inconsistency in the conductive layer based on the analyzing.
    Type: Application
    Filed: April 14, 2014
    Publication date: October 15, 2015
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yen Chuang, Che-Lun Hung
  • Publication number: 20150243785
    Abstract: One or more semiconductor arrangements are provided. The semiconductor arrangements include a buried layer over a well, a dielectric layer over the buried layer, a first gate stack over the dielectric layer and a S/D region disposed proximate the first gate stack. The S/D region has a first tip proximity region that extends under the first gate stack. One or more methods of forming a semiconductor arrangement are also provided. The methods include forming a S/D recess in at least one of a dielectric layer, a buried layer or a well, wherein the S/D recess is proximate a first gate stack and has a first recess tip proximity region that extends under the first gate stack as a function of the buried layer, and forming a S/D region in the S/D recess such that the S/D region has a first tip proximity region that extends under the first gate stack.
    Type: Application
    Filed: February 27, 2014
    Publication date: August 27, 2015
    Inventors: Wei-Fan Lee, Yuan-feng Chao, Yen Chuang
  • Publication number: 20150233851
    Abstract: A semiconductor sensing device that includes a nanowire conductive layer, a semiconductor sensing layer, and a conductive layer is provided. The nanowire conductive layer includes a plurality of connected conductive nanowires, and gaps are formed between the conductive nanowires. The semiconductor sensing layer is electrically connected to the nanowire conductive layer. The conductive layer is electrically connected to the semiconductor sensing layer. The semiconductor sensing layer is located between the nanowire conductive layer and the conductive layer. A manufacturing method of a semiconductor sensing device is also provided.
    Type: Application
    Filed: December 9, 2014
    Publication date: August 20, 2015
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Pei-Chen Yu, Ming-Yen Chuang, Chia-Chun Yeh
  • Publication number: 20150205088
    Abstract: An embodiment disclosed bevel-axial auto-focusing method for a microscopic system, including: capturing full-frame bevel-axial input image; using image analysis to read image information and transmitting grayscale information to a statistic analysis module; the statistic module extracting image statistic characteristics and performing curve fitting with probability function; and estimating the optimal focus point based on the post-fitting characteristic parameters. A preferred embodiment combines image with Gaussian curve fitting and Kalman filter, and analyzes the in-focus position based on image quality so as to directly determine the optimal rectification value of the in-focus position on the object surface. The method can improve the accuracy and speed of auto-focusing.
    Type: Application
    Filed: January 23, 2014
    Publication date: July 23, 2015
    Applicant: U&U Engineering Inc.
    Inventors: Ta-Ming SHIH, Ho-Chung CHANG, Ting-Wei CHI, Hsiao-Yen CHUANG
  • Publication number: 20150182830
    Abstract: A ball bat includes one or more low-durability regions fortified by one or more reinforcing elements, such as a structural patch. If the reinforcing element is altered or removed, the durability of the ball bat is significantly reduced. For example, if the ball bat is subjected to internal shaving or external rolling in an attempt to increase the bat's performance, the reinforcing element would be removed or damaged such that the durability of the bat is reduced to the point that the ball bat's performance remains below a specified limit.
    Type: Application
    Filed: March 13, 2015
    Publication date: July 2, 2015
    Inventors: Hsing-Yen Chuang, Dewey Chauvin