Patents by Inventor Yen-Chun Huang
Yen-Chun Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170140942Abstract: A device having an epitaxial region and dual metal-semiconductor alloy surfaces is provided. The epitaxial region includes an upward facing facet and a downward facing facet. The upward facing facet has a first metal-semiconductor alloy surface and the downward facing facet has a second metal-semiconductor alloy surface, wherein the first metal-semiconductor alloy is different than the second metal-semiconductor alloy.Type: ApplicationFiled: January 30, 2017Publication date: May 18, 2017Inventors: Chun Hsiung Tsai, Chi-Yuan Shih, Gin-Chen Huang, Clement Hsingjen Wann, Li-Chi Yu, Chin-Hsiang Lin, Ling-Yen Yeh, Meng-Chun Chang, Neng-Kuo Chen, Sey-Ping Sun, Ta-Chun Ma, Yen-Chun Huang
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Patent number: 9559182Abstract: A device having an epitaxial region and dual metal-semiconductor alloy surfaces is provided. The epitaxial region includes an upward facing facet and a downward facing facet. The upward facing facet has a first metal-semiconductor alloy surface and the downward facing facet has a second metal-semiconductor alloy surface, wherein the first metal-semiconductor alloy is different than the second metal-semiconductor alloy.Type: GrantFiled: December 14, 2015Date of Patent: January 31, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Clement Hsingjen Wann, Sey-Ping Sun, Ling-Yen Yeh, Chi-Yuan Shih, Li-Chi Yu, Chun Hsiung Tsai, Chin-Hsiang Lin, Neng-Kuo Chen, Meng-Chun Chang, Ta-Chun Ma, Gin-Chen Huang, Yen-Chun Huang
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Patent number: 9437712Abstract: A method embodiment includes forming a protective liner over the substrate and forming an inter-layer dielectric over the protective liner. The protective liner covers a sidewall of a gate spacer. The method further includes patterning a contact opening in the first ILD to expose a portion of the protective liner. The portion of the protective liner in the contact opening is removed to expose an active region at a top surface of the semiconductor substrate. A contact is formed in the contact opening. The contact is electrically connected to the active region.Type: GrantFiled: March 7, 2014Date of Patent: September 6, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Chun Huang, Bor Chiuan Hsieh, Tai-Chun Huang, Chia-Ying Lee, Tze-Liang Lee
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Patent number: 9369017Abstract: A motor includes a base plate, a stator, a rotor, a circuit board and a Hall element. The stator is disposed on the base plate. The rotor is disposed around the stator, and includes a rotating shaft and a magnetic assembly. The rotating shaft is extended to a center part of the stator. The magnetic assembly includes plural magnets. The circuit board is arranged between the stator and the base plate and comprises a Hall element. A first gap and a second gap are arranged between every two adjacent magnets. The first gap is in the vicinity of the Hall element, and opposed to the second gap. The distance of a vacant portion of the first gap is shorter than the distance of the second gap, thereby facilitating continuous and steady magnetic induction between the Hall element and the magnetic assembly.Type: GrantFiled: September 15, 2011Date of Patent: June 14, 2016Assignee: DELTA ELECTRONICS, INC.Inventors: Han-En Chien, Meng-Yu Chen, Yen-Chun Huang, Kun-Chou Lee
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Publication number: 20160099331Abstract: A device having an epitaxial region and dual metal-semiconductor alloy surfaces is provided. The epitaxial region includes an upward facing facet and a downward facing facet. The upward facing facet has a first metal-semiconductor alloy surface and the downward facing facet has a second metal-semiconductor alloy surface, wherein the first metal-semiconductor alloy is different than the second metal-semiconductor alloy.Type: ApplicationFiled: December 14, 2015Publication date: April 7, 2016Inventors: Clement Hsingjen Wann, Sey-Ping Sun, Ling-Yen Yeh, Chi-Yuan Shih, Li-Chi Yu, Chun Hsiung Tsai, Chin-Hsiang Lin, Neng-Kuo Chen, Meng-Chun Chang, Ta-Chun Ma, Gin-Chen Huang, Yen-Chun Huang
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Patent number: 9305841Abstract: A method including forming a trench over a layer disposed on a semiconductor substrate. The trench is filled with a first material to form a filled trench. A feature of a second material is formed over the filled trench. The feature is disposed over the filled trench and extends along two opposing sidewalls of the filled trench to a top surface of the layer. The feature is then planarized to expose a top surface of the filled trench and provide a first portion of the feature adjacent a first sidewall of the two opposing sidewalls of the filled trench and a second portion of the feature adjacent a second sidewall of the two opposing sidewalls of the filled trench. The first and second portions of the feature are used to define a dimension of an interconnect feature disposed over the semiconductor substrate.Type: GrantFiled: June 8, 2015Date of Patent: April 5, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Chun Huang, Ming-Feng Shieh, Ken-Hsien Hsieh, Chih-Ming Lai, Ru-Gun Liu, Tsai-Sheng Gau
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Patent number: 9281193Abstract: A method includes forming a first pattern having a first feature of a first material on a semiconductor substrate. A second pattern with a second feature and third feature of a second material, interposed by the first feature, is formed on the semiconductor substrate. Spacer elements then are formed on sidewalls of the first feature, the second feature, and the third feature. After forming the spacer elements, the second material comprising the second and third features is selectively removed to form a first opening and a second opening. The first feature, the first opening and the second opening are used as a masking element to etch the target layer.Type: GrantFiled: June 3, 2015Date of Patent: March 8, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Chun Huang, Chih-Ming Lai, Ken-Hsien Hsieh, Ming-Feng Shieh
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Patent number: 9214556Abstract: A method includes growing an epitaxy semiconductor region at a major surface of a wafer. The epitaxy semiconductor region has an upward facing facet facing upwardly and a downward facing facet facing downwardly. The method further includes forming a first metal silicide layer contacting the upward facing facet, and forming a second metal silicide layer contacting the downward facing facet. The first metal silicide layer and the second metal silicide layer comprise different metals.Type: GrantFiled: August 9, 2013Date of Patent: December 15, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Clement Hsingjen Wann, Sey-Ping Sun, Ling-Yen Yeh, Chi-Yuan Shih, Li-Chi Yu, Chun Hsiung Tsai, Chin-Hsiang Lin, Neng-Kuo Chen, Meng-Chun Chang, Ta-Chun Ma, Gin-Chen Huang, Yen-Chun Huang
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Patent number: 9178390Abstract: A motor comprises a coil structure and a plurality of magnetic materials. The coil structure includes three winding groups, each of which has a plurality of winding portions. The winding portions have an interval therebetween, and are electrically connected by a wire. The magnetic materials are disposed adjacent to the coil structure and corresponding to the winding groups. Accordingly, the motor has more magnetic materials within the same bending angle of the enameled wire, so that the motor can output larger torsion and power to enhance the motor efficiency.Type: GrantFiled: August 29, 2012Date of Patent: November 3, 2015Assignee: DELTA ELECTRONICS, INC.Inventors: Sheng-En Mai, Chia-Hung Hsu, Yen-Chun Huang
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Publication number: 20150287635Abstract: A method including forming a trench over a layer disposed on a semiconductor substrate. The trench is filled with a first material to form a filled trench. A feature of a second material is formed over the filled trench. The feature is disposed over the filled trench and extends along two opposing sidewalls of the filled trench to a top surface of the layer. The feature is then planarized to expose a top surface of the filled trench and provide a first portion of the feature adjacent a first sidewall of the two opposing sidewalls of the filled trench and a second portion of the feature adjacent a second sidewall of the two opposing sidewalls of the filled trench. The first and second portions of the feature are used to define a dimension of an interconnect feature disposed over the semiconductor substrate.Type: ApplicationFiled: June 8, 2015Publication date: October 8, 2015Inventors: Yen-Chun Huang, Ming-Feng Shieh, Ken-Hsien Hsieh, Chih-Ming Lai, Ru-Gun Liu, Tsai-Sheng Gau
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Publication number: 20150270129Abstract: A method includes forming a first pattern having a first feature of a first material on a semiconductor substrate. A second pattern with a second feature and third feature of a second material, interposed by the first feature, is formed on the semiconductor substrate. Spacer elements then are formed on sidewalls of the first feature, the second feature, and the third feature. After forming the spacer elements, the second material comprising the second and third features is selectively removed to form a first opening and a second opening. The first feature, the first opening and the second opening are used as a masking element to etch the target layer.Type: ApplicationFiled: June 3, 2015Publication date: September 24, 2015Inventors: Yen-Chun Huang, Chih-Ming Lai, Ken-Hsien Hsieh, Ming-Feng Shieh
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Publication number: 20150255275Abstract: A method embodiment includes forming a protective liner over the substrate and forming an inter-layer dielectric over the protective liner. The protective liner covers a sidewall of a gate spacer. The method further includes patterning a contact opening in the first ILD to expose a portion of the protective liner. The portion of the protective liner in the contact opening is removed to expose an active region at a top surface of the semiconductor substrate. A contact is formed in the contact opening. The contact is electrically connected to the active region.Type: ApplicationFiled: March 7, 2014Publication date: September 10, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yen-Chun Huang, Bor Chiuan Hsieh, Tai-Chun Huang, Chia-Ying Lee, Tze-Liang Lee
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Patent number: 9076736Abstract: A method includes forming a first pattern having a first opening on a semiconductor substrate. The first opening is then filled. A second pattern of a first and second feature, interposed by the filled opening, is formed on the semiconductor substrate. Spacer elements then are formed on sidewalls of the filled opening, the first feature and the second feature. After forming the spacer elements, the material comprising first and second features is removed to form a second opening and a third opening. The filled opening, the second opening and the third opening are used as a masking element to etch a target layer of the substrate.Type: GrantFiled: March 14, 2013Date of Patent: July 7, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Chun Huang, Ming-Feng Shieh, Chih-Ming Lai, Ken-Hsien Hsieh
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Patent number: 9054159Abstract: A method including forming a first pattern having a first and second feature is described. A masking layer is formed over the first and second features. An opening is patterned in the masking layer. The opening can extend over at least one of the first and second features. The patterned opening is then used to form a third feature (filled trench) between the first and second features. A second pattern is then formed that includes a fourth feature and fifth feature each having an edge defined by the third feature. The first, second, fourth and fifth features may then be used to pattern an underlying layer over the semiconductor substrate.Type: GrantFiled: August 5, 2013Date of Patent: June 9, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Chun Huang, Ming-Feng Shieh, Ken-Hsien Hsieh, Chih-Ming Lai, Ru-Gun Liu, Tsai-Sheng Gau
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Publication number: 20150041918Abstract: A method includes growing an epitaxy semiconductor region at a major surface of a wafer. The epitaxy semiconductor region has an upward facing facet facing upwardly and a downward facing facet facing downwardly. The method further includes forming a first metal silicide layer contacting the upward facing facet, and forming a second metal silicide layer contacting the downward facing facet. The first metal silicide layer and the second metal silicide layer comprise different metals.Type: ApplicationFiled: August 9, 2013Publication date: February 12, 2015Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Clement Hsingjen Wann, Sey-Ping Sun, Ling-Yen Yeh, Chi-Yuan Shih, Li-Chi Yu, Chun Hsiung Tsai, Chin-Hsiang Lin, Neng-Kuo Chen, Meng-Chun Chang, Ta-Chun Ma, Gin-Chen Huang, Yen-Chun Huang
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Publication number: 20140273446Abstract: A method including forming a first pattern having a first and second feature is described. A masking layer is formed over the first and second features. An opening is patterned in the masking layer. The opening can extend over at least one of the first and second features. The patterned opening is then used to form a third feature (filled trench) between the first and second features. A second pattern is then formed that includes a fourth feature and fifth feature each having an edge defined by the third feature. The first, second, fourth and fifth features may then be used to pattern an underlying layer over the semiconductor substrate.Type: ApplicationFiled: August 5, 2013Publication date: September 18, 2014Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Chun Huang, Ming-Feng Shieh, Ken-Hsien Hsieh, Chih-Ming Lai, Ru-Gun Liu, Tsai-Sheng Gau
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Publication number: 20130147305Abstract: A motor comprises a coil structure and a plurality of magnetic materials. The coil structure includes three winding groups, each of which has a plurality of winding portions. The winding portions have an interval therebetween, and are electrically connected by a wire. The magnetic materials are disposed adjacent to the coil structure and corresponding to the winding groups. Accordingly, the motor has more magnetic materials within the same bending angle of the enameled wire, so that the motor can output larger torsion and power to enhance the motor efficiency.Type: ApplicationFiled: August 29, 2012Publication date: June 13, 2013Inventors: Sheng-En MAI, Chia-Hung HSU, Yen-Chun HUANG
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Publication number: 20120068581Abstract: A motor includes a base plate, a stator, a rotor, a circuit board and a Hall element. The stator is disposed on the base plate. The rotor is disposed around the stator, and includes a rotating shaft and a magnetic assembly. The rotating shaft is extended to a center part of the stator. The magnetic assembly includes plural magnets. The circuit board is arranged between the stator and the base plate and comprises a Hall element. A first gap and a second gap are arranged between every two adjacent magnets. The first gap is in the vicinity of the Hall element, and opposed to the second gap. The distance of a vacant portion of the first gap is shorter than the distance of the second gap, thereby facilitating continuous and steady magnetic induction between the Hall element and the magnetic assembly.Type: ApplicationFiled: September 15, 2011Publication date: March 22, 2012Applicant: DELTA ELECTRONICS, INC.Inventors: Han-En Chien, Meng-Yu Chen, Yen-Chun Huang, Kun-Chou Lee
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Patent number: 8057166Abstract: A passive fan includes a frame, at least one impeller and at least one driving device. The impeller is disposed in the frame. The driving device is disposed in the body of the frame and separated from the impeller, and drives the impeller to rotate. The driving device is an independent motor, a driver, a rotating wheel or a driving gear.Type: GrantFiled: January 3, 2008Date of Patent: November 15, 2011Assignee: Delta Electronics, Inc.Inventors: Li-Hui Hsiao, Tsung-Yu Lei, Yen-Chun Huang
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Publication number: 20090004003Abstract: A passive fan includes a frame, at least one impeller and at least one driving device. The impeller is disposed in the frame. The driving device is disposed in the body of the frame and separated from the impeller, and drives the impeller to rotate. The driving device is an independent motor, a driver, a rotating wheel or a driving gear.Type: ApplicationFiled: January 3, 2008Publication date: January 1, 2009Inventors: Li-Hui HSIAO, Tsung-Yu Lei, Yen-Chun Huang