Abstract: A comparator module applied to a voltage level clamping circuit which can be implemented in an integrated circuit (IC) is provided. The IC includes a parasitic diode coupled between a first voltage source and a second voltage source. The voltage level clamping circuit includes a switch module and a comparator module. The comparator module has an output terminal, a first input terminal coupled to a first voltage source, and a second input terminal coupled to a second voltage source. The comparator module includes a current source module, a first voltage level adjusting circuit module, a second voltage level adjusting circuit module, and a comparing circuit module.

Abstract: A voltage level clamping circuit which can be implemented in an integrated circuit (IC) and a high-speed comparator module, wherein the IC includes a parasitic diode coupled between a first voltage source and a second voltage source. The voltage level clamping circuit includes a switch module coupled between the first voltage source and the second voltage source and a comparator module having an output terminal coupled to the switch module, a first input terminal coupled to the first voltage source, and a second input terminal coupled to the second voltage source, for comparing a voltage level of the first voltage source with a voltage level of the second voltage source to generate an output signal, and transmitting the output signal to the switch module to control a conducting state of the switch module to selectively clamp the voltage level of the second voltage source.

Abstract: An electrostatic discharge (ESD) protection circuit is provided. The circuit includes at least one fuse cell and a metal oxide semiconductor field effect transistor (MOSFET). Each of the fuse cells includes a fuse and outputs a bit data according to whether the fuse is melted or not. The MOSFET has a first terminal coupled to each of the fuse cells and a second terminal coupled to a voltage source. The MOSFET is for absorbing an ESD pulse so that the ESD pulse won't melt any one of the fuses.

Abstract: An optical signal detection apparatus and method for a computer mouse compares two output signals of a first photo-transistor and a second photo-transistor to obtain a reference signal. Then a pulse signal generating unit utilizes the reference signal to generate a series of pulse signals each occurring when the voltage level of the reference signal is changed. Thereafter a sample and hold circuit samples and holds the voltage value of the output signals of the photo-transistors at the moments that pulse signals are generated. A dynamic reference voltage generating unit uses the sampled voltage values to calculate a dynamic reference voltage. The voltage level of the dynamic reference voltage is varied with the output signals of the photo-transistors. By using the dynamic reference voltage to compare with the output signals of the photo-transistors, the on/off statuses of the photo-transistors can be precisely detected.

Abstract: A low voltage generating circuit has a first current mirror to provide a first stable current, a second current mirror coupled to the first current mirror and a voltage generating unit connected to the second current mirror. The second current mirror provides a second current that is proportional to the first current in the voltage generating unit. The voltage generating unit utilizes three resistors in a T-shaped configuration, wherein a voltage output is taken from the T-shaped configuration and can output a voltage value less than one volt.

Abstract: An optical signal detection apparatus and method for a computer mouse compares two output signals of a first photo-transistor and a second photo-transistor to obtain a reference signal. Then a pulse signal generating unit utilizes the reference signal to generate a series of pulse signals each occurring when the voltage level of the reference signal is changed. Thereafter a sample and hold circuit samples and holds the voltage value of the output signals of the photo-transistors at the moments that pulse signals are generated. A dynamic reference voltage generating unit uses the sampled voltage values to calculate a dynamic reference voltage. The voltage level of the dynamic reference voltage is varied with the output signals of the photo-transistors. By using the dynamic reference voltage to compare with the output signals of the photo-transistors, the on/off statuses of the photo-transistors can be precisely detected.

Abstract: A low voltage generating circuit has a first current mirror to provide a first stable current, a second current mirror coupled to the first current mirror and a voltage generating unit connected to the second current mirror. The second current mirror provides a second current that is proportional to the first current in the voltage generating unit. The voltage generating unit utilizes three resistors in a T-shaped configuration, wherein a voltage output is taken from the T-shaped configuration and can output a voltage value less than one volt.

Abstract: A comparator circuit used in an analog-to-digital converter includes an input voltage signal line; a reference voltage signal line; a plurality of comparators connected to said input voltage signal line and said reference voltage signal line; a plurality of amplifiers corresponding separately to each of said plurality of comparators and connected respectively between said input voltage signal lines, said reference voltage signal lines, and their corresponding comparators; and a thermocode channel connected to outputs of said plurality of comparators. A plurality of resistors with resistances in a constant ratio are provided in said reference voltage signal line and each is connected between the inputs of two adjacent amplifiers. A plurality of averaging capacitors are provided and each is connected between the outputs of two adjacent comparators; wherein said plurality of averaging capacitors may have the same capacitance.

Abstract: A differential amplifier with double output stages used to eliminate the charge injection noise and switching capacitor noise is disclosed. This system includes an input stage, a middle stage, a first balanced output stage, a second balanced output stage, a negative feedback network and a common mode feedback network. The input stage processing the differential input signal, connects to the middle stage and the negative feedback network which increasing the gain of input signal and connects to the first balanced output stage and second balanced output stage. The first balanced output stage is connected to the negative feedback network for stabilizing the frequency response, and the second balanced output stage is connected to the common mode feedback network for controlling the common level of double terminals output into a setting range of voltage. Thus the output signal of the amplifier will be a clear waveform without redundant noise for next connecting circuit.

Abstract: A method is disclosed of modification of parameters of audio signals by dividing a digital signal converted from an original analog signal into sound frames, modifying a pitch and a playing rate of the digital signal within a frame and subsequent successive splicing a last modified frame with a first non-modified frame and calculating the mean absolute error to define the best splicing point in terms of producing minimal or no audible noise such that various sections of sound signals can be spliced together to achieve pitch and playing rate modification.An apparatus is also disclosed for implementing the method, the apparatus comprising input and output amplifiers, a low pass filter at the input and a low pass filter at the output, analog-to-digital and digital-to-analog converters, and a pitch shifting processor.

Abstract: A method is disclosed of modification of parameters of audio signals by dividing a digital signal converted from an original analog signal into sound frames, modifying a pitch and a playing rate of the digital signal within a frame and subsequent successive splicing a last modified frame with a first non-modified frame and calculating a differential mean absolute error to define the best splicing point in terms of producing minimal or no audible noise such that various sections of sound signals can be spliced together to achieve pitch and playing rate modification. An apparatus is also disclosed for implementing the method, the apparatus comprising input and output amplifiers, a low pass filter at the input and a low pass filter at the output, analog-to-digital and digital-to-analog converters, and a pitch shifting processor.