Abstract: This description relates to a plasma treatment apparatus including a vapor chamber, a gas supply and an upper electrode assembly. The upper electrode assembly includes a gas distribution plate having a plurality of holes in a bottom surface thereof and an upper electrode having at least one gas nozzle and at least one controllable valve connected to the at least one gas nozzle. The plasma treatment apparatus further includes a controller configured to generate a control signal. The at least one controllable valve is configured to be adjusted based on the control signal. A control system and a method of controlling a controllable valve are also described.

Abstract: A method of forming a semiconductor device includes forming a lower coil segment in a first dielectric layer over a substrate, forming a second dielectric layer over the lower coil segment and the first dielectric layer, anisotropically etching a top portion of the second dielectric layer to form an opening over the lower coil segment, depositing magnetic material in the opening to form a magnetic core, forming a third dielectric layer over the magnetic core and the second dielectric layer, forming vias extending through the second dielectric layer and the third dielectric layer, and after forming the vias, forming an upper coil segment over the third dielectric layer and the magnetic core, wherein the vias connect the upper coil segment with the lower coil segment.

Abstract: A method of forming a semiconductor device includes forming a lower coil segment in a first dielectric layer over a substrate, forming a second dielectric layer over the lower coil segment and the first dielectric layer, anisotropically etching a top portion of the second dielectric layer to form an opening over the lower coil segment, depositing magnetic material in the opening to form a magnetic core, forming a third dielectric layer over the magnetic core and the second dielectric layer, forming vias extending through the second dielectric layer and the third dielectric layer, and after forming the vias, forming an upper coil segment over the third dielectric layer and the magnetic core, wherein the vias connect the upper coil segment with the lower coil segment.

Abstract: A magnetic core includes a center section having a substantially uniform thickness, and an edge section connected to and surrounding the center section. The edge section includes a bottom portion and a top portion disposed on the bottom portion, in which the bottom portion has a gradual side surface since the top portion has a steep side surface. The profile of the magnetic core can be more rectangular thereby providing better inductor performance.

Abstract: This description relates to a plasma treatment apparatus including a vapor chamber, a gas supply and an upper electrode assembly. The upper electrode assembly includes a gas distribution plate having a plurality of holes in a bottom surface thereof and an upper electrode having at least one gas nozzle and at least one controllable valve connected to the at least one gas nozzle. The plasma treatment apparatus further includes a controller configured to generate a control signal. The at least one controllable valve is configured to be adjusted based on the control signal. A control system and a method of controlling a controllable valve are also described.

Abstract: The present disclosure relates to a semiconductor body etching apparatus having a multi-zone end point detection system. In some embodiments, the multi-zone end point detection system has a processing chamber that houses a workpiece that is etched according to an etching process. A plurality of end point detector (EPD) probes are located within the processing chamber. Respective EPD probes are located within different zones in the processing chamber, thereby enabling the detection of end point signals from multiple zones within the processing chamber. The detected end point signals are provided from the plurality of EPD probes to an advanced process control (APC) unit. The APC unit is configured to make a tuning knob adjustment to etching process parameters based upon the detected end point signals and to thereby account for etching non-uniformities.

Abstract: A method of lithography patterning includes forming a first resist pattern over a substrate, baking the first resist features, hardening the first resist features, forming a second resist layer within the hardened first resist features, and patterning the second resist layer to form at least one second resist feature between the hardened first features.

Abstract: A capacitor having an electrically/conductive plate, an electrically conductive segmented electrically conductive plate segments and a second plurality of electrically conductive plate segments, a first capacitor dielectric disposed between the plate and the segment plate, at least one electrically conductive interconnect coupling each of the plate segment of one of the first and second plurality of plate segments to the plate, and a second capacitor dieletric disposed between the plate segments.

Abstract: A capacitor having an electrically/conductive plate, an electrically conductive segmented plate defining a first plurality of electrically conductive plate segments and a second plurality of electrically conductive plate segments, a first capacitor dielectric disposed between the plate and the segmented plate, at least one electrically conductive interconnect coupling each of the plate segments of one of the first and second plurality of plate segments to the plate, and a second capacitor dielectric disposed between the plate segments.