Patents by Inventor Yi-wei Lin

Yi-wei Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190253751
    Abstract: A computing device obtains a media stream from a server, where the media stream obtained from the server corresponds to live streaming of an event for promoting a product. The computing device receives product information from the server and displays the media stream in a first viewing window. The media stream is monitored for at least one trigger condition, and based on monitoring of the media stream, the computing device determines at least a portion of the product information to be displayed in a second viewing window.
    Type: Application
    Filed: May 21, 2018
    Publication date: August 15, 2019
    Inventors: Kuo-Sheng Lin, Yi-Wei Lin, Pei-Wen Huang
  • Publication number: 20190244260
    Abstract: A computing device obtains and authenticates user credentials provided by a user at a client device. The computing device obtains a photo album of digital images and accesses profile data associated with the user credentials. A grouping of target images is extracted by the computing device from the plurality of digital images based on the profile data, each of the target images depicting a facial region of the user. The computing device retrieves at least one product recommendation for each target image based on the user profile and edits each of the target images based on the retrieved at least one product recommendation. The computing device causes a user interface to be displayed at the client device, the user interface displaying one or more of the edited target images, the user interface further displaying the retrieved at least product recommendation associated with the one or more edited target images.
    Type: Application
    Filed: May 15, 2018
    Publication date: August 8, 2019
    Inventors: Yi-Wei Lin, Horng Wu, Ying-Yin Lin
  • Publication number: 20190244274
    Abstract: In a computing device for recommending products based on facial analysis, use of a front-facing camera of the computing device is monitored. In response to detecting use of the front-facing camera to capture a self-portrait image, the computing device analyzes facial features of a facial region of an individual depicted in the image captured by the front-facing camera. The computing device further accesses corresponding measurement templates for the facial features and apples at least one of the measurement templates to corresponding facial features. The computing device retrieves product identifiers for the facial features corresponding to the at least one applied measurement template. The computing device generates at least one product recommendation based on the retrieved product identifiers and displays the at least one product recommendation on a user interface.
    Type: Application
    Filed: May 23, 2018
    Publication date: August 8, 2019
    Inventors: Tzu-Chieh Chang, Yi-Wei Lin, Pei-Wen Huang, Ping-Xing Chen
  • Publication number: 20190152214
    Abstract: A gravure offset printing apparatus includes two clamps, a printing roller and a driving device. The two clamps are applicable to clamp individually two opposing ends of a blanket. The printing roller having an axial direction parallel to a first direction is disposed between the two clamps. The blanket wraps part of a radial periphery of the printing roller. The driving device is to drive the two clamps to undergo reverse motions so as to displace the blanket, and the blanket further rotates the printing roller. A gravure module, disposed on a platform of the gravure offset printing apparatus, has a groove for containing an offset ink. While the two clamps pull the blanket to undergo the reverse motions, a surface of the blanket contacts the gravure module so as to adhere the offset ink on the surface of the blanket.
    Type: Application
    Filed: December 28, 2017
    Publication date: May 23, 2019
    Inventors: Kai-Jiun Wang, Chih-Ming Chen, Yu-Ming Wang, Yi-Wei Lin
  • Publication number: 20190135010
    Abstract: An array-type electrode, which may include a substrate, an isolating layer, an electrode and a micro-structure layer. The isolating layer may be disposed on one side of the substrate. The first part of the electrode may be disposed on one side of the substrate and covered by the isolating layer; the second part of the electrode penetrates through the substrate; the third part of the electrode may be disposed on the other side of the substrate; the first part may be connected to the third part via the second part. The micro-structure layer may be disposed on the isolating layer.
    Type: Application
    Filed: December 26, 2017
    Publication date: May 9, 2019
    Inventors: WEI-YUAN CHEN, YU-MING WANG, SHENG-YU LIN, YI-WEI LIN
  • Publication number: 20190056796
    Abstract: A system module of customizing a screen image based on a non-invasive data-extraction system, and a method thereof are disclosed. The system module is applicable to a machine controller controlling a machine, and sensors are disposed around the machine. In the system module, an image capture device receives an image of an original screen from the machine controller, and transmits the image to the non-invasive data-extraction system for extracting information, and a software control system integrates data measured by the sensors with the information, and combined the integration result with a customized screen image, and an extra control component is embedded in an original operation screen of the machine controller. The customized screen image is shown on the machine controller to display information by more visual manner. Furthermore, the signal receiving device and an HID simulation device can be used to provide a basic function of a KVM switch.
    Type: Application
    Filed: July 20, 2018
    Publication date: February 21, 2019
    Inventors: Chua-Hong NG, Chao-Tung YANG, Wei-Hung CHEN, Tsan-Ming YU, Shih-Hsun LIN, Yang-Chung TSENG, Chih-Fu HSU, Chien-Hsun TU, Te-Cheng CHIU, Yi-Wei LIN, Jen-Chi HSU
  • Patent number: 9012862
    Abstract: A material aging test apparatus and method thereof are provided. The aging apparatus includes a pulsed laser, a beam expansion assembly, a platform, and a spectrum analyzer. The pulsed laser is used for transmitting a first beam. The beam expansion assembly is used for converting the first beam into a second beam and projecting the second beam onto an object. The platform is used for carrying the object. The spectrum analyzer is used for measuring the spectral response which is generated from the object by the projection of the second beam.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: April 21, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Yi-Wei Lin, Yu-Tai Li, Hung-Sen Wu
  • Patent number: 8804445
    Abstract: The present invention provides an oscillator which is based on a 6T SRAM for measuring the Bias Temperature Instability. The oscillator includes a first control unit, a first inverter, a second control unit, and a second inverter. The first control unit is coupled with the first inverter. The second control unit is coupled with the second inverter. The first control unit and the second control unit is used to control the first inverter and the second inverter being selected, biased, and connected respectively, so that the NBTI and the PBTI of the SRAM can be measured separately, and the real time stability of the SRAM can be monitored immediately.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: August 12, 2014
    Assignee: National Chiao Tung University
    Inventors: Ching-Te Chuang, Shyh-Jye Jou, Wei Hwang, Ming-Chien Tsai, Yi-Wei Lin, Hao-I Yang, Ming-Hsien Tu, Wei-Chiang Shih, Nan-Chun Lien, Kuen-Di Lee
  • Publication number: 20140084176
    Abstract: A material aging test apparatus and method thereof are provided. The aging apparatus includes a pulsed laser, a beam expansion assembly, a platform, and a spectrum analyzer. The pulsed laser is used for transmitting a first beam. The beam expansion assembly is used for converting the first beam into a second beam and projecting the second beam onto an object. The platform is used for carrying the object. The spectrum analyzer is used for measuring the spectral response which is generated from the object by the projection of the second beam.
    Type: Application
    Filed: September 19, 2013
    Publication date: March 27, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Wei Lin, Yu-Tai Li, Hung-Sen Wu
  • Publication number: 20130301343
    Abstract: A threshold voltage measurement device is disclosed. The device is coupled to a 6T SRAM. The SRAM comprises two inverters each coupled to a FET. Power terminals of one inverter are in a floating state; the drain and source of the FET coupled to the inverter are short-circuited. Two voltage selectors, a resistor, an amplifier and the SRAM are connected in a negative feedback way. Different bias voltages are applied to the SRAM for measuring threshold voltages of two FETs of the other inverter and the FET coupled to the other inverter. The present invention uses a single circuit to measure the threshold voltages of the three FETs without changing the physical structure of the SRAM. Thereby is accelerated the measurement and decreased the cost of the fabrication process and measurement instruments.
    Type: Application
    Filed: August 29, 2012
    Publication date: November 14, 2013
    Inventors: Ching-Te Chuang, Shyh-Jye Jou, Geng-Cing Lin, Shao-Cheng Wang, Yi-Wei Lin, Ming-Chien Tsai, Wei-Chiang Shih, Nan-Chun Lien, Kuen-Di Lee, Jyun-Kai Chu
  • Patent number: 8582378
    Abstract: A threshold voltage measurement device is disclosed. The device is coupled to a 6T SRAM. The SRAM comprises two inverters each coupled to a FET. Power terminals of one inverter are in a floating state; the drain and source of the FET coupled to the inverter are short-circuited. Two voltage selectors, a resistor, an amplifier and the SRAM are connected in a negative feedback way. Different bias voltages are applied to the SRAM for measuring threshold voltages of two FETs of the other inverter and the FET coupled to the other inverter. The present invention uses a single circuit to measure the threshold voltages of the three FETs without changing the physical structure of the SRAM. Thereby is accelerated the measurement and decreased the cost of the fabrication process and measurement instruments.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: November 12, 2013
    Assignee: National Chiao Tung University
    Inventors: Ching-Te Chuang, Shyh-Jye Jou, Geng-Cing Lin, Shao-Cheng Wang, Yi-Wei Lin, Ming-Chien Tsai, Wei-Chiang Shih, Nan-Chun Lien, Kuen-Di Lee, Jyun-Kai Chu
  • Publication number: 20130222071
    Abstract: The present invention provides an oscillator which is based on a 6T SRAM for measuring the Bias Temperature Instability. The oscillator includes a first control unit, a first inverter, a second control unit, and a second inverter. The first control unit is coupled with the first inverter. The second control unit is coupled with the second inverter. The first control unit and the second control unit is used to control the first inverter and the second inverter being selected, biased, and connected respectively, so that the NBTI and the PBTI of the SRAM can be measured separately, and the real time stability of the SRAM can be monitored immediately.
    Type: Application
    Filed: May 31, 2012
    Publication date: August 29, 2013
    Applicant: National Chiao Tung University
    Inventors: Ching-Te Chuang, Shyh-Jye Jou, Wei Hwang, Ming-Chien Tsai, Yi-Wei Lin, Hao-I Yang, Ming-Hsien Tu, Wei-Chiang Shih, Nan-Chun Lien, Kuen-Di Lee
  • Publication number: 20130223136
    Abstract: The present invention provides a 6T SRAM including a first inverter, a second inverter, a first pass-gate transistor, and a second pass-gate transistor. The first inverter zs a first pull-up transistor and a first pull-down transistor. The second inverter includes a second pull-up transistor and a second pull-down transistor. The gate of the second pull-up transistor is coupled with the gate of the second pull-down transistor, and the drain of the second pull-up transistor is coupled with the drain of the second pull-down transistor. The SRAM can measure the trip voltage, the read disturb voltage, and the write margin by controlling the first bit line, the second bit line, the GND, the first word line, and the voltage source without changing of the physic parameter of the SRAM.
    Type: Application
    Filed: May 31, 2012
    Publication date: August 29, 2013
    Applicant: National Chiao Tung University
    Inventors: Ching-Te CHUANG, Shyh-Jye Jou, Wei Hwang, Yi-Wei Lin, Ming-Chien Tsai, Hao-I Yang, Ming-Hsien Tu, Wei-Chiang Shih, Nan-Chun Lien, Kuen-Di Lee
  • Publication number: 20130155758
    Abstract: A circuit is usable to generate a sense amplifier enable (SAE) signal for a static random access memory (SRAM) circuit. The circuit includes a first tracking bit line, a second tracking bit line, a tracking cell, and a control logic circuit. The second tracking bit line is electrically connected to the first tracking bit line. The tracking cell has a driving terminal and a non-driving terminal, where the non-driving terminal is connected to the second tracking bit line, and the driving terminal is connected to the first tracking bit line and configured to selectively charge or discharge a voltage on the first tracking bit line in response to a control signal. The control logic circuit is coupled to the first tracking bit line and configured to generate the SAE signal in response to the voltage level on the first tracking bit line.
    Type: Application
    Filed: December 20, 2011
    Publication date: June 20, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jack LIU, Yi-Wei LIN
  • Patent number: 8467257
    Abstract: A circuit is usable to generate a sense amplifier enable (SAE) signal for a static random access memory (SRAM) circuit. The circuit includes a first tracking bit line, a second tracking bit line, a tracking cell, and a control logic circuit. The second tracking bit line is electrically connected to the first tracking bit line. The tracking cell has a driving terminal and a non-driving terminal, where the non-driving terminal is connected to the second tracking bit line, and the driving terminal is connected to the first tracking bit line and configured to selectively charge or discharge a voltage on the first tracking bit line in response to a control signal. The control logic circuit is coupled to the first tracking bit line and configured to generate the SAE signal in response to the voltage level on the first tracking bit line.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: June 18, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jack Liu, Yi-Wei Lin
  • Publication number: 20130087792
    Abstract: The present invention provides a method of making a pixel structure of a reflective type electrophoretic display device. First, a first metal pattern layer, an insulating layer, a semiconductor pattern layer and a second metal pattern layer are formed sequentially on a substrate. Next, a passivation layer is formed on the substrate, the semiconductor pattern layer and the second metal pattern layer, and an organic photoresist layer is formed on the passivation layer, wherein the organic photoresist layer has a first contact hole exposing the passivation layer. Then, the organic photoresist layer is utilized as a mask to remove the exposed passivation layer and to form a second contact hole in the passivation layer to expose the second metal pattern layer. Subsequently, a third metal pattern layer and a transparent conductive pattern are formed sequentially on the organic photoresist pattern layer and the exposed second metal pattern layer.
    Type: Application
    Filed: March 29, 2012
    Publication date: April 11, 2013
    Inventors: Hsien-Kun Chiu, Yi-Wei Lin, Ming-Tsung Chung, Ying-Tsung Tu
  • Patent number: 8345504
    Abstract: A Random Access Memory (RAM) with a plurality of cells is provided. In an embodiment, the cells of a same column are coupled to a same pair of bit-lines and are associated to a same power controller. Each cell has two inverters; the power controller has two power-switches. For the cells of the same column, the two power-switches respectively perform independent supply voltage controls for the two inverters in each cell according to data-in voltages of the bit-lines during Write operation.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: January 1, 2013
    Assignees: Faraday Technology Corp., National Chiao Tung University
    Inventors: Ching-Te Chuang, Hao-I Yang, Yi-Wei Lin, Wei Hwang, Wei-Chiang Shih, Chia-Cheng Chen
  • Patent number: 8213257
    Abstract: A Random Access Memory (RAM) is provided. The RAM includes a plurality of word-line drivers, at least a first tracking transistor and a second tracking transistor. Each word-line driver has an input node receiving a decoding signal, a power node receiving an operation voltage and a driving node driving a word-line. In an embodiment, the first tracking transistor has two channel terminal nodes respectively coupled to the driving node of one of the word-line driver and a channel terminal node of the second tracking transistor; wherein the first tracking transistor has electronic characteristics tracking those of a driving transistor of word-line driver, and the second tracking transistor has electronic characteristics tracking those of pass-gate transistor(s) in each cell of the RAM.
    Type: Grant
    Filed: August 9, 2010
    Date of Patent: July 3, 2012
    Assignees: Faraday Technology Corp., National Chiao Tung University
    Inventors: Ching-Te Chuang, Yi-Wei Lin, Chia-Cheng Chen, Wei-Chiang Shih
  • Publication number: 20120044779
    Abstract: A Random Access Memory (RAM) with a plurality of cells is provided. In an embodiment, the cells of a same column are coupled to a same pair of bit-lines and are associated to a same power controller. Each cell has two inverters; the power controller has two power-switches. For the cells of the same column, the two power-switches respectively perform independent supply voltage controls for the two inverters in each cell according to data-in voltages of the bit-lines during Write operation.
    Type: Application
    Filed: January 19, 2011
    Publication date: February 23, 2012
    Applicants: National Chiao Tung University, FARADAY TECHNOLOGY CORPORATION
    Inventors: Ching-Te Chuang, Hao-I Yang, Yi-Wei Lin, Wei Hwang, Wei-Chiang Shih, Chia-Cheng Chen
  • Publication number: 20120033522
    Abstract: A Random Access Memory (RAM) is provided. The RAM includes a plurality of word-line drivers, at least a first tracking transistor and a second tracking transistor. Each word-line driver has an input node receiving a decoding signal, a power node receiving an operation voltage and a driving node driving a word-line. In an embodiment, the first tracking transistor has two channel terminal nodes respectively coupled to the driving node of one of the word-line driver and a channel terminal node of the second tracking transistor; wherein the first tracking transistor has electronic characteristics tracking those of a driving transistor of word-line driver, and the second tracking transistor has electronic characteristics tracking those of pass-gate transistor(s) in each cell of the RAM.
    Type: Application
    Filed: August 9, 2010
    Publication date: February 9, 2012
    Applicants: National Chiao Tung University, FARADAY TECHNOLOGY CORPORATION
    Inventors: Ching-Te Chuang, Yi-Wei Lin, Chia-Cheng Chen, Wei-Chiang Shih