Patents by Inventor Ying-Cheng WANG

Ying-Cheng WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180158905
    Abstract: The disclosure relates to a thin film transistor and a method for making the same. The thin film transistor includes a substrate; a semiconductor layer on the substrate, wherein the semiconductor layer includes nano-scaled semiconductor materials; a source and a drain, wherein the source and the drain are on the substrate, spaced apart from each other, and electrically connected to the semiconductor layer; a dielectric layer on the semiconductor layer, wherein the dielectric layer is an oxide dielectric layer formed by magnetron sputtering; and a gate in direct contact with the dielectric layer. The thin film transistor has inverse current hysteresis.
    Type: Application
    Filed: November 20, 2017
    Publication date: June 7, 2018
    Inventors: YU-DAN ZHAO, YU-JIA HUO, XIAO-YANG XIAO, YING-CHENG WANG, TIAN-FU ZHANG, YUAN-HAO JIN, QUN-QING LI, SHOU-SHAN FAN
  • Publication number: 20180159057
    Abstract: The disclosure relates to a logic circuit. The logic circuit includes a n-type thin film transistor and a p-type thin film transistor. Each thin film transistor includes a substrate; a semiconductor layer including nano-scaled semiconductor materials; a source and a drain, wherein the source and the drain are spaced apart from each other, and electrically connected to the semiconductor layer; a dielectric layer covering the semiconductor layer, wherein the dielectric layer includes a normal dielectric layer and an abnormal dielectric layer stacked on one another, and the abnormal dielectric layer is an oxide dielectric layer grown by magnetron sputtering; and a gate in direct contact with the abnormal dielectric layer. The n-type thin film transistor and the p-type thin film transistor share the same substrate and the same gate.
    Type: Application
    Filed: November 20, 2017
    Publication date: June 7, 2018
    Inventors: YU-DAN ZHAO, YU-JIA HUO, XIAO-YANG XIAO, YING-CHENG WANG, TIAN-FU ZHANG, YUAN-HAO JIN, QUN-QING LI, SHOU-SHAN FAN
  • Publication number: 20180158960
    Abstract: The disclosure relates to a thin film transistor and a method for making the same. The thin film transistor includes a substrate; a gate on the substrate; a dielectric layer on the gate, wherein the dielectric layer includes a first sub-dielectric layer and a second sub-dielectric layer stacked on one another, and the first sub-dielectric layer is a first oxide dielectric layer formed by magnetron sputtering and in direct contact with the gate; a semiconductor layer on the dielectric layer, wherein the semiconductor layer includes nano-scaled semiconductor materials; and a source and a drain, wherein the source and the drain are on the dielectric layer, spaced apart from each other, and electrically connected to the semiconductor layer. The thin film transistor almost has no current hysteresis.
    Type: Application
    Filed: November 17, 2017
    Publication date: June 7, 2018
    Inventors: YU-JIA HUO, YU-DAN ZHAO, XIAO-YANG XIAO, YING-CHENG WANG, TIAN-FU ZHANG, YUAN-HAO JIN, QUN-QING LI, SHOU-SHAN FAN
  • Publication number: 20180158921
    Abstract: The disclosure relates to a thin film transistor and a method for making the same. The thin film transistor includes a substrate; a semiconductor layer on the substrate, wherein the semiconductor layer includes nano-scaled semiconductor materials; a source and a drain, wherein the source and the drain are on the substrate, spaced apart from each other, and electrically connected to the semiconductor layer; a dielectric layer on the semiconductor layer, wherein the dielectric layer includes a first sub-dielectric layer and a second sub-dielectric layer stacked on one another, and the first sub-dielectric layer is a first oxide dielectric layer grown by magnetron sputtering; and a gate in direct contact with the first sub-dielectric layer. The thin film transistor almost has no current hysteresis.
    Type: Application
    Filed: November 20, 2017
    Publication date: June 7, 2018
    Inventors: YU-JIA HUO, YU-DAN ZHAO, XIAO-YANG XIAO, YING-CHENG WANG, TIAN-FU ZHANG, YUAN-HAO JIN, QUN-QING LI, SHOU-SHAN FAN
  • Publication number: 20180136137
    Abstract: The disclosure relates to a device for single molecule detection. The device includes a chamber having an inputting hole and an outputting hole, a carrier including a substrate and a metal layer located on the substrate, a detection device, and a controlling computer. The carrier includes a substrate and a metal layer on the substrate, wherein the substrate includes a base and a patterned bulge located on a surface of the base, the patterned bulge includes a number of strip-shaped bulges intersected with each other to form a net and define a number of holes, and the metal layer is located on the patterned bulge. The carrier for single molecule detection has a relative higher SERS and can enhance the Raman scattering.
    Type: Application
    Filed: June 28, 2017
    Publication date: May 17, 2018
    Inventors: Yuan-Hao JIN, Ying-Cheng WANG, Qun-Qing LI, Shou-Shan FAN