Patents by Inventor Yohei Kanno

Yohei Kanno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240108234
    Abstract: The present disclosure improves the accuracy of blood flow assessment. According to one embodiment of the present invention, a blood flow assessment device has: a measurement part configured to measure skin temperatures at a plurality of locations on a face of a user; a calculation part configured to calculate a variation of the skin temperatures at the plurality of locations; and a blood flow assessment part configured to assess a blood flow of the user based on the variation.
    Type: Application
    Filed: December 24, 2021
    Publication date: April 4, 2024
    Inventors: Daisuke KAMIWANO, Motoki TAKATA, Megumi SEKINO, Yohei KOBAYASHI, Juncheng LI, Naomi KANNO
  • Patent number: 11941247
    Abstract: According to one embodiment, a storage device includes a non-volatile memory and a control unit that is electrically connected to the non-volatile memory and that is configured to control the non-volatile memory. The control unit is configured to manage a plurality of management areas obtained by logically partitioning storage area of the non-volatile memory, when a write request is received that includes data for which a valid term has been set, determine, based on the valid term, a first management area from among the management areas, write the data included in the write request to the determined first management area, and when the data written to the first management area is erased, collectively erase all data written in the first management area which includes the data.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: March 26, 2024
    Assignee: Kioxia Corporation
    Inventors: Takeshi Ishihara, Yohei Hasegawa, Shinichi Kanno, Kohei Okuda, Masataka Goto
  • Patent number: 9013303
    Abstract: One feature of the present invention is a product management system that includes a package body for packing a product attached with an ID tag, and a reader/writer. The ID tag includes a thin film integrated circuit portion and an antenna, the package body includes a resonance circuit portion having an antenna coil and a capacitor, and the resonance circuit portion can communicate with the reader/writer and the ID tag. Accordingly, the stability of communication between an ID tag attached to a product and an R/W can be secured, and management of products can be conducted simply and efficiently, even if a product is packed by a package body.
    Type: Grant
    Filed: July 23, 2012
    Date of Patent: April 21, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuyuki Arai, Mai Akiba, Yuko Tachimura, Yohei Kanno
  • Patent number: 8619219
    Abstract: As a wiring becomes thicker, discontinuity of an insulating film covering the wiring has become a problem. It is difficult to form a wiring with width thin enough for a thin film transistor used for a current high definition display device. As a wiring is made thinner, signal delay due to wiring resistance has become a problem. In view of the above problems, the invention provides a structure in which a conductive film is formed in a hole of an insulating film, and the surfaces of the conductive film and the insulating film are flat. As a result, discontinuity of thin films covering a conductive film and an insulating film can be prevented. A wiring can be made thinner by controlling the width of the hole. Further, a wiring can be made thicker by controlling the depth of the hole.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: December 31, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Shinji Maekawa, Yohei Kanno
  • Patent number: 8575740
    Abstract: An object of the present invention is providing a semiconductor device that is capable of improving the reliability of a semiconductor element and enhancing the mechanical strength without suppressing the scale of a circuit. The semiconductor device includes an integrated circuit sandwiched between first and second sealing films, an antenna electrically connected to the integrated circuit, the first sealing film sandwiched between a substrate and the integrated circuit, which includes a plurality of first insulating films and at least one second insulating film sandwiched therebetween, the second sealing film including a plurality of third insulating films and at least one fourth insulating film sandwiched therebetween. The second insulating film has lower stress than the first insulting film and the fourth insulating film has lower stress than the third insulating film. The first and third insulating films are inorganic insulating films.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: November 5, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuyuki Arai, Yuko Tachimura, Yohei Kanno, Mai Akiba
  • Patent number: 8518728
    Abstract: In case that a conventional TFT is formed to have an inversely staggered type, a resist mask is required to be formed by an exposing, developing, and droplet discharging in forming an island-like semiconductor region. It resulted in the increase in the number of processes and the number of materials. According to the present invention, a process can be simplified since after forming a source region and a drain region, a portion serving as a channel region is covered by an insulating film serving as a channel protecting film to form an island-like semiconductor film, and so a semiconductor element can be manufactured by using only metal mask without using a resist mask.
    Type: Grant
    Filed: January 3, 2011
    Date of Patent: August 27, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yohei Kanno, Gen Fujii
  • Publication number: 20130009289
    Abstract: An object of the present invention is providing a semiconductor device that is capable of improving the reliability of a semiconductor element and enhancing the mechanical strength without suppressing the scale of a circuit. The semiconductor device includes an integrated circuit sandwiched between first and second sealing films, an antenna electrically connected to the integrated circuit, the first sealing film sandwiched between a substrate and the integrated circuit, which includes a plurality of first insulating films and at least one second insulating film sandwiched therebetween, the second sealing film including a plurality of third insulating films and at least one fourth insulating film sandwiched therebetween. The second insulating film has lower stress than the first insulting film and the fourth insulating film has lower stress than the third insulating film. The first and third insulating films are inorganic insulating films.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 10, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasuyuki ARAI, Yuko TACHIMURA, Yohei KANNO, Mai AKIBA
  • Patent number: 8322847
    Abstract: When using a liquid droplet ejection method, a conventional photomask is not required, however, it is required instead that a moving path of a nozzle or a substrate is controlled with accuracy at least in ejecting liquid droplets. According to the characteristics of compositions to be ejected or their pattern, such ejection conditions are desirably set as the moving rate of a nozzle or a substrate, ejection quantity, ejection distance and ejection rate of compositions, atmosphere of the space that the compositions are ejected, the temperature and moisture of the space, and heating temperature of the substrate.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: December 4, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Yasuyuki Arai, Shinji Maekawa, Yohei Kanno
  • Publication number: 20120299705
    Abstract: One feature of the present invention is a product management system that includes a package body for packing a product attached with an ID tag, and a reader/writer. The ID tag includes a thin film integrated circuit portion and an antenna, the package body includes a resonance circuit portion having an antenna coil and a capacitor, and the resonance circuit portion can communicate with the reader/writer and the ID tag. Accordingly, the stability of communication between an ID tag attached to a product and an R/W can be secured, and management of products can be conducted simply and efficiently, even if a product is packed by a package body.
    Type: Application
    Filed: July 23, 2012
    Publication date: November 29, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasuyuki ARAI, Mai AKIBA, Yuko TACHIMURA, Yohei KANNO
  • Publication number: 20120282717
    Abstract: As a wiring becomes thicker, discontinuity of an insulating film covering the wiring has become a problem. It is difficult to form a wiring with width thin enough for a thin film transistor used for a current high definition display device. As a wiring is made thinner, signal delay due to wiring resistance has become a problem. In view of the above problems, the invention provides a structure in which a conductive film is formed in a hole of an insulating film, and the surfaces of the conductive film and the insulating film are flat. As a result, discontinuity of thin films covering a conductive film and an insulating film can be prevented. A wiring can be made thinner by controlling the width of the hole. Further, a wiring can be made thicker by controlling the depth of the hole.
    Type: Application
    Filed: July 19, 2012
    Publication date: November 8, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Shinji Maekawa, Yohei Kanno
  • Patent number: 8305213
    Abstract: Since the chip formed from a silicon wafer is thick, the chip is protruded from the surface or the chip is so large that it can be seen through the eyes, which affects the design of a business card or the like. Hence, it is an object of the present invention to provide a new integrated circuit which has a structure by which the design is not affected. In view of the above problems, it is a feature of the invention to equip a film-like article with a thin film integrated circuit. It is another feature of the invention that the IDF chip has a semiconductor film of 0.2 mm or less, as an active region. Therefore, the IDF chip can be made thinner as compared with a chip formed from a silicon wafer. In addition, such an integrated circuit can have light transmitting characteristic unlike a chip formed from a silicon wafer.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: November 6, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuyuki Arai, Mai Akiba, Yohei Kanno, Yuko Tachimura
  • Patent number: 8297518
    Abstract: Although a product having such the IC chip has been diffused, information on the product may be capable of being perceived, abstracted, falsified, or the like by a third person with his external device during distribution of the product or after purchase of the product. Further, privacy may be seriously infringed. Paper money, various products, and the like are disclosed according to the present invention with an integrated circuit device having a switching memory for controlling reading and writing of information (lock/unlock of information) in order to protect the information recorded and stored in the integrated circuit such as an IC chip installed to the product or the like.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: October 30, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Yohei Kanno
  • Patent number: 8237569
    Abstract: When a product attached with an ID tag is placed inside a package body, there is a risk that communication with an ID tag using a reader/writer is blocked. Then, it is difficult to manage products in a distribution process of products, which leads to lose convenience of ID tags. One feature of the present invention is a product management system that includes a package body for packing a product attached with an ID tag, and a reader/writer. The ID tag includes a thin film integrated circuit portion and an antenna, the package body includes a resonance circuit portion having an antenna coil and a capacitor, and the resonance circuit portion can communicate with the reader/writer and the ID tag. Accordingly, the stability of communication between an ID tag attached to a product and an R/W can be secured, and management of products can be conducted simply and efficiently, even if a product is packed by a package body.
    Type: Grant
    Filed: April 6, 2005
    Date of Patent: August 7, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuyuki Arai, Mai Akiba, Yuko Tachimura, Yohei Kanno
  • Patent number: 8228453
    Abstract: As a wiring becomes thicker, discontinuity of an insulating film covering the wiring has become a problem. It is difficult to form a wiring with width thin enough for a thin film transistor used for a current high definition display device. As a wiring is made thinner, signal delay due to wiring resistance has become a problem. In view of the above problems, the invention provides a structure in which a conductive film is formed in a hole of an insulating film, and the surfaces of the conductive film and the insulating film are flat. As a result, discontinuity of thin films covering a conductive film and an insulating film can be prevented. A wiring can be made thinner by controlling the width of the hole. Further, a wiring can be made thicker by controlling the depth of the hole.
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: July 24, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Shinji Maekawa, Yohei Kanno
  • Patent number: 8136735
    Abstract: As a non-contact ID label, ID tag and the like being widespread, it is required to manufacture a considerable quantity of ID labels at quite a low cost. An ID label attached to a product is, for example, required to be manufactured at 1 to several yens each, or preferably less than one yen. Thus, such a structure and a process are demanded that an ID label can be manufactured in a large quantity at a low cost. A thin film integrated circuit device included in the ID label, the ID card, and the ID tag of the invention each includes a thin film active element such as a thin film transistor (TFT). Therefore, by peeling a substrate on which TFTs are formed for separating elements, the ID label and the like can be manufactured in a large quantity at a low cost.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: March 20, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuyuki Arai, Mai Akiba, Yuko Tachimura, Yohei Kanno
  • Publication number: 20110284974
    Abstract: An object of the present invention is providing a semiconductor device that is capable of improving the reliability of a semiconductor element and enhancing the mechanical strength without suppressing the scale of a circuit. The semiconductor device includes an integrated circuit sandwiched between first and second sealing films, an antenna electrically connected to the integrated circuit, the first sealing film sandwiched between a substrate and the integrated circuit, which includes a plurality of first insulating films and at least one second insulating film sandwiched therebetween, the second sealing film including a plurality of third insulating films and at least one fourth insulating film sandwiched therebetween. The second insulating film has lower stress than the first insulting film and the fourth insulating film has lower stress than the third insulating film. The first and third insulating films are inorganic insulating films.
    Type: Application
    Filed: August 2, 2011
    Publication date: November 24, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasuyuki ARAI, Yuko TACHIMURA, Yohei KANNO
  • Patent number: 8053780
    Abstract: In case that a conventional TFT is formed to have an inversely staggered type, a resist mask is required to be formed by an exposing, developing, and droplet discharging in forming an island-like semiconductor region. It resulted in the increase in the number of processes and the number of materials. According to the present invention, a process can be simplified since after forming a source region and a drain region, a portion serving as a channel region is covered by an insulating film serving as a channel protecting film to form an island-like semiconductor film, and so a semiconductor element can be manufactured by using only metal mask without using a resist mask.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: November 8, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yohei Kanno, Gen Fujii
  • Publication number: 20110248089
    Abstract: Although a product having such the IC chip has been diffused, information on the product may be capable of being perceived, abstracted, falsified, or the like by a third person with his external device during distribution of the product or after purchase of the product. Further, privacy may be seriously infringed. Paper money, various products, and the like are disclosed according to the present invention with an integrated circuit device having a switching memory for controlling reading and writing of information (lock/unlock of information) in order to protect the information recorded and stored in the integrated circuit such as an IC chip installed to the product or the like.
    Type: Application
    Filed: June 21, 2011
    Publication date: October 13, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yasuyuki ARAI, Yohei KANNO
  • Patent number: 7994617
    Abstract: An object of the present invention is providing a semiconductor device that is capable of improving the reliability of a semiconductor element and enhancing the mechanical strength without suppressing the scale of a circuit. The semiconductor device includes an integrated circuit sandwiched between first and second sealing films, an antenna electrically connected to the integrated circuit, the first sealing film sandwiched between a substrate and the integrated circuit, which includes a plurality of first insulating films and at least one second insulating film sandwiched therebetween, the second sealing film including a plurality of third insulating films and at least one fourth insulating film sandwiched therebetween. The second insulating film has lower stress than the first insulting film and the fourth insulating film has lower stress than the third insulating film. The first and third insulating films are inorganic insulating films.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: August 9, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuyuki Arai, Yuko Tachimura, Yohei Kanno, Mai Akiba
  • Patent number: 7975926
    Abstract: Although a product having such the IC chip has been diffused, information on the product may be capable of being perceived, abstracted, falsified, or the like by a third person with his external device during distribution of the product or after purchase of the product. Further, privacy may be seriously infringed. Paper money, various products, and the like are disclosed according to the present invention with an integrated circuit device having a switching memory for controlling reading and writing of information (lock/unlock of information) in order to protect the information recorded and stored in the integrated circuit such as an IC chip installed to the product or the like.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: July 12, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Yohei Kanno