Patents by Inventor Yohei Ogawa
Yohei Ogawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220186743Abstract: To provide a vacuum pump which separates and constructs an inlet port flange and a casing (outer cylinder) as two components to reduce weight while retaining required strength and which is consequently capable of reducing manufacturing cost. In a vacuum pump, an inlet port flange and a casing (outer cylinder) are separated from each other and constructed as different members. The inlet port flange uses stainless steel as a material thereof and the casing (outer cylinder) use aluminum as a material thereof. The components are fastened to each other by bolts and sealed by an O-ring in order to maintain a vacuum property during assembly of the vacuum pump. Accordingly, a weight of the vacuum pump can be reduced while maintaining strength of the inlet port flange.Type: ApplicationFiled: March 13, 2020Publication date: June 16, 2022Inventors: Nahoko Yoshihara, Yoshiyuki Sakaguchi, Yohei Ogawa
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Patent number: 11362274Abstract: A laterally switching cell structure including a metal-insulator-metal stack includes an active metal oxide layer including one or more sub-stoichiometric regions. The metal oxide layer includes one or more metal-oxides deposited conformally using a mixed precursor atomic layer deposition process. A graded oxygen profile in the metal oxide layer(s) of the stack including a mirrored impurity density may be formed wherein the sub-stoichiometric region(s) include a relatively high density of impurities obtained as reaction by-products. Arrays of cell structures can be formed with no requirement for a thick active electrode, allowing for more space for a metal fill and optional selector, thereby reducing access resistance.Type: GrantFiled: January 10, 2020Date of Patent: June 14, 2022Assignees: International Business Machines Corporation, ULVAC, INC.Inventors: John Rozen, Takashi Ando, Martin M. Frank, Yohei Ogawa
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Publication number: 20220145894Abstract: The present disclosure provides a vacuum pump of which a thermal resistance between a heater and a water-cooling tube is high and which has a small number of components. The vacuum pump includes: a main body casing having an intake portion and an exhaust portion of gas; a turbo-molecular pump mechanism portion in which stator blades and rotor blades are formed; and a motor for rotating the rotor blades, wherein the main body casing has a base spacer capable of thermal conduction between a heating spacer portion and a water-cooling spacer portion having been integrally molded, and the base spacer is provided with a boundary portion having been molded such that a cross section thereof assumes a narrow neck shape between the heating spacer portion and the water-cooling spacer portion.Type: ApplicationFiled: March 13, 2020Publication date: May 12, 2022Inventors: Nahoko Yoshihara, Yoshiyuki Sakaguchi, Yasushi Tateno, Yohei Ogawa
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Patent number: 11195929Abstract: A gate structure for effective work function adjustments of semiconductor devices that includes a gate dielectric on a channel region of a semiconductor device; a first metal nitride in direct contact with the gate dielectric; a conformal carbide of Aluminum material layer having an aluminum content greater than 30 atomic wt. %; and a second metal nitride layer in direct contact with the conformal aluminum (Al) and carbon (C) containing material layer. The conformal carbide of aluminum (Al) layer includes aluminum carbide, or Al4C3, yielding an aluminum (Al) content up to 57 atomic % (at. %) and work function setting from 3.9 eV to 5.0 eV at thicknesses below 25 ?. Such structures can present metal gate length scaling and resistance benefit below 25 nm compared to state of the art work function electrodes.Type: GrantFiled: October 30, 2019Date of Patent: December 7, 2021Assignees: International Business Machines Corporation, ULVAC, INC.Inventors: Takashi Ando, Ruqiang Bao, Masanobu Hatanaka, Vijay Narayanan, Yohei Ogawa, John Rozen
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Patent number: 11189482Abstract: A thin film formation method includes setting a film formation subject to 200° C. or higher. A first step includes changing a first state, in which a film formation material and a carrier gas are supplied so that the film formation material collects on the film formation subject, to a second state, in which the film formation material is omitted. A second step includes changing a third state, in which a hydrogen gas and a carrier gas are supplied to reduce the film formation material, to a fourth state, in which the hydrogen gas is omitted. The film formation material is any one of Al(CxH2x+1)3, Al(CxH2x+1)2H, and Al(CxH2x+1)2Cl. The first step and the second step are alternately repeated to form an aluminum carbide film on the film formation subject such that a content rate of aluminum atoms is 20 atomic percent or greater.Type: GrantFiled: May 11, 2018Date of Patent: November 30, 2021Assignees: ULVAC, INC., INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Masanobu Hatanaka, Yohei Ogawa, Keon-chang Lee, Nobuyuki Kato, Takakazu Yamada, John Rozen
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Patent number: 11165014Abstract: A semiconductor device includes a semiconductor substrate; a vertical Hall element including a magnetosensitive portion, and formed in the semiconductor substrate; and an excitation wiring provided above a surface of the semiconductor substrate and apart from the magnetosensitive portion. The excitation wiring is formed of a single wiring with a plurality of turns. The excitation wiring includes a plurality of main wiring portions arranged side by side, and apart from one another in an overlapping region that overlaps the magnetosensitive portion as viewed in plan view from a direction orthogonal to the surface of the semiconductor substrate; and auxiliary wiring portions connecting each of the plurality of main wiring portions to one another in series.Type: GrantFiled: March 20, 2020Date of Patent: November 2, 2021Assignee: ABLIC INC.Inventors: Yohei Ogawa, Hirotaka Uemura
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Publication number: 20210272796Abstract: Embodiments of the present invention are directed to forming a sub-stoichiometric metal-oxide film using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor can include a metal and a first ligand. The second precursor can include the same metal and a second ligand. A substrate can be exposed to the first precursor during a first pulse of an ALD cycle. The substrate can be exposed to the second precursor during a second pulse of the ALD cycle. The second pulse can occur directly after the first pulse without an intervening thermal oxidant. The substrate can be exposed to the thermal oxidant during a third pulse of the ALD cycle.Type: ApplicationFiled: May 18, 2021Publication date: September 2, 2021Inventors: John Rozen, Martin Michael Frank, Yohei Ogawa
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Patent number: 11081343Abstract: Embodiments of the present invention are directed to forming a sub-stoichiometric metal-oxide film using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor can include a metal and a first ligand. The second precursor can include the same metal and a second ligand. A substrate can be exposed to the first precursor during a first pulse of an ALD cycle. The substrate can be exposed to the second precursor during a second pulse of the ALD cycle. The second pulse can occur directly after the first pulse without an intervening thermal oxidant. The substrate can be exposed to the thermal oxidant during a third pulse of the ALD cycle.Type: GrantFiled: July 19, 2019Date of Patent: August 3, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John Rozen, Martin Michael Frank, Yohei Ogawa
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Publication number: 20210217953Abstract: A laterally switching cell structure including a metal-insulator-metal stack includes an active metal oxide layer including one or more sub-stoichiometric regions. The metal oxide layer includes one or more metal-oxides deposited conformally using a mixed precursor atomic layer deposition process. A graded oxygen profile in the metal oxide layer(s) of the stack including a mirrored impurity density may be formed wherein the sub-stoichiometric region(s) include a relatively high density of impurities obtained as reaction by-products. Arrays of cell structures can be formed with no requirement for a thick active electrode, allowing for more space for a metal fill and optional selector, thereby reducing access resistance.Type: ApplicationFiled: January 10, 2020Publication date: July 15, 2021Inventors: John Rozen, Takashi Ando, Martin M. Frank, Yohei Ogawa
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Patent number: 11032863Abstract: A wireless communication device includes a wireless communication unit and a processor. The wireless communication circuit performs a plurality of wireless communications by switching the wireless communications by performing time division multiplexing of channels used for the wireless communications. The processor causes the wireless communication circuit to perform a first wireless communication for wirelessly communicating via a relay device which is different from the wireless communication device and a second wireless communication for wirelessly communicating with a wireless terminal through a Peer to Peer system. The wireless communication circuit performs the time division multiplexing of a first channel and a second channel, the first channel corresponds to the first wireless communication, and the second channel corresponds to the second wireless communication.Type: GrantFiled: May 30, 2019Date of Patent: June 8, 2021Assignee: Seiko Epson CorporationInventors: Yohei Ogawa, Taichi Ueno
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Publication number: 20210020427Abstract: Embodiments of the present invention are directed to forming a sub-stoichiometric metal-oxide film using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor can include a metal and a first ligand. The second precursor can include the same metal and a second ligand. A substrate can be exposed to the first precursor during a first pulse of an ALD cycle. The substrate can be exposed to the second precursor during a second pulse of the ALD cycle. The second pulse can occur directly after the first pulse without an intervening thermal oxidant. The substrate can be exposed to the thermal oxidant during a third pulse of the ALD cycle.Type: ApplicationFiled: July 19, 2019Publication date: January 21, 2021Inventors: John Rozen, Martin Michael Frank, Yohei Ogawa
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Publication number: 20210020426Abstract: Embodiments of the present invention are directed to forming a ternary compound using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor includes a first metal and a first ligand. The second precursor includes a second metal and a second ligand. The second ligand is selected based on the first ligand to target a second metal uptake. A substrate is exposed to the first precursor during a first pulse of an ALD cycle and the substrate is exposed to the second precursor during a second pulse of the ALD cycle, the second pulse occurring after the first pulse. The substrate is exposed to a third precursor (e.g., an oxidant) during a third pulse of the ALD cycle. The ternary compound can include a ternary oxide film.Type: ApplicationFiled: July 17, 2019Publication date: January 21, 2021Inventors: Martin Michael Frank, John Rozen, Yohei Ogawa
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Publication number: 20200333820Abstract: A constant current circuit includes a depletion-type NMOS transistor having a drain connected to a constant current output terminal, and a resistance element provided between the depletion-type NMOS transistor and a ground terminal. The depletion-type NMOS transistor includes a first depletion-type NMOS transistor and a second depletion-type NMOS transistor which are connected in parallel and arranged to have current directions forming an angle of 90 degrees. The resistance element includes a first resistor and a second resistor which are arranged to have current directions forming an angle of 90 degrees.Type: ApplicationFiled: April 2, 2020Publication date: October 22, 2020Inventors: Tomoki HIKICHI, Kentaro Fukai, Takaaki Hioka, Yohei Ogawa
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Publication number: 20200313080Abstract: A semiconductor device includes a semiconductor substrate having a surface perpendicular to the first direction; a vertical Hall element formed in the semiconductor substrate, and including a magnetosensitive portion having a depth in the first direction, a width in the second direction, and a length in the third direction; and an excitation wiring extending in the third direction and disposed above the semiconductor substrate and at a position that overlaps the center position of the width of the magnetosensitive portion, and the value u derived from Expression (1) is 0.Type: ApplicationFiled: February 27, 2020Publication date: October 1, 2020Inventors: Yohei OGAWA, Hirotaka Uemura
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Publication number: 20200314108Abstract: An information processing apparatus includes a first port, a second port, a storage device, and a determining unit. The first port is to be connected to a first network having a first security level. The second port is to be connected to a second network having a second security level. The second security level is lower than the first security level. The storage device holds first setting information for connection to the first network and second setting information for connection to the second network. The determining unit makes network connection to at least the first port in accordance with the second setting information and determines, on the basis of a result from the network connection to at least the first port in accordance with the second setting information, whether the network connection to the first port is made properly.Type: ApplicationFiled: March 10, 2020Publication date: October 1, 2020Inventor: Yohei OGAWA
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Publication number: 20200313079Abstract: A semiconductor device includes a semiconductor substrate; a vertical Hall element including a magnetosensitive portion, and formed in the semiconductor substrate; and an excitation wiring provided above a surface of the semiconductor substrate and apart from the magnetosensitive portion. The excitation wiring is formed of a single wiring with a plurality of turns. The excitation wiring includes a plurality of main wiring portions arranged side by side, and apart from one another in an overlapping region that overlaps the magnetosensitive portion as viewed in plan view from a direction orthogonal to the surface of the semiconductor substrate; and auxiliary wiring portions connecting each of the plurality of main wiring portions to one another in series.Type: ApplicationFiled: March 20, 2020Publication date: October 1, 2020Inventors: Yohei OGAWA, Hirotaka UEMURA
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Publication number: 20200313081Abstract: A semiconductor device includes a semiconductor substrate: a vertical Hall element formed in the semiconductor substrate, and having a magnetosensitive portion; a first excitation wiring disposed above the magnetosensitive portion, and configured to apply a first calibration magnetic field (M1) to the magnetosensitive portion; and second excitation wirings disposed above the magnetosensitive portion on one side and on another side of the first excitation wiring, respectively, along the first excitation wiring as viewed in plan view from immediately above a front surface of the semiconductor substrate, and configured to apply second calibration magnetic fields (M2) to the magnetosensitive portion.Type: ApplicationFiled: March 3, 2020Publication date: October 1, 2020Inventors: Yohei OGAWA, Hirotaka UEMURA
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Patent number: 10721788Abstract: An electronic apparatus includes a wireless communication unit which performs wireless communication, and a processing unit which controls the communication of the wireless communication unit. In a state in which the wireless communication unit performs wireless connections with a plurality of terminal apparatuses (existing connection terminals) and the wireless communication unit starts a wireless connection with a new connection terminal, which is different from the plurality of terminal apparatuses, the processing unit cuts the wireless connections with the plurality of terminal apparatuses, and establishes the wireless connections with the plurality of terminal apparatuses after waiting for establishment of the wireless connection with the new connection terminal.Type: GrantFiled: September 13, 2018Date of Patent: July 21, 2020Assignee: SEIKO EPSON CORPORATIONInventors: Yohei Ogawa, Kenji Sakuda
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Publication number: 20200066859Abstract: A gate structure for effective work function adjustments of semiconductor devices that includes a gate dielectric on a channel region of a semiconductor device; a first metal nitride in direct contact with the gate dielectric; a conformal carbide of Aluminum material layer having an aluminum content greater than 30 atomic wt. %; and a second metal nitride layer in direct contact with the conformal aluminum (Al) and carbon (C) containing material layer. The conformal carbide of aluminum (Al) layer includes aluminum carbide, or Al4C3, yielding an aluminum (Al) content up to 57 atomic % (at. %) and work function setting from 3.9 eV to 5.0 eV at thicknesses below 25 ?. Such structures can present metal gate length scaling and resistance benefit below 25 nm compared to state of the art work function electrodes.Type: ApplicationFiled: October 30, 2019Publication date: February 27, 2020Inventors: Takashi Ando, Ruqiang Bao, Masanobu Hatanaka, Vijay Narayanan, Yohei Ogawa, John Rozen
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Patent number: 10529815Abstract: A gate structure for effective work function adjustments of semiconductor devices that includes a gate dielectric on a channel region of a semiconductor device; a first metal nitride in direct contact with the gate dielectric; a conformal carbide of Aluminum material layer having an aluminum content greater than 30 atomic wt. %; and a second metal nitride layer in direct contact with the conformal aluminum (Al) and carbon (C) containing material layer. The conformal carbide of aluminum (Al) layer includes aluminum carbide, or Al4C3, yielding an aluminum (Al) content up to 57 atomic % (at. %) and work function setting from 3.9 eV to 5.0 eV at thicknesses below 25 ?. Such structures can present metal gate length scaling and resistance benefit below 25 nm compared to state of the art work function electrodes.Type: GrantFiled: October 31, 2017Date of Patent: January 7, 2020Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, ULVAC, INC.Inventors: Takashi Ando, Ruqiang Bao, Masanobu Hatanaka, Vijay Narayanan, Yohei Ogawa, John Rozen