Patents by Inventor Yoichi Asano
Yoichi Asano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6720106Abstract: An membrane electrode assembly for a fuel cell composed of a pair of electrode catalyst layers and an electrolyte membrane sandwiched between the electrode catalyst layers is configured so that the catalyst of at least one surface of the electrode catalyst layers enters in the electrolyte membrane whereby the electrode catalyst layer and the electrolyte membrane are unified with each other. In this configuration, no exfoliation occurs at the interface between the electrode catalyst layer and the electrolyte membrane, and the durability of the membrane electrode assembly can be increased even during the course of heat cycles.Type: GrantFiled: August 30, 2001Date of Patent: April 13, 2004Assignee: Honda Giken Kogyo Kabushiki KaishaInventors: Kaoru Fukuda, Masaaki Nanaumi, Nobuhiro Saito, Yoichi Asano, Nagayuki Kanaoka
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Publication number: 20040043297Abstract: The invention provides a proton conductive resin composition from which proton conductive membranes exhibiting high proton conductivity can be obtained without treatment to increase the acid concentration in the membrane. The invention also provides a method for preparing the composition, and a proton conductive membrane comprising the composition.Type: ApplicationFiled: August 15, 2003Publication date: March 4, 2004Applicants: JSR CORPORATION, HONDA GIKEN KOGYO KABUSHIKI KAISHAInventors: Kohei Goto, Mayumi Kakuta, Yoichi Asano, Nagayuki Kanaoka
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Publication number: 20040028806Abstract: The present invention is intended to provide A process for producing an electrolyte membrane-bonded electrode having excellent power generation properties property when constitutes in an electrode assembly, and a varnish composition for an electrolyte, by the use of which to obtain an electrolyte membrane-electrode bonded structure capable of retaining excellent power generation properties. is obtaned. A process for producing a first electrolyte membrane bonded electrode comprises applying, onto an electrode, a water containing dispersion containing a perfluorosulfonic acid polymer, an organic solvent A and water and having a perfluorosulfonic acid polymer content of 0.Type: ApplicationFiled: April 23, 2003Publication date: February 12, 2004Inventors: Makoto Higami, Kohei Goto, Nagayuki Kanaoka, Ryoichiro Takahashi, Yoichi Asano, Osamu Kakutani, Gen Okiyama
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Patent number: 6685984Abstract: The method for the production of multilayers comprises: applying a coating solution (I) which comprises a dissolved or dispersed proton-conductive polymer and a solvent (Is) containing water in amounts from 25 to 60 wt % and an organic solvent in amounts from 75 down to 40 wt %, on an electrode, applying a coating solution (II) which comprises a dissolved or dispersed proton-conductive polymer and a solvent (IIs) containing water in amounts from 0 to less than 25 wt % and an organic solvent in amounts above 75 wt %, on the wet first coating without any drying of the first coating; and drying the coatings to form an electrolyte membrane. The methods can provide multilayers capable of satisfactory power generation properties as an electrode structure by forming an electrolyte membrane on an electrode without causing any penetration of electrolyte into the electrode.Type: GrantFiled: May 29, 2003Date of Patent: February 3, 2004Assignees: JSR Corporation, Honda Giken Kogyo Kabushiki KaishaInventors: Makoto Higami, Kohei Goto, Yoichi Asano, Ryoichiro Takahashi, Osamu Kakutani, Gen Okiyama
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Publication number: 20030228421Abstract: The method for the production of multilayers comprises: applying a coating solution (I) which comprises a dissolved or dispersed proton-conductive polymer and a solvent (Is) containing water in amounts from 25 to 60 wt % and an organic solvent in amounts from 75 down to 40 wt %, on an electrode, applying a coating solution (II) which comprises a dissolved or dispersed proton-conductive polymer and a solvent (IIs) containing water in amounts from 0 to less than 25 wt % and an organic solvent in amounts above 75 wt %, on the wet first coating without any drying of the first coating; and drying the coatings to form an electrolyte membrane. The methods can provide multilayers capable of satisfactory power generation properties as an electrode structure by forming an electrolyte membrane on an electrode without causing any penetration of electrolyte into the electrode.Type: ApplicationFiled: May 29, 2003Publication date: December 11, 2003Applicants: JSR CORPORATION, HONDA GIKEN KOGYO KABUSHIKI KAISHAInventors: Makoto Higami, Kohei Goto, Yoichi Asano, Ryoichiro Takahashi, Osamu Kakutani, Gen Okiyama
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Publication number: 20030219532Abstract: According to a method of manufacturing a membrane electrode assembly having an excellent electric power generating capability, a base 11 is coated with a first polymer electrolytic solution 12 to form a first polymer electrolytic membrane 12a which is undried. The undried first polymer electrolytic membrane 12a is coated with a first electrode dispersion 13, which comprises a second polymer electrolytic solution and a catalyst carried on a catalyst carrier and dissolved therein. The first electrode dispersion 13 is dried to form a first electrode 2a, thereby forming a positive-electrode membrane electrode assembly 14a. Another base 11 is coated with a third polymer electrolytic solution 12 to form a second polymer electrolytic membrane 12b which is undried. The undried second polymer electrolytic membrane 12b is coated with a second electrode dispersion 13, which comprises a fourth polymer electrolytic solution and a catalyst carried on a catalyst carrier and dissolved therein.Type: ApplicationFiled: May 27, 2003Publication date: November 27, 2003Inventors: Nagayuki Kanaoka, Ryoichiro Takahashi, Yoichi Asano
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Publication number: 20030064268Abstract: A solid polymer fuel cell (1) has an electrolyte membrane (2), and an air electrode (3) and a fuel electrode (4) that closely contact to opposite sides of the electrolyte membrane (2) respectively. The electrolyte membrane (2) has a membrane core (9) comprising a polymer ion-exchange component, and a plurality of phyllosilicate particles (10) that disperse in the membrane core (9) and are subjected to ion-exchange processing between metal ions and protons, and proton conductance Pc satisfies Pc>0.05 S/cm. Owing to this, it is possible to provide the solid polymer fuel cell equipped with the electrolyte membrane (2) that has excellent high-temperature strength and can improve power-generating performance.Type: ApplicationFiled: April 10, 2002Publication date: April 3, 2003Inventors: Kaoru Fukuda, Yoichi Asano, Nagayuki Kanaoka, Nobuhiro Saito, Masaaki Nanaumi
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Publication number: 20020172850Abstract: A composite polymer electrolyte membrane is formed from a first polymer electrolyte comprising a sulfonated polyarylene polymer and a second polymer electrolyte comprising another hydrocarbon polymer electrolyte. In the first polymer electrolyte, 2-70 mol % constitutes an aromatic compound unit with an electron-attractive group in its principal chain, while 30-98 mol % constitutes an aromatic compound unit without an electron-attractive group in its principal chain. The second polymer electrolyte is a sulfonated polyether or sulfonated polysulfide polymer electrolyte. The composite polymer electrolyte membrane is formed from a matrix comprising the first polymer electrolyte selected from among sulfonated polyarylene polymers and having an ion exchange capacity in excess of 1.5 meq/g but less than 3.0 meq/g, which is supported on a reinforcement comprising the second polymer electrolyte having an ion exchange capacity in excess of 0.5 meq/g but less than 1.5 meq/g.Type: ApplicationFiled: January 22, 2002Publication date: November 21, 2002Applicant: HONDA GIKEN KOGYO KABUSHIKI KAISHA, JSR CORPORATIONInventors: Yoichi Asano, Masaaki Nanaumi, Nagayuki Kanaoka, Hiroshi Sohma, Nobuhiro Saito, Junji Matsuo, Kohei Goto, Masayuki Takahashi, Yuji Naito, Fusazumi Masaka
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Publication number: 20020164513Abstract: A polymer electrolyte membrane obtained by subjecting a sulfonated polyarylene membrane having an initial water content of 80-300 weight % to a hot-water treatment. A composite polymer electrolyte membrane comprising a matrix made of a first sulfonated aromatic polymer having a high ion exchange capacity, and a reinforcing material constituted by a second sulfonated aromatic polymer having a low ion exchange capacity in the form of fibers or a porous membrane.Type: ApplicationFiled: January 18, 2002Publication date: November 7, 2002Applicant: HONDA GIKEN KOGYO KABUSHIKI KAISHAInventors: Yoichi Asano, Masaaki Nanaumi, Hiroshi Sohma, Nagayuki Kanaoka, Nobuhiro Saito
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Publication number: 20020078325Abstract: Herein disclosed is a microcomputer MCU adopting the general purpose register method. The microcomputer is enabled to have a small program capacity or a high program memory using efficiency and a low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting a fixed length instruction format having a power of 2 but a smaller bit number than that of the maximum data word length fed to instruction execution means. And, the control of the coded division is executed by noting the code bits.Type: ApplicationFiled: December 11, 2001Publication date: June 20, 2002Applicant: Hitachi, Ltd.Inventors: Shumpei Kawasaki, Eiji Sakakibara, Kaoru Fukada, Takanaga Yamazaki, Yasushi Akao, Shiro Baba, Toshimasa Kihara, Keiichi Kurakazu, Takashi Tsukamoto, Shigeki Masumura, Yasuhiro Tawara, Yugo Kashiwagi, Shuya Fujita, Katsuhiko Ishida, Noriko Sawa, Yoichi Asano, Hideaki Chaki, Tadahiko Sugawara, Masahiro Kainaga, Kouki Noguchi, Mitsuru Watabe
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Publication number: 20020055034Abstract: An membrane electrode assembly for a fuel cell composed of a pair of electrode catalyst layers and an electrolyte membrane sandwiched between the electrode catalyst layers is configured so that the catalyst of at least one surface of the electrode catalyst layers enters in the electrolyte membrane whereby the electrode catalyst layer and the electrolyte membrane are unified with each other. In this configuration, no exfoliation occurs at the interface between the electrode catalyst layer and the electrolyte membrane, and the durability of the membrane electrode assembly can be increased even during the course of heat cycles.Type: ApplicationFiled: August 30, 2001Publication date: May 9, 2002Inventors: Kaoru Fukuda, Masaaki Nanaumi, Nobuhiro Saito, Yoichi Asano, Nagayuki Kanaoka
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Publication number: 20020045081Abstract: An electrolyte membrane/electrode assembly 9 of a solid polymer electrolyte fuel cell includes an electrolyte membrane 2, and an air pole 3 and a fuel pole 4 provided to sandwich the electrolyte membrane 2 therebetween. Each of the electrolyte membrane, the air pole and the fuel pole includes a polymer ion-exchange component. The electrolyte membrane/electrode assembly has an ion-exchange capacity Ic in a range of 0.9 meq/g≦Ic≦5 meq/g, and a dynamic viscoelastic modulus at 85° C. in a range of 5×108 Pa≦Dv≦1×1010 Pa. In the electrolyte membrane/electrode assembly 9, a high power-generating performance can be maintained at an operating temperature not lower than 85° C.Type: ApplicationFiled: July 3, 2001Publication date: April 18, 2002Inventors: Masaaki Nanaumi, Yoichi Asano, Nobuhiro Saito, Nagayuki Kanaoka, Kaoru Fukuda
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Patent number: 6343357Abstract: A microcomputer MCU adopting the general purpose register method is enabled to have a small program capacity or a high program memory using efficiency and a low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting a fixed length instruction format having a power of 2 but a smaller bit number than that of the maximum data word length fed for instruction execution. And, the control of the coded division is executed by noting the code bits.Type: GrantFiled: August 3, 2000Date of Patent: January 29, 2002Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp., Hitachi Microcomputer System, Ltd.Inventors: Shumpei Kawasaki, Eiji Sakakibara, Kaoru Fukada, Takanaga Yamazaki, Yasushi Akao, Shiro Baba, Toshimasa Kihara, Keiichi Kurakazu, Takashi Tsukamoto, Shigeki Masumura, Yasuhiro Tawara, Yugo Kashiwagi, Shuya Fujita, Katsuhiko Ishida, Noriko Sawa, Yoichi Asano, Hideaki Chaki, Tadahiko Sugawara, Masahiro Kainaga, Kouki Noguchi, Mitsuru Watabe
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Patent number: 6272620Abstract: A microcomputer MCU adopting the general purpose register method is enabled to have a small program capacity or a high program memory using efficiency and a low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting a fixed length instruction format having a power of 2 but a smaller bit number than that of the maximum data word length fed for instruction execution. And, the control of the coded division is executed by noting the code bits.Type: GrantFiled: April 4, 2000Date of Patent: August 7, 2001Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp., Hitachi Microcomputer System, Ltd.Inventors: Shumpei Kawasaki, Eiji Sakakibara, Kaoru Fukada, Takanaga Yamazaki, Yasushi Akao, Shiro Baba, Toshimasa Kihara, Keiichi Kurakazu, Takashi Tsukamoto, Shigeki Masumura, Yasuhiro Tawara, Yugo Kashiwagi, Shuya Fujita, Katsuhiko Ishida, Noriko Sawa, Yoichi Asano, Hideaki Chaki, Tadahiko Sugawara, Masahiro Kainaga, Kouki Noguchi, Mitsuru Watabe
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Patent number: 6253308Abstract: A microcomputer CMU adopting the general purpose register method is enabled to have a small program capacity or a high program memory using efficiency and a low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting a fixed length instruction format having a power of 2 but a smaller bit number than that of the maximum data word length fed for instruction execution. And, the control of the coded division is executed by noting the code bits.Type: GrantFiled: April 2, 1998Date of Patent: June 26, 2001Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp., Hitachi Microcomputer System, Ltd.Inventors: Shumpei Kawasaki, Eiji Sakakibara, Kaoru Fukada, Takanaga Yamazaki, Yasushi Akao, Shiro Baba, Toshimasa Kihara, Keiichi Kurakazu, Takashi Tsukamoto, Shigeki Masumura, Yasuhiro Tawara, Yugo Kashiwagi, Shuya Fujita, Katsuhiko Ishida, Noriko Sawa, Yoichi Asano, Hideaki Chaki, Tadahiko Sugawara, Masahiro Kainaga, Kouki Noguchi, Mitsuru Watabe
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Patent number: 6205535Abstract: A branch instruction format has different respective field lengths for conditional branch instructions and unconditional branch instructions. A conditional branch instruction has a first bit length and a first area for a displacement designating an address to be jumped, wherein the first area has a second bit length that is smaller than the first bit length. An unconditional branch instruction also has the first bit length, and a second area for a displacement designating an address to be jumped, wherein the second area has a third bit length that is different from the first and second bit lengths.Type: GrantFiled: October 6, 1998Date of Patent: March 20, 2001Assignee: Hitachi, Ltd.Inventors: Shumpei Kawasaki, Eiji Sakakibara, Kaoru Fukada, Takanaga Yamazaki, Yasushi Akao, Shiro Baba, Toshimasa Kihara, Keiichi Kurakazu, Takashi Tsukamoto, Shigeki Masumura, Yasuhiro Tawara, Yugo Kashiwagi, Shuya Fujita, Katsuhiko Ishida, Noriko Sawa, Yoichi Asano, Hideaki Chaki, Tadahiko Sugawara, Masahiro Kainaga, Kouki Noguchi, Mitsuru Watabe
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Patent number: 6131154Abstract: Herein disclosed is a microcomputer MCU adopting the general purpose register method. The microcomputer is enabled to have a small program capacity or a high program memory using efficiency and a low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting a fixed length instruction format having a power of 2 but a smaller bit number than that of the maximum data word length fed to instruction execution means. And, the control of the coded division is executed by noting the code bits.Type: GrantFiled: July 23, 1997Date of Patent: October 10, 2000Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp., Hitachi Microcomputer System, Ltd.Inventors: Shumpei Kawasaki, Eiji Sakakibara, Kaoru Fukada, Takanaga Yamazaki, Yasushi Akao, Shiro Baba, Toshimasa Kihara, Keiichi Kurakazu, Takashi Tsukamoto, Shigeki Masumura, Yasuhiro Tawara, Yugo Kashiwagi, Shuya Fujita, Katsuhiko Ishida, Noriko Sawa, Yoichi Asano, Hideaki Chaki, Tadahiko Sugawara, Masahiro Kainaga, Kouki Noguchi, Mitsuru Watabe
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Patent number: 6122724Abstract: A microcomputer MCU adopting the general purpose register method is enabled to have a small program capacity or a high program memory using efficiency and a low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting a fixed length instruction format having a power of 2 but a smaller bit number than that of the maximum data word length fed for instruction execution. And, the control of the coded division is executed by noting the code bits.Type: GrantFiled: February 16, 1999Date of Patent: September 19, 2000Assignee: Hitachi, Ltd.Inventors: Shumpei Kawasaki, Eiji Sakakibara, Kaoru Fukada, Takanaga Yamazaki, Yasushi Akao, Shiro Baba, Toshimasa Kihara, Keiichi Kurakazu, Takashi Tsukamoto, Shigeki Masumura, Yasuhiro Tawara, Yugo Kashiwagi, Shuya Fujita, Katsuhiko Ishida, Noriko Sawa, Yoichi Asano, Hideaki Chaki, Tadahiko Sugawara, Masahiro Kainaga, Kouki Noguchi, Mitsuru Watabe
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Patent number: 5991545Abstract: Herein disclosed is a microcomputer MCU adopting the general purpose register method. The microcomputer is enabled to have a small program capacity or a high program memory using efficiency and a low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting a fixed length instruction format having a power of 2 but a smaller bit number than that of the maximum data word length fed to instruction execution means. And, the control of the coded division is executed by noting the code bits.Type: GrantFiled: June 7, 1995Date of Patent: November 23, 1999Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp., Hitachi Microcomputer System Ltd.Inventors: Shumpei Kawasaki, Eiji Sakakibara, Kaoru Fukada, Takanaga Yamazaki, Yasushi Akao, Shiro Baba, Toshimasa Kihara, Keiichi Kurakazu, Takashi Tsukamoto, Shigeki Masumura, Yasuhiro Tawara, Yugo Kashiwagi, Shuya Fujita, Katsuhiko Ishida, Noriko Sawa, Yoichi Asano, Hideaki Chaki, Tadahiko Sugawara, Masahiro Kainaga, Kouki Noguchi, Mitsuru Watabe
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Patent number: 5969976Abstract: A division method and circuit performs a division for signed data by adding or subtracting a divisor to or from the dividend or the partial remainder from the division, according to the sign of the divisor or the dividend and the partial remainder to acquire a new partial remainder. The division is repeated a predetermined number of times in which a quotient bit is acquired according to the sign of the acquired partial remainder or the divisor. The dividend is corrected by subtracting 1, which is the significance of an LSB of the corresponding dividend, from the dividend when the sign of the dividend is negative, and the corrected dividend is used for the division processing.Type: GrantFiled: October 10, 1997Date of Patent: October 19, 1999Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp., Hitachi Microcomputer System Ltd.Inventors: Shumpei Kawasaki, Eiji Sakakibara, Kaoru Fukada, Takanaga Yamazaki, Yasushi Akao, Shiro Baba, Toshimasa Kihara, Keiichi Kurakazu, Takashi Tsukamoto, Shigeki Masumura, Yasuhiro Tawara, Yugo Kashiwagi, Shuya Fujita, Katsuhiko Ishida, Noriko Sawa, Yoichi Asano, Hideaki Chaki, Tadahiko Sugawara, Masahiro Kainaga, Kouki Noguchi, Mitsuru Watabe