Patents by Inventor Yoshihiro Ashi

Yoshihiro Ashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5812289
    Abstract: An optical transmission system accomplishes optical transmission to a long distance by combining a multiplexing line terminal with optical amplifiers, linear repeaters, and regenerators with optical amplifiers combined together. The system also accomplishes the optical transmission to a short distance by directly connecting the linear terminals therebetween, with an electric-to-optic converter replaced by an electric-to-optic converter having a semiconductor amplifier, with an optic-toelectric converter by an optic-to-electric converter having an avalanche photodiode as light receiver, and with no use of any optical booster amplifier and optical preamplifier in the multiplexing line terminal. With these, the optical transmission system can be easily constructed depending on the transmission distance required.
    Type: Grant
    Filed: August 29, 1996
    Date of Patent: September 22, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Keiji Tomooka, Naohiro Sakakida, Shin Nishimura, Yoshihiro Ashi, Hironari Matsuda, Satoshi Aoki, Yukio Nakano, Masahiro Takatori, Toru Kazawa, Shinya Sasaki, Ryoji Takeyari, Hiroyuki Nakano
  • Patent number: 5768274
    Abstract: A cell multiplexer includes a multiplexing unit for time-divisionally multiplexing ATM cell signals given from a plurality of input lines, a write controller for storing cell signals outputted from the multiplexing unit in a buffer memory successively correspondingly to the input lines, a read controller for reading the cell signals stored in the buffer memory from the buffer memory in the form of data blocks synchronized with an ATM cell structure, and a cell delineation controller for detecting delineation states of the data blocks read out from the buffer memory, notifying the read controller of delineation control information corresponding to a result of the detection and transmitting data blocks read out in synchronism with a predetermined cell structure to the output line selectively, wherein the read controller determines the read beginning addresses of data blocks to be read out nextly correspondingly to the input lines on the basis of the delineation control information notified by the cell delineati
    Type: Grant
    Filed: July 11, 1996
    Date of Patent: June 16, 1998
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Masaru Murakami, Yozo Oguri, Yoshihiro Ashi, Katsuyoshi Tanaka, Takahiko Kozaki, Akihiko Takase, Morihito Miyagi
  • Patent number: 5757806
    Abstract: A data multiplexing system which includes a plurality of data multiplexing buses through which a plurality of low-speed digital signals are collected into, and distributed from, a multiplexer/demultiplxer. In a data multiplexing mode, the low-speed digital signals entered from a plurality of low-speed transmission lines have their signal format converted by respectively corresponding low-speed interface circuits, and the resulting signals are multiplexed in time slots designated within a multiplexed signal of primary level on the up bus line of the corresponding data multiplexing bus. The high-speed multiplexer multiplexes the collected signals up to a predetermined signal level and sends the resulting secondary multiplexed signal to a high-speed interface module having a high-speed transmission line interface. The high-speed interface module converts the received secondary multiplexed signal and sends the resulting signal to the high-speed transmission line.
    Type: Grant
    Filed: April 28, 1997
    Date of Patent: May 26, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Hiroki Koyama, Yoshihiro Ashi, Hiroyuki Fujita, Michael A. Wright
  • Patent number: 5739932
    Abstract: An optical transmission system accomplishes optical transmission to a long distance by combining a multiplexing line terminal with optical amplifiers, linear repeaters, and regenerators with optical amplifiers combined together. The system also accomplishes the optical transmission to a short distance by directly connecting the linear terminals therebetween, with an electric-to-optic converter replaced by an electric-to-optic converter having a semiconductor amplifier, with an optic-to-electric converter by an optic-to-electric converter having an avalanche photodiode as light receiver, an with no use of any optical booster amplifier and optical preamplifier in the multiplexing line terminal. With these, the optical transmission system can be easily constructed depending on the transmission distance required.
    Type: Grant
    Filed: June 20, 1996
    Date of Patent: April 14, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Keiji Tomooka, Naohiro Sakakida, Shin Nishimura, Yoshihiro Ashi, Hironari Matsuda, Satoshi Aoki, Yukio Nakano, Masahiro Takatori, Toru Kazawa, Shinya Sasaki, Ryoji Takeyari, Hiroyuki Nakano
  • Patent number: 5721727
    Abstract: A method of switching a route path of a ring network having a plurality of route paths for signal transmission, in which a transmission station on a transmission side transmits information of a same content to said plurality of route paths, a transmission station on a reception side selects one of the plurality of route paths, and a failure on the selected route path is automatically retrieved. The method includes the steps of: monitoring whether a signal received on each route path is normal or not; loading failure information as a path status identifier in a predetermined field of the signal received on each route path, the failure information indicating whether the monitoring step has detected a failure; and selecting one of the plurality of route paths in accordance with the failure information and predetermined logic.
    Type: Grant
    Filed: September 28, 1995
    Date of Patent: February 24, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Yoshihiro Ashi, Masahiro Takatori
  • Patent number: 5671074
    Abstract: An optical transmission system accomplishes optical transmission over a long distance by combining a multiplexing line terminal with optical amplifiers, linear repeaters, and regenerators with optical amplifiers combined together. The system also accomplishes the optical transmission over a short distance by directly connecting the linear terminals therebetween, with an electric-to-optic converter replaced by an electric-to-optic converter having a semiconductor amplifier, with an optic-to-electric converter by an optic-to-electric converter having an avalanche photodiode as light receiver, and with no use of any optical booster amplifier and optical preamplifier in the multiplexing line terminal. With these, the optical transmission system can be easily constructed depending on the transmission distance required.
    Type: Grant
    Filed: June 20, 1996
    Date of Patent: September 23, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Keiji Tomooka, Naohiro Sakakida, Shin Nishimura, Yoshihiro Ashi, Hironari Matsuda, Satoshi Aoki, Yukio Nakano, Masahiro Takatori, Toru Kazawa, Shinya Sasaki, Kyoji Takeyari, Hiroyuki Nakano
  • Patent number: 5634097
    Abstract: A method and apparatus of tracing VP's (virtual paths) wherein operational information of VP connectors are collected through OAM (operation and maintenance) cells. The VP connectors establish a connection at a VP level within a network in which the cells are transferred in an ATM (asynchronous transfer mode). Each VP connector detects an OAM cell for VP tracing as received from another of the VP connectors, and judges if an area for affixing the operational information in the VP connector itself exists in the detected OAM cell. In the VP connector when the area exists, the detected OAM cell is specified to be the OAM cell for writing the operational information thereinto, and the specified OAM cell is sent out after affixing the operational information thereto.
    Type: Grant
    Filed: March 8, 1993
    Date of Patent: May 27, 1997
    Assignees: Hitachi, Ltd., Nippon Telegraph and Telephone Corporation
    Inventors: Yoshihiro Ashi, Toshihiko Fujita, Hiromi Ueda, Haruhiko Matsunaga
  • Patent number: 5600631
    Abstract: In order that the various ring-switching modes of 2-Fiber BLSR, 4-Fiber BLSR and UPSR may be switched merely by changing a software, space division switches are disposed across an add drop switch, and one output drop switch and one output of the second space division switch are connected with the input stage of a selector which can be selected at the unit of a time slot. As a result, the various ring-switching modes can be switched merely by changing the software while suppressing the scale of the switch. Moreover, the change from the ring switch to the linear switch and vice versa can be effected.
    Type: Grant
    Filed: December 15, 1994
    Date of Patent: February 4, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Takatori, Yoshihiro Ashi, Hiroyuki Fujita
  • Patent number: 5577037
    Abstract: A method of processing inclusively STM signals and ATM signals is provided in which an address in a data memory, in which an output signal is temporarily stored for switching of the STM signals, is made different from that in the data memory, in which an input signal is temporarily stored for switching of the ATM signals, and the address which is to be given to the STM signal is registrated in a memory (an address control memory) to be given to the STM signal periodically, while with respect to the address which is to be given to the ATM signal, the unused address is stored in a memory (an idle address FIFO memory), and when storing the ATM signal in the data memory, the unused address is read out from the idle address FIFO memory to be used successively.
    Type: Grant
    Filed: March 16, 1994
    Date of Patent: November 19, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Takatori, Yukio Nakano, Yoshihiro Ashi
  • Patent number: 5570368
    Abstract: A cell multiplexer includes a multiplexing unit for time-divisionally multiplexing ATM cell signals given from a plurality of input lines, a write controller for storing cell signals outputted from the multiplexing unit in a buffer memory successively correspondingly to the input lines, a read controller for reading the cell signals stored in the buffer memory from the buffer memory in the form of data blocks synchronized with an ATM cell structure, and a cell delineation controller for detecting delineation states of the data blocks read out from the buffer memory, notifying the read controller of delineation control information corresponding to a result of the detection and transmitting data blocks read out in synchronism with a predetermined cell structure to the output line selectively, wherein the read controller determines the read beginning addresses of data blocks to be read out nextly correspondingly to the input lines on the basis of the delineation control information notified by the cell delineati
    Type: Grant
    Filed: March 24, 1995
    Date of Patent: October 29, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Masaru Murakami, Yozo Oguri, Yoshihiro Ashi, Katsuyoshi Tanaka, Takahiko Kozaki, Akihiko Takase, Morihito Miyagi
  • Patent number: 5557621
    Abstract: An ATM switch including ECC encoder circuits each for generating, for an ATM cell as an information symbol, an ECC check symbol and for adding the ECC check symbol thereto, cell partitioning circuits each for subdividing an information field of an ATM cell into N partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells (N+M) partial cell switches for respectively routing the (N+M) partial cells in an independent fashion based on the routing tag, and ECC decoder circuits for receiving the (N+M) partial cells thus routed and for achieving an error correction on the received partial cells.
    Type: Grant
    Filed: August 19, 1991
    Date of Patent: September 17, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Yukio Nakano, Takahiko Kozaki, Shinobu Gohara, Yoshihiro Ashi
  • Patent number: 5555477
    Abstract: An optical transmission system accomplishes optical transmission to a long distance by combining a multiplexing line terminal with optical amplifiers, linear repeaters, and regenerators with optical amplifiers combined together. The system also accomplishes the optical transmission to a short distance by directly connecting the linear terminals therebetween, with an electric-to-optic converter replaced by an electric-to-optic converter having a semiconductor amplifier, with an optic-to-electric converter by an optic-to-electric converter having an avalanche photodiode as light receiver, an with no use of any optical booster amplifier and optical preamplifier in the multiplexing line terminal. With these, the optical transmission system can be easily constructed depending on the transmission distance required.
    Type: Grant
    Filed: April 7, 1993
    Date of Patent: September 10, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Keiji Tomooka, Naohiro Sakakida, Shin Nishimura, Yoshihiro Ashi, Hironari Matsuda, Satoshi Aoki, Yukio Nakano, Masahiro Takatori, Toru Kazawa, Shinya Sasaki, Ryoji Takeyari, Hiroyuki Nakano
  • Patent number: 5550805
    Abstract: A method for constructing a network capable of self-healing from failure in a mesh network and a restoration algorithm are provided. A logical ring is set for each closed loop in the network, and when a failure occurs, the affected traffic is re-routed in the each logical ring toward the opposite direction away from the failure to restore the failed network. The network is divided into a plurality of logical rings to establish the restoration route so that time required for the restoration is shortened.
    Type: Grant
    Filed: February 8, 1995
    Date of Patent: August 27, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Takatori, Yukio Nakano, Yoshihiro Ashi
  • Patent number: 5500756
    Abstract: An optical repeater for realizing transmission of supervisory information of an optical fiber transmission system without the output power of an optical fiber amplifier being reduced, wherein a supervisory optical transmitter and optical receiver with a wavelength which is similar to the wavelength of the pumping light source of the optical fiber amplifier are mounted, and on the input side of the optical repeater, pumping light is multiplexed in the forward direction and a supervisory optical signal, which is multiplexed in wavelength and transmitted, is demultiplexed simultaneously by the first wavelength multi- and demultiplexer and they are received by the supervisory optical receiver, and on the output side of the optical repeater, pumping light is muitiplexed in the reverse direction and a supervisory optical signal outputted from the supervisory optical transmitter is multiplexed by the second wavelength multi- and demultiplexer.
    Type: Grant
    Filed: February 26, 1993
    Date of Patent: March 19, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Hideaki Tsushima, Shinya Sasaki, Yukio Nakano, Hiroyuki Nakano, Ryoji Tateyari, Hironari Matsuda, Kenji Tomooka, Naohiro Sakakida, Shin Nishimura, Yoshihiro Yano, Youichi Igarashi, Satoshi Aoki, Masahiro Takatori, Tohru Kazawa, Yoshihiro Ashi
  • Patent number: 5475676
    Abstract: First stage and third stage four-input four-output space division switches are arranged before and after a second stage time division switch, and two outputs of the first stage space division switch and two inputs of the third stage space division switch are connected by bypassing the time division switch. The time division switch has n control memories. A first control memory stores connection information in a normal state of each path set in the transmission line, a second control memory stores connection information of a first alternative path when failures occur in a path, and an n-th control memory (n is any integer equal or greater than 3) stores connection information of an (n-1)th alternative path, and a control memory corresponding the a failure pattern is selected from the n control memories for each path.
    Type: Grant
    Filed: July 12, 1993
    Date of Patent: December 12, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Takatori, Yukio Nakano, Yoshihiro Ashi, Hiroyuki Fujita
  • Patent number: 5473598
    Abstract: A cell routing method and apparatus in an ATM processing apparatus. The ATM processing apparatus has two or more routing tables associated with address filters of an ATM switch to store routing information for indicating the destination of cell output, and two or more conversion tables associated with VPI conversion circuits for replacing VPI (Virtual Path Identifier) or VCI conversion circuits for replacing VCI (Virtual Channel Identifier) to store information for indicating the VPI or VCI obtained after conversion. In an input interface circuit, selection information indicating which routing table and conversion table out of the above described two or more routing tables and two or more conversion tables should be selected is written into an occupied area within a cell.
    Type: Grant
    Filed: August 13, 1991
    Date of Patent: December 5, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Takatori, Yukio Nakano, Yoshihiro Ashi, Tadayuki Kanno
  • Patent number: 5452307
    Abstract: A data multiplexing system comprising a plurality of data multiplexing buses through which a plurality of low-speed digital signals are collected into, and distributed from, a multiplexer/demultiplexer. In a data multiplexing mode, the low-speed digital signals entered from a plurality of low-speed transmission lines have their signal format converted by respectively corresponding low-speed interface circuits, and the resulting signals are multiplexed in time slots designated within a multiplexed signal of primary level on the up bus line of the corresponding data multiplexing bus, under the controls of respectively corresponding bus control circuits. The high-speed multiplexer collects the primary multiplexed signals on the up bus lines of the plurality of data multiplexing buses, and further multiplexes the collected signals up to a predetermined signal level. Thereafter, it sends the resulting secondary multiplexed signal to a high-speed interface module having a high-speed transmission line interface.
    Type: Grant
    Filed: October 20, 1994
    Date of Patent: September 19, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Hiroki Koyama, Yoshihiro Ashi, Hiroyuki Fujita, Michael A. Wright
  • Patent number: 5394397
    Abstract: An ATM switching system which includes an input interface which is provided every incoming line and serves to convert header information of each input cell into internal routing information, a shared buffer memory and a cell writing control unit which forms normal cell list structures, which are prepared in correspondence to outgoing lines and in which a plurality of normal cells are chained together with their next addresses, and a broadcast cell list structure, in which a plurality of broadcast cells are chained together with their next addresses, in the shared buffer memory, and serves to add successively the input cells to ones of the list structures, which are selected in correspondence to respective internal routing information. The invention also includes a cell reading control unit which serves to fetch selectively the cell from the list structures formed in the shared buffer memory to distribute the cell thus fetched to the associated outgoing lines.
    Type: Grant
    Filed: March 29, 1993
    Date of Patent: February 28, 1995
    Assignees: Hitachi, Ltd., Nippon Telegraph and Telephone
    Inventors: Junichirou Yanagi, Yoshihiro Ashi, Takahiko Kozaki, Akihiko Takase, Takashi Nakashima
  • Patent number: 5359600
    Abstract: In an ATM switching network, ATM (asynchronous transfer mode) self-routing switches are interconnected by facilities carrying STM-N (synchronous transport modules level N) signals. At each inlet of an ATM self-routing switch, an STM overhead is removed from each frame of an incoming STM-N signal to create a vacant interval and the frame is converted according to ATM cell format into a series of data ATM cells, and an idle ATM cell is derived from the vacant interval. A supervisory bit sequence is inserted to the payload field of the idle ATM cell to produce a supervisory ATM cell, and the data and supervisory ATM cells are sent into the ATM switch. At each outlet of the switch, the bit sequence of the supervisory ATM cell is checked to evaluate the quality of the ATM switch and a series of data ATM cells is then converted into an STM-N signal according to STM-N frame format.
    Type: Grant
    Filed: February 16, 1993
    Date of Patent: October 25, 1994
    Assignees: Nippon Telegraph and Telephone Corporation, NEC Corporation, Hitachi, Ltd., Fujitsu Limited
    Inventors: Hiromi Ueda, Kenji Akutsu, Ryuichi Ikematsu, Takatoshi Kurano, Yoshihiro Ashi, Yukio Nakano, Takafumi Chujo, Shigeo Amemiya
  • Patent number: 5351238
    Abstract: A frame phase variable time-division switch according to the present invention comprises an input highway, a data memory for storing data multiplexed on the data highway, an output highway to which data read out of the data memory is outputted, a control memory for storing a write address or a read address of the data memory, a write counter for generating a write pulse, a read counter for generating a read pulse, a write reset terminal for inputting a pulse for controlling the phase of the write counter, and a read reset terminal for inputting a pulse for controlling the phase of the read counter.
    Type: Grant
    Filed: June 24, 1991
    Date of Patent: September 27, 1994
    Assignees: Hitachi, Ltd., Hitachi Communication System Inc.
    Inventors: Yoshihiro Ashi, Yukio Nakano, Kenji Takeda