Patents by Inventor Yoshihiro Hashimoto

Yoshihiro Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110228558
    Abstract: Conventional planar light source devices have a problem that increasing a utilization ratio of light results in a very narrow angle distribution of light. A planar light source device of the present invention has a light source (1), a light guide plate (2) for introducing light coming from the light source via a light-incident plane of the light guide plate and emits the light from almost all area of a light emission plane, and a light source side reflector (3) for reflecting the light coming from the light source and light which comes from the light source and is reflected by the light-incident plane of the light guide plate so that the reflected light is emitted to the light-incident plane of the light guide plate.
    Type: Application
    Filed: October 13, 2009
    Publication date: September 22, 2011
    Applicants: SHARP KABUSHIKI KAISHA, TOHOKU UNIVERSITY
    Inventors: Tatsuo Uchida, Yoshito Suzuki, Tohru Kawakami, Takahiro Ishinabe, Baku Katagiri, Yoshihiro Hashimoto, Shoichi Ishihara, Shuichi Kozaki, Yutaka Ishii
  • Publication number: 20110199786
    Abstract: A dichroic filter column (4) is provided on an incident surface (11). At least one of two end parts of a light guide plate (1) in a thickness direction is divided into a plurality of light guide paths (6), in a width direction of the light guide plate (1) by a plurality of cutout grooves (5). Portions of the plurality of light guide paths (6) on an incident surface (11) side are aligned in accordance with positions of a plurality of dichroic filters (31), respectively. The plurality of dichroic filters (31) are elements of the dichroic filter column (4).
    Type: Application
    Filed: August 4, 2009
    Publication date: August 18, 2011
    Applicants: SHARP KABUSHIKI KAISHA, TOHOKU UNIVERSITY
    Inventors: Tatsuo Uchida, Yoshito Suzuki, Tohru Kawakami, Takahiro Ishinabe, Baku Katagiri, Yoshihiro Hashimoto, Shoichi Ishihara, Shuichi Kozaki, Yutaka Ishii
  • Patent number: 7991487
    Abstract: For a plurality of combinations of a plurality of operating states included in an operating range of an engine and for a plurality of combinations of a plurality of objective variables, a system, which calculates design variables, includes a calculating device for obtaining global optimal solutions of the design variables that minimize or maximize a sum of the plurality of objective variables, which respectively correspond to the plurality of combinations of the plurality of operating states; a receiving device for receiving designation of an upper limit or a lower limit of the plurality of objective variables; and a searching device for searching for global optimal solutions that result in the smoothest change in the design variables when changing the operating states in a range of the received upper limit to the received lower limit of the objective variables, with one of the global optimal solutions as an initial value set.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: August 2, 2011
    Assignees: Ono Sokki Co., Ltd., The Doshisha
    Inventors: Yoshihiro Hashimoto, Yuichiro Sampei, Tomoyuki Hiroyasu
  • Publication number: 20110169500
    Abstract: Provided is a test apparatus that tests a device under test, comprising a power supply that generates power supplied to the device under test; a transmission path that transmits the power generated by the power supply to the device under test; an intermediate capacitor that is provided between the transmission path and a ground potential; a charge/discharge current measuring section that measures charge/discharge current of the intermediate capacitor; and a load current calculating section that calculates a load current flowing through the device under test, based on the current measured by the charge/discharge current measuring section.
    Type: Application
    Filed: September 3, 2010
    Publication date: July 14, 2011
    Applicant: ADVANTEST CORPORATION
    Inventor: Yoshihiro HASHIMOTO
  • Patent number: 7952361
    Abstract: Provided is a test apparatus that tests a device under test, including a power supply that generates supply power supplied to the device under test; a transmission path that transmits the supply power generated by the power supply to the device under test; a high-capacitance capacitor that is provided between the transmission path and a ground potential; a low-capacitance capacitor that has a lower capacitance than the high-capacitance capacitor and that is provided between the transmission path and the ground potential at a position closer to the device under test than the high-capacitance capacitor is to the device under test; an intermediate capacitor that is provided between the transmission path and the ground potential at a position between the high-capacitance capacitor and the low-capacitance capacitor; and a current measuring section that measures current flowing through the transmission path between the intermediate capacitor and the low-capacitance capacitor.
    Type: Grant
    Filed: July 14, 2009
    Date of Patent: May 31, 2011
    Assignee: Advantest Corporation
    Inventor: Yoshihiro Hashimoto
  • Publication number: 20110058130
    Abstract: A liquid crystal display device of the present invention is one in which unevenness of display, spots generated due to lowering of voltage retention because of impurity ions are sufficiently eliminated and reliability of long-time/long-term use is improved. A liquid crystal display device of the present invention is one comprising a first substrate and a second substrate configured via a liquid crystal layer and a seal, wherein at least one of the first substrate and the second substrate comprises, towards the liquid crystal layer, a color filter layer, a transparent electrode and an alignment layer in this order and at least one of the transparent electrode and the alignment layer covers the color filter layer in a non-display region.
    Type: Application
    Filed: November 11, 2010
    Publication date: March 10, 2011
    Inventors: Yoshihiro Hashimoto, Hidehiko Yamaguchi, Takashi Iwamoto, Takayuki Hayano, Naoshi Yamada, Toshihide Tsubata
  • Patent number: 7899338
    Abstract: A method and device for adequately controlling the DC bias of each of the optical modulating sections of an optical modulator even while the optical modulator is operating in normal mode and even with a simple structure.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: March 1, 2011
    Assignee: Sumitomo Osaka Cement Co., Ltd.
    Inventors: Yoshihiro Hashimoto, Junichiro Ichikawa, Kaoru Higuma, Takahisa Fujita
  • Publication number: 20110031984
    Abstract: Provided is a test apparatus that tests a device under test, comprising a power supply that generates power supplied to the device under test; a transmission path that transmits the power generated by the power supply to the device under test; a current measuring section that measures a digital waveform of load current supplied to the device under test via the transmission path, the digital waveform including a frequency component higher than a frequency corresponding to a product of an inductance component of the power supply and a capacitance component between the transmission path and a ground potential; and a judging section that judges acceptability of the device under test based on the digital waveform of the load current measured by the current measuring section.
    Type: Application
    Filed: September 7, 2010
    Publication date: February 10, 2011
    Applicant: ADVANTEST CORPORATION
    Inventors: Yoshihiro HASHIMOTO, Yasuo FURUKAWA
  • Publication number: 20110018559
    Abstract: Provided is a test apparatus that tests a device under test, comprising a power supply that generates supply power supplied to the device under test; a transmission path that transmits the supply power generated by the power supply to the device under test; an intermediate capacitor that is provided between the transmission path and a ground potential; a power supply current measuring section that measures a current flowing through the transmission path at a position closer to the power supply than the intermediate capacitor; a charge and discharge current measuring section that measures a charge and discharge current of the intermediate capacitor; and a load current calculating section that calculates a load current flowing through the device under test based on a sum of the current measured by the power supply current measuring section and the current measured by the charge and discharge current measuring section.
    Type: Application
    Filed: October 21, 2009
    Publication date: January 27, 2011
    Applicant: ADVANTEST CORPORATION
    Inventor: Yoshihiro HASHIMOTO
  • Publication number: 20110018549
    Abstract: Provided is a test apparatus that tests a device under test, comprising a power supply that generates power supplied to the device under test; a transmission path that transmits the power generated by the power supply to the device under test; a current measuring section that measures a peak in current supplied to the device under test via the transmission path, the peak including a frequency component higher than a frequency corresponding to a product of an inductance component from the power supply to the device under test and a capacitance component between the transmission path and a ground potential; and a judging section that judges acceptability of the device under test based on the peak measured by the current measuring section.
    Type: Application
    Filed: September 3, 2010
    Publication date: January 27, 2011
    Applicant: ADVANTEST CORPORATION
    Inventor: Yoshihiro HASHIMOTO
  • Publication number: 20110012622
    Abstract: Provided is a test apparatus that tests a device under test, comprising a power supply that generates supply power supplied to the device under test; a transmission path that transmits the supply power generated by the power supply to the device under test; a high-capacitance capacitor that is provided between the transmission path and a ground potential; a low-capacitance capacitor that has a lower capacitance than the high-capacitance capacitor and that is provided between the transmission path and the ground potential at a position closer to the device under test than the high-capacitance capacitor is to the device under test; an intermediate capacitor that is provided between the transmission path and the ground potential at a position between the high-capacitance capacitor and the low-capacitance capacitor; and a current measuring section that measures current flowing through the transmission path between the intermediate capacitor and the low-capacitance capacitor.
    Type: Application
    Filed: July 14, 2009
    Publication date: January 20, 2011
    Applicant: ADVANTEST CORPORATION
    Inventor: YOSHIHIRO HASHIMOTO
  • Patent number: 7869668
    Abstract: A method for generating a carrier residual signal and its device, in which a heterodyne optical signal used in a photometric field or an optical fiber radio communication field can be stably generated with a simplified structure. The device includes an optical modulating unit that includes a light source generating a light wave having a specific wavelength, and an SSB optical modulator. A light wave emitted from the light source enters into the optical modulating unit. A light wave emitted from the optical modulating unit includes a carrier component related to a zero-order Bessel function and a specific signal component related to a specific high-order Bessel function while suppressing signal components other than the specific signal component related to the specific high-order Bessel function, and a ratio of optical intensity between the carrier component and the specific signal component is set substantially to 1.
    Type: Grant
    Filed: March 22, 2004
    Date of Patent: January 11, 2011
    Assignees: Sumitomo Osaka Cement Co., Ltd., National Institute of Information and Communications Technology
    Inventors: Yoshihiro Hashimoto, Kaoru Higuma, Junichiro Ichikawa, Shingo Mori, Yozo Shoji, Hiroyo Ogawa
  • Patent number: 7860584
    Abstract: A method, computer, and recording medium storing a program are provided which, based on local optimal solutions, more efficiently calculate an optimal global optimal solution in a global operating area. System calculates the global optimal solution by solving, using a genetic algorithm based on the local optimal solutions and the initial values, an equation, which should be satisfied by the plurality of design variables, by obtaining the plurality of combinations of design variables composing local optimal solutions for each design variable respectively calculated for each of a plurality of combinations of a plurality of operating states, and by obtaining initial values for the plurality of combinations of design variables used for calculating the global optimal solution.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: December 28, 2010
    Assignees: ONO Sokki Co., Ltd., The Doshisha
    Inventors: Yoshihiro Hashimoto, Yuichiro Sampei, Tomoyuki Hiroyasu
  • Publication number: 20100305921
    Abstract: A response surface model is created without a drawback of creating a linear model that does not approximate to samples belonging to a partitioned region. Provided are: an input unit 1 that inputs samples composed of factor values and a response value; a sample placement unit 21 that places the samples in spaces, the samples being input by way of the input unit 1; a linear modeling unit 230 that creates the linear model for each region, based on coordinate values of the samples belonging to the region; a region partition unit 22 that partitions the linear model, based on the samples belonging to the region; a partition region determination unit 221 that determines whether it is possible to partition the region, based on the samples belonging to the region to be partitioned; and a modeling unit 23 that creates a response surface model by placing each linear model in the spaces when the partition region determination unit 221 has determined that partition is impossible in all the regions.
    Type: Application
    Filed: May 28, 2010
    Publication date: December 2, 2010
    Applicant: ONO SOKKI CO., LTD.
    Inventors: Yoshihiro Hashimoto, Masami Omori, Michio Murase
  • Patent number: 7825666
    Abstract: There is provided a test apparatus for testing a device under test, which includes a voltage supplying section that supplies a voltage to the device under test through a wire, a first capacitor that is arranged between the wire and a common potential in series, a current detecting section that detects a current flowing through the wire at a location closer to the device under test than the first capacitor is, an integrating section that outputs an integration value obtained by integrating a difference between the current detected by the current detecting section and a predetermined reference current, and a judging section that judges whether the device under test is a pass or a failure based on the integration value.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: November 2, 2010
    Assignee: Advantest Corporation
    Inventor: Yoshihiro Hashimoto
  • Patent number: 7804293
    Abstract: Provided is a power supply apparatus including a low pass filter that receives an output voltage of a current output section and allows a low frequency component with a frequency lower than a preset cutoff frequency to pass through; an excess voltage restricting load section that consumes an excess voltage restricting current, which is at least a portion of the output current from the current output section, when a load is turned on; and an excess voltage restricting control section that keeps the excess voltage restricting load section turned off when the output voltage of the current output section is less than an upper reference voltage, which is obtained by adding together a voltage output by the low pass filter and a preset upper offset voltage.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: September 28, 2010
    Assignee: Advantest Corporation
    Inventor: Yoshihiro Hashimoto
  • Patent number: 7751724
    Abstract: An optical modulator is provided which includes: an optical splitting part that splits an input light wave into two light waves; two optical waveguides that propagate the two light waves into which the input light wave is split, respectively; a first SSB modulating part that is provided in one of the two optical waveguides and modulates a light wave, which propagates into the first SSB modulating part, with a carrier frequency so that the light wave is converted into a different light wave having a single side band; a second SSB modulating part that is provided in the other of the two optical waveguides and modulates a light wave, which propagates into the second SSB modulating part, with a data signal in order to generate a signal light wave having a different single side band; and an optical combining part that combines the light wave modulated by the first SSB modulating part with the signal light wave generated by the second SSB modulating part.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: July 6, 2010
    Assignee: Sumitomo Osaka Cement Co., Ltd.
    Inventors: Yoshihiro Hashimoto, Shingo Mori, Norikazu Miyazaki, Kaoru Higuma, Toshio Sakane
  • Publication number: 20100154299
    Abstract: An object of the present invention is to provide seeds coated with an antagonistic microorganism, which have high-level disease control effects and high preservation stability. The present invention makes it possible to drastically elevate the survival percentage of an antagonistic microorganism in seeds coated with the antagonistic microorganism by vacuum inoculating seeds with the antagonistic microorganism, drying seeds inoculated with the antagonistic microorganism under low-temperature, low-humidity conditions, or a combination of these methods.
    Type: Application
    Filed: September 15, 2006
    Publication date: June 24, 2010
    Inventors: Takeshi Kobayashi, Yoshihiro Hashimoto, Kenji Takebayashi, Masataka Aino
  • Patent number: 7697846
    Abstract: In a radio optical fusion communication system with the integration of an optical fiber transmission path and a radio propagation path, wherein by first and second light sources, an intermediate-frequency signal generating means for generating a modulating signal at an intermediate frequency band, a modulator for modulating an optical signal from the first light source into an SSB modulated optical signal using the intermediate-frequency signal, and an optical mixer for mixing the modulated optical signal with the optical signal from the second light source to obtain an optical transmission signal in a base station, the frequency of either of the optical signals is controlled such that the difference in frequency between the optical signals is a desired frequency of a modulated radio signal, thus switching the frequency channel of the modulated radio signal in the radio propagation path.
    Type: Grant
    Filed: February 21, 2005
    Date of Patent: April 13, 2010
    Assignees: National Institute of Information and Communications Technology, Incorporated Administrative Agency, Sumitomo Osaka Cement Co., Ltd.
    Inventors: Yozo Shoji, Hiroyo Ogawa, Yoshihiro Hashimoto
  • Publication number: 20090289609
    Abstract: Provided is a power supply apparatus including a low pass filter that receives an output voltage of a current output section and allows a low frequency component with a frequency lower than a preset cutoff frequency to pass through; an excess voltage restricting load section that consumes an excess voltage restricting current, which is at least a portion of the output current from the current output section, when a load is turned on; and an excess voltage restricting control section that keeps the excess voltage restricting load section turned off when the output voltage of the current output section is less than an upper reference voltage, which is obtained by adding together a voltage output by the low pass filter and a preset upper offset voltage.
    Type: Application
    Filed: November 10, 2008
    Publication date: November 26, 2009
    Applicant: ADVANTEST CORPORATION
    Inventor: YOSHIHIRO HASHIMOTO