Patents by Inventor Yoshihiro Hashimoto

Yoshihiro Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060071682
    Abstract: A current measuring apparatus for measuring a power supply current received by an electronic device includes: a first current supplying unit for outputting a first current which is a part of the power supply current; a smoothing capacitor for smoothing the first current output by the first current supplying unit connected with one end thereof; a capacitor of device side for smoothing the power supply current, electrostatic capacity of the capacitor of device side being smaller than that of the smoothing capacitor and one end of the capacitor of device side being connected with the electronic device; a switch for making the first current flow from the smoothing capacitor to the capacitor of device side in case of being ON; a second current supplying unit for outputting a second current smaller than the first current to the capacitor of device side via a path parallel to the switch; and a power supply current acquiring unit for acquiring the power supply current on the basis of the second current output by the
    Type: Application
    Filed: February 18, 2005
    Publication date: April 6, 2006
    Applicant: Advantest Corporation
    Inventor: Yoshihiro Hashimoto
  • Patent number: 7009758
    Abstract: The present invention intends to control DC drift phenomenon in a light control element having ridge structure, and to provide a light control element with high drive stability in a large area. The present invention has character that, in a light control element being equipped with a base plate that has an electrooptic effect, an optical guide and an electrode for modulation that are formed on said base plate, which has ridge structure, an anti-DC drift layer is installed on the surface of the above mentioned base plate where the optical guide is formed, and annealing treatment is performed after ridge processing.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: March 7, 2006
    Assignee: Sumitomo Osaka Cement Co., Ltd.
    Inventors: Junichiro Ichikawa, Futoshi Yamamoto, Takashi Shinriki, Yoshihiro Hashimoto
  • Patent number: 7005867
    Abstract: A power supply circuit is provided that supplies a voltage to a load. The power supply circuit includes a power supply for generating a predetermined voltage; an electrical path for electrically connecting the power supply and the load to each other; a current draw unit for drawing a current from the electrical path; and a current control unit for controlling the current drawn by the current draw unit from the electrical path.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: February 28, 2006
    Assignee: Advantest Corporation
    Inventor: Yoshihiro Hashimoto
  • Publication number: 20060038578
    Abstract: There is provided a semiconductor testing apparatus comprising a current measuring portion which converts a load current quantity at the time of application of a relatively high test voltage to a DUT to fall within a low-voltage range, and then subjects the low-voltage range to quantization conversion with a predetermined measurement resolution even when the relatively high test voltage is applied to the DUT.
    Type: Application
    Filed: June 12, 2003
    Publication date: February 23, 2006
    Inventor: Yoshihiro Hashimoto
  • Patent number: 6975978
    Abstract: A test pattern sequence is generated (101), then a logic simulation of the operation of an IC under test in the case of applying each test pattern of the test pattern sequence, and a logic signal value sequence occurring in each signal line of the IC under test (102). The logic signal value sequence in each signal line is used to register in a fault list parts (a logic gate, signal line or signal propagation path) in which a fault (a delay fault or an open fault) detectable by a transient power supply current testing using the test pattern sequence is likely to occur (103).
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: December 13, 2005
    Assignee: Advantest Corporation
    Inventors: Masahiro Ishida, Takahiro Yamaguchi, Yoshihiro Hashimoto
  • Publication number: 20050264810
    Abstract: A particle monitoring device includes a light source for emitting a measurement light; and a light projecting/receiving unit, connected to a depressurized vessel of a processing apparatus, for projecting the emitted measurement light into the depressurized vessel and receiving a scattered light from a particle floating in the depressurized vessel. The light projecting/receiving unit is disposed such that the scattered light is received substantially parallel to the measurement light. The particle monitoring device further includes a received light intensity detection unit. The received light intensity detection unit has a received light intensity detection unit for determining whether or not the detected intensity is greater than a predetermined value and an instruction unit for instructing the processing apparatus to start, continue or stop a processing operation of the processing apparatus depending on the determined result.
    Type: Application
    Filed: March 18, 2005
    Publication date: December 1, 2005
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Susumu Saito, Yoshihiro Hashimoto
  • Publication number: 20050206829
    Abstract: A liquid crystal display device of the present invention is one in which unevenness of display, spots generated due to lowering of voltage retention because of impurity ions are sufficiently eliminated and reliability of long-time/long-term use is improved. A liquid crystal display device of the present invention is one comprising a first substrate and a second substrate configured via a liquid crystal layer and a seal, wherein at least one of the first substrate and the second substrate comprises, towards the liquid crystal layer, a color filter layer, a transparent electrode and an alignment layer in this order and at least one of the transparent electrode and the alignment layer covers the color filter layer in a non-display region.
    Type: Application
    Filed: March 11, 2005
    Publication date: September 22, 2005
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Yoshihiro Hashimoto, Hidehiko Yamaguchi, Takashi Iwamoto, Takayuki Hayano, Naoshi Yamada, Toshihide Tsubata
  • Publication number: 20050209801
    Abstract: A testing device that tests an electronic device includes a detection-voltage outputting unit operable to output a current detection voltage based on a power source current that the electronic device receives from a power source, a transmission line operable to transmit the current detection voltage, a detection amplifier operable to output an amplifier output voltage based on the current detection voltage received through the transmission line, a switching unit operable to select whether the current detection voltage is supplied to the detection amplifier, an integrator operable to output an integral value that is obtained by integrating values based on the amplifier output voltage, and a decision unit operable to decide whether the electronic device is good or bad based on the integral value.
    Type: Application
    Filed: May 17, 2005
    Publication date: September 22, 2005
    Applicant: Advantest Corporation
    Inventor: Yoshihiro Hashimoto
  • Publication number: 20050157970
    Abstract: A first branched optical waveguide and a second branched optical waveguide, to constitute a Mach-Zehnder type optical waveguide, are formed at the surface of a substrate. A first ground electrode, a signal electrode and a second ground electrode are provided on a buffer layer formed on the substrate. The second ground electrode is partially cut away and divided, to form a ditch therein, so that the modulating electrode composed of the signal electrode, the first and the second ground electrodes are substantially symmetrized on the center line between the first and the second optical waveguides. Then, the ratio (d2/d1) of the distance d2 between the signal electrode and the second branched optical waveguide to the distance d1 between the signal electrode and the first electrode is set within 3.5-7.5.
    Type: Application
    Filed: February 28, 2005
    Publication date: July 21, 2005
    Applicant: SUMITOMO OSAKA CEMENT CO., LTD.
    Inventors: Tohru Sugamata, Yoshihiro Hashimoto
  • Publication number: 20050099703
    Abstract: An optical component comprises an optical transmission element (e.g., an optical lens) whose circumferential wall partially joins a metal holder via a joining material (e.g., a low melting point glass), wherein stress is normally applied to the optical transmission element in a compression direction when joining the metal holder. The optical transmission element is inserted into a through hole of the metal holder, and the joining material is kept in a bank actualized by a tapered portion formed in proximity to one end of the through hole of the metal holder. This prevents tensile stress from being applied to the optical transmission element; thus, it is possible to avoid the occurrence of cracks and separations in the optical transmission element; and it is possible to avoid the occurrence of errors in optical characteristics, regardless of variations of the environmental temperature, so that, the optical component is improved in reliability.
    Type: Application
    Filed: September 16, 2004
    Publication date: May 12, 2005
    Inventors: Yoshihiro Hashimoto, Ken Matsuoka, Shinichi Takagi, Katsunori Suzuki, Tetsutsugu Hamano
  • Publication number: 20040252365
    Abstract: The present invention intends to control DC drift phenomenon in a light control element having ridge structure, and to provide a light control element with high drive stability in a large area. The present invention has character that, in a light control element being equipped with a base plate that has an electrooptic effect, an optical guide and an electrode for modulation that are formed on said base plate, which has ridge structure, an anti-DC drift layer is installed on the surface of the above mentioned base plate where the optical guide is formed, and annealing treatment is performed after ridge processing.
    Type: Application
    Filed: March 25, 2004
    Publication date: December 16, 2004
    Applicant: SUMITOMO OSAKA CEMENT CO., Ltd.
    Inventors: Junichiro Ichikawa, Futoshi Yamamoto, Takashi Shinriki, Yoshihiro Hashimoto
  • Patent number: 6828815
    Abstract: A fault analysis method and apparatus which is able to improve the reliability of fault analysis of semiconductor integrated circuit. In case of supplying a test pattern sequence having a plurality of test patterns to the semiconductor IC, an analysis point whose electric potential changes according to the change of supplied test pattern is placed corresponding to the test pattern sequence. Then, a transient power supply current generated on the semiconductor IC according to the change of the test pattern is measured and determined whether the measured transient power supply current is abnormal or not. A defection point is presumed based on the test pattern sequence where the transient power supply current is abnormal, and the analysis point placed corresponding to the test pattern sequence.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: December 7, 2004
    Assignee: Advantest Corporation
    Inventors: Masahiro Ishida, Takahiro Yamaguchi, Yoshihiro Hashimoto
  • Patent number: 6801049
    Abstract: A fault analysis method and apparatus which is able to improve the reliability of fault analysis of semiconductor integrated circuit. In case of supplying a test pattern sequence having a plurality of test patterns to the semiconductor IC, an analysis point whose electric potential changes according to the change of supplied test pattern is placed corresponding to the test pattern sequence. Then, a transient power supply current generated on the semiconductor IC according to the change of the test pattern is measured and determined whether the measured transient power supply current is abnormal or not. A defection point is presumed based on the test pattern sequence where the transient power supply current is abnormal, and the analysis point placed corresponding to the test pattern sequence.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: October 5, 2004
    Assignee: Advantest Corporation
    Inventors: Masahiro Ishida, Takahiro Yamaguchi, Yoshihiro Hashimoto
  • Patent number: 6781364
    Abstract: A testing apparatus for testing an electron device, has a first supply unit that supplies a first current to the electron device; a first feedback circuit which feeds back voltage applied to the electron device to the, first supply unit; a first switch which switches to whether or not connect electrically the electron device to the first feedback circuit; a second supply unit that supplies a second current to the electron device, the second supply unit being separated from the electron device by the first switch.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: August 24, 2004
    Assignee: Advantest Corporation
    Inventors: Yoshitaka Kawasaki, Yoshihiro Hashimoto, Hironori Tanaka
  • Publication number: 20040163023
    Abstract: A fault analysis method and apparatus which is able to improve the reliability of fault analysis of semiconductor integrated circuit. In case of supplying a test pattern sequence having a plurality of test patterns to the semiconductor IC, an analysis point whose electric potential changes according to the change of supplied test pattern is placed corresponding to the test pattern sequence. Then, a transient power supply current generated on the semiconductor IC according to the change of the test pattern is measured and determined whether the measured transient power supply current is abnormal or not. A defection point is presumed based on the test pattern sequence where the transient power supply current is abnormal, and the analysis point placed corresponding to the test pattern sequence.
    Type: Application
    Filed: February 17, 2004
    Publication date: August 19, 2004
    Inventors: Masahiro Ishida, Takahiro Yamaguchi, Yoshihiro Hashimoto
  • Publication number: 20040160240
    Abstract: A fault analysis method and apparatus which is able to improve the reliability of fault analysis of semiconductor integrated circuit. In case of supplying a test pattern sequence having a plurality of test patterns to the semiconductor IC, an analysis point whose electric potential changes according to the change of supplied test pattern is placed corresponding to the test pattern sequence. Then, a transient power supply current generated on the semiconductor IC according to the change of the test pattern is measured and determined whether the measured transient power supply current is abnormal or not. A defection point is presumed based on the test pattern sequence where the transient power supply current is abnormal, and the analysis point placed corresponding to the test pattern sequence.
    Type: Application
    Filed: February 17, 2004
    Publication date: August 19, 2004
    Inventors: Masahiro Ishida, Takahiro Yamaguchi, Yoshihiro Hashimoto
  • Patent number: 6756774
    Abstract: A constant voltage source includes a constant voltage supplying circuit including an operational amplifier for supplying an output voltage to a load and a feedback circuit for feeding back the output voltage to the operational amplifier; a first inductance unit disposed between the constant voltage supplying circuit and the load; and a first bypass capacitor of which one terminal is coupled between the first inductance unit and the load and the other terminal is coupled to a constant voltage unit.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: June 29, 2004
    Assignee: Advantest Corporation
    Inventor: Yoshihiro Hashimoto
  • Publication number: 20040113601
    Abstract: A power supply circuit is provided that supplies a voltage to a load. The power supply circuit includes a power supply for generating a predetermined voltage; an electrical path for electrically connecting the power supply and the load to each other; a current draw unit for drawing a current from the electrical path; and a current control unit for controlling the current drawn by the current draw unit from the electrical path.
    Type: Application
    Filed: December 5, 2003
    Publication date: June 17, 2004
    Inventor: Yoshihiro Hashimoto
  • Patent number: 6593765
    Abstract: A testing apparatus is able to test a semiconductor integrated circuit with high observability. The testing apparatus includes a test pattern inputting means 14 for inputting a test pattern for activating a path under test of a semiconductor integrated circuit 20 to the semiconductor integrated circuit, a transient power supply current measuring means 16 for measuring transient power supply current supplied to the semiconductor integrated circuit while the path under test is being activated, and a fault detecting means 34 for judging absence and presence of a fault of the path under test, based on transient power supply current measured by the transient power supply current measuring means.
    Type: Grant
    Filed: September 15, 2000
    Date of Patent: July 15, 2003
    Assignee: Advantest, Corp.
    Inventors: Masahiro Ishida, Takahiro Yamaguchi, Yoshihiro Hashimoto
  • Publication number: 20030107395
    Abstract: A testing apparatus for testing an electron device, has a first supply unit that supplies a first current to the electron device; a first feedback circuit which feeds back voltage applied to the electron device to the, first supply unit; a first switch which switches to whether or not connect electrically the electron device to the first feedback circuit; a second supply unit that supplies a second current to the electron device, the second supply unit being separated from the electron device by the first switch.
    Type: Application
    Filed: January 10, 2003
    Publication date: June 12, 2003
    Inventors: Yoshitaka Kawasaki, Yoshihiro Hashimoto, Hironori Tanaka