Abstract: A ceiling panel to be fixed to a ceiling base, the ceiling base having a long shape extending in a first direction and being provided in parallel spaced in a second direction orthogonal to the first direction. The ceiling panel includes a panel body in a shape of a rectangular flat plate, a magnet provided on a back face side of both end portions of the panel body in the second direction and being attracted to an attracted portion of the ceiling base, a hooked portion provided for a first end portion of the panel body in the first direction, and a hooking portion provided for a second end portion of the panel body in the first direction, the hooking portion hooking on a hooked portion of an adjacent ceiling panel to be provided in the first direction.

Abstract: A method for producing an L-amino acid such as L-glutamic acid is provided. An L-amino acid is produced by culturing in a culture medium a bacterium belonging to the family Enterobacteriaceae and having an L-amino acid-producing ability, and collecting the L-amino acid from the culture medium and/or cells of the bacterium, wherein the bacterium has been modified to have one or more of the following modifications: (A) modification of reducing the activity of a BudA protein; (B) modification of reducing the activity of a BudB protein; (C) modification of reducing the activity of a BudC protein; (D) modification of reducing the activity of a PAJ_3461 protein; (E) modification of reducing the activity of a PAJ_3462 protein; and (F) modification of reducing the activity of a PAJ_3463 protein.

Abstract: A control device includes a first control substrate and a second control substrate each of which includes a processor, a first communication interface, and a second communication interface, the first control substrate and the second control substrate being connected to each other via the first communication interfaces, in which the processor of the first control substrate or the processor of the second control substrate is configured to perform data communication via the second communication interfaces in a case where connection via the second communication interfaces is detected after an error of the data communication performed by the first communication interfaces is detected.

Abstract: A control device includes a first control substrate including a processor and a communication interface; and a second control substrate including a processor and a communication interface. The first control substrate and the second control substrate are connected through the communication interfaces. When occurrence of an error in data communication through the communication interfaces is detected, at least one of the processor of the first control substrate and the processor of the second control substrate performs the data communication using unused signal lines among signal lines provided in the communication interfaces.

Abstract: Provided is an insulating film for electronic components which can attain a good matte feeling and has excellent visibility of a marker. The insulating film for electronic components is an insulating film for electronic components having a front surface and a back surface, in which a maximum peak height Rp (?m) and the maximum valley depth Rv (?m) of the front surface satisfy the following relational expressions: 0.5?Rv/Rp?2 and 1?Rp+Rv?4. It is also an insulating film for electronic components, in which the 85° gloss Gs (85°) and the 60° gloss Gs (60°) of the front surface satisfy the following relational expression: Gs (85°)?2Gs (60°); and Gs (85°) is 70 or more and Gs (60°) is 30 or less.

Abstract: A display device includes: a liquid crystal panel which is integrated with a touch panel by bonding to the rear face of the touch panel; a panel which is provided behind the liquid crystal panel, and to which the touch panel is attached; a bracket which is provided between the panel and a holder that is provided behind the panel; a post which projects from the rear face of the liquid crystal panel in the rear direction; a through-hole which is formed in the panel in such a way as to allow the post to pass through the through-hole, and which has a hole diameter that is larger than the outer diameter of the post; and a through-hole which is formed in the bracket in such a way as to allow a screw fastened to the post, to pass through the through-hole, and which has a hole diameter that is larger than the screw diameter of the screw and smaller than the outer diameter of the post.

Abstract: A display device includes: a liquid crystal panel which is integrated with a touch panel by bonding to the rear face of the touch panel; a panel which is provided behind the liquid crystal panel, and to which the touch panel is attached; a bracket which is provided between the panel and a holder that is provided behind the panel; a post which projects from the rear face of the liquid crystal panel in the rear direction; a through-hole which is formed in the panel in such a way as to allow the post to pass through the through-hole, and which has a hole diameter that is larger than the outer diameter of the post; and a through-hole which is formed in the bracket in such a way as to allow a screw fastened to the post, to pass through the through-hole; and which has a hole diameter that is larger than the screw diameter of the screw and smaller than the outer diameter of the post.

Abstract: A manufacturing method of a semiconductor device includes preparing a wiring substrate including a first surface, a plurality of first terminals formed on the first surface, and a second surface opposite to the first surface, arranging a first adhesive on the first surface of the wiring substrate, and after the arranging of the first adhesive, mounting a first semiconductor chip, which includes a first front surface, a plurality of first front electrodes formed on the first front surface, a first rear surface opposite to the first front surface, a plurality of first rear electrodes formed on the first rear surface, and a plurality of through electrodes electrically connecting the plurality of first front electrodes to the plurality of first rear electrodes, on the first surface of the wiring substrate via the first adhesive.

Abstract: In a semiconductor device according to an embodiment, a second semiconductor chip is mounted on a first rear surface of a first semiconductor chip. Also, the first rear surface of the first semiconductor chip includes a first region in which a plurality of first rear electrodes electrically connected to the second semiconductor chip via a protrusion electrode are formed and a second region which is located on a peripheral side relative to the first region and in which a first metal pattern is formed. In addition, a protrusion height of the first metal pattern with respect to the first rear surface is smaller than a protrusion height of each of the plurality of first rear electrodes with respect to the first rear surface.

Abstract: A manufacturing method of a semiconductor device includes preparing a wiring substrate including a first surface, a plurality of first terminals formed on the first surface, and a second surface opposite to the first surface, arranging a first adhesive on the first surface of the wiring substrate, and after the arranging of the first adhesive, mounting a first semiconductor chip, which includes a first front surface, a plurality of first front electrodes formed on the first front surface, a first rear surface opposite to the first front surface, a plurality of first rear electrodes formed on the first rear surface, and a plurality of through electrodes electrically connecting the plurality of first front electrodes to the plurality of first rear electrodes, on the first surface of the wiring substrate via the first adhesive.

Abstract: A method for manufacturing a semiconductor device includes the steps of mounting a Si interposer over a printed wiring substrate, plasma-cleaning an upper surface of the Si interposer, disposing an NCF over the upper surface of the Si interposer, and mounting a semiconductor chip over the upper surface of the Si interposer through the NCF. Also, the method includes the step of electrically coupling each of plural electrodes of a second substrate and each of plural electrode pads of the semiconductor chip with each other through plural bump electrodes by reflow, and the surface of the Si interposer is plasma-cleaned before attaching the NCF to the Si interposer.

Abstract: A method includes: a first step of designing the semiconductor device by using CAD and outputting design CAD data; a second step of correcting the design CAD data to correspond to a matching trial object of the semiconductor device and outputting corrected CAD data; a third step of manufacturing the semiconductor device based on the design CAD data; a fourth step of capturing a tomographic image of the manufactured semiconductor device; a fifth step of comparing a shape and a dimension of a unit included in the semiconductor device between the tomographic image and the corrected CAD data; and a sixth step of determining that the matching trial object is failed when a difference therebetween as a result of the comparison in the fifth step is equal to or larger than a predetermined amount.

Abstract: In a semiconductor device according to an embodiment, a second semiconductor chip is mounted on a first rear surface of a first semiconductor chip. Also, the first rear surface of the first semiconductor chip includes a first region in which a plurality of first rear electrodes electrically connected to the second semiconductor chip via a protrusion electrode are formed and a second region which is located on a peripheral side relative to the first region and in which a first metal pattern is formed. In addition, a protrusion height of the first metal pattern with respect to the first rear surface is smaller than a protrusion height of each of the plurality of first rear electrodes with respect to the first rear surface.

Abstract: A method for manufacturing a semiconductor device includes the steps of mounting a Si interposer over a printed wiring substrate, plasma-cleaning an upper surface of the Si interposer, disposing an NCF over the upper surface of the Si interposer, and mounting a semiconductor chip over the upper surface of the Si interposer through the NCF. Also, the method includes the step of electrically coupling each of plural electrodes of a second substrate and each of plural electrode pads of the semiconductor chip with each other through plural bump electrodes by reflow, and the surface of the Si interposer is plasma-cleaned before attaching the NCF to the Si interposer.

Abstract: The reliability of a semiconductor device is improved. A probe mark is formed on a probe region of a pad covered with a protective insulating film. And, a pillar-shaped electrode has a first portion formed on an opening region and a second portion that is extended over the probe region from the upper portion of the opening region. At this time, a center position of the opening region is shifted from a center position of the pillar-shaped electrode that is opposed to a bonding finger.

Abstract: The reliability of a semiconductor device is improved. A probe mark is formed on a probe region of a pad covered with a protective insulating film. And, a pillar-shaped electrode has a first portion formed on an opening region and a second portion that is extended over the probe region from the upper portion of the opening region. At this time, a center position of the opening region is shifted from a center position of the pillar-shaped electrode that is opposed to a bonding finger.

Abstract: A semiconductor chip and a wiring board are coupled to each other through conductor posts. The centers of conductor posts situated above openings at the outermost periphery shift from the centers of the openings in a direction away from the center of the semiconductor chip. When a region where each of the conductor posts and an insulating layer are overlapped with each other is designated as an overlapped region, the width of the overlapped region more on the inner side than the opening is smaller than the width of the overlapped region more on the outer side than the opening. Thus, while stress applied to the conductor posts is relaxed, coupling reliability between the semiconductor chip and the wiring board is retained.

Abstract: A method of manufacturing a semiconductor device obtained by laminating a first semiconductor chip and a second semiconductor chip with different planar sizes when seen in a plan view on a wiring board via an adhesive material, in which the second semiconductor chip with a relatively larger planar size is mounted on the first semiconductor chip with a relatively smaller planar size. Also, after the first and second semiconductor chips are mounted, the first and second semiconductor chips are sealed with resin. Here, before sealing with the resin, a gap between the second semiconductor chip and the wiring board is previously sealed with the adhesive material used when the first and second semiconductor chips are mounted.

Abstract: To provide a semiconductor device having improved reliability. A semiconductor chip is conveyed onto a chip mounting region of a wiring board by means of a bonding jig to electrically couple the semiconductor chip and the wiring board to each other. The bonding jig for mounting the semiconductor chip on the wiring board is equipped with a retention portion for adsorbing and retaining a logic chip, a pressing portion for pressing against the back surface of the semiconductor chip, and a sealing portion to be firmly attached to the peripheral edge portion of the back surface of the semiconductor chip. The surface of the sealing portion to be firmly attached to the back surface of the semiconductor chip is made of a resin.

Abstract: To improve reliability of a semiconductor device. In a conductive material that electrically couples a Cu pillar electrode and a lead, an alloy part comprised of an alloy of tin and copper is formed inside this conductive material. At this time, the alloy part contacts both the Cu pillar electrode and the lead, and the Cu pillar electrode and the lead are bound through the alloy part. Similarly, also in FIG. 8, it is found that the Cu pillar electrode and the lead are electrically coupled to each other by the alloy part. Thereby, it is possible to improve electric coupling reliability between the Cu pillar electrode and the lead.