Patents by Inventor Yoshiki Inoue

Yoshiki Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10490694
    Abstract: A method of manufacturing a plurality of light emitting elements, the method includes: providing a semiconductor wafer; dividing the p-side nitride semiconductor layer into a plurality of demarcated element regions; forming a protective layer on regions including an outer periphery of an upper surface of the p-side nitride semiconductor layer of each of the plurality of demarcated element regions and exposed side surfaces in the semiconductor structure that are formed by the selectively removing the portion of the p-side nitride semiconductor layer; reducing a resistance of regions of the p-side nitride semiconductor layer; and dividing the semiconductor wafer into a plurality of light emitting elements.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: November 26, 2019
    Assignee: NICHIA CORPORATION
    Inventors: Kazuhiro Nagamine, Yoshiki Inoue, Susumu Toko, Junya Narita
  • Patent number: 10468556
    Abstract: Provided are a light emitting element and a light emitting device with improved light emission intensity distribution. A light emitting element includes a light-transmissive substrate, an n-type semiconductor layer, a first p-type semiconductor layer, a first p-side electrode, a first n-side electrode, a second p-type semiconductor layer, a second p-side electrode, and a second n-side electrode. A light emitting device includes the light emitting element, and an external connection electrode provided at the light emitting element on a side opposite to the light-transmissive substrate. The external connection electrode includes an n-side external connection electrode connected to the first n-side electrode and the second n-side electrode, a first p-side external connection electrode connected to the first p-side electrode, and a second p-side external connection electrode connected to the second p-side electrode.
    Type: Grant
    Filed: August 9, 2018
    Date of Patent: November 5, 2019
    Assignee: NICHIA CORPORATION
    Inventors: Keiji Emura, Yoshiki Inoue, Hiroaki Kageyama
  • Publication number: 20190259916
    Abstract: A light emitting device includes a light-transmissive member including a first surface, a second surface opposite to the first surface, and third surfaces connected to the first surface and the second surface. A phosphor layer faces the second surface of the light-transmissive member. A reflective member faces side surfaces of the phosphor layer and the third surfaces of the light-transmissive member. The light-emitting element has a top surface facing the phosphor layer, a bottom surface opposite to the top surface, and side surfaces connecting the top surface and the bottom surface. The phosphor layer has a bonding surface facing the light emitting element. A first dielectric multilayer film is arranged on at least one of side surfaces of the light-emitting element without being provided on the bonding surface of the phosphor layer.
    Type: Application
    Filed: February 20, 2019
    Publication date: August 22, 2019
    Applicant: NICHIA CORPORATION
    Inventors: Daisuke IWAKURA, Yoshiki INOUE
  • Publication number: 20180351043
    Abstract: Provided are a light emitting element and a light emitting device with improved light emission intensity distribution. A light emitting element includes a light-transmissive substrate, an n-type semiconductor layer, a first p-type semiconductor layer, a first p-side electrode, a first n-side electrode, a second p-type semiconductor layer, a second p-side electrode, and a second n-side electrode. A light emitting device includes the light emitting element, and an external connection electrode provided at the light emitting element on a side opposite to the light-transmissive substrate. The external connection electrode includes an n-side external connection electrode connected to the first n-side electrode and the second n-side electrode, a first p-side external connection electrode connected to the first p-side electrode, and a second p-side external connection electrode connected to the second p-side electrode.
    Type: Application
    Filed: August 9, 2018
    Publication date: December 6, 2018
    Applicant: Nichia Corporation
    Inventors: Keiji EMURA, Yoshiki INOUE, Hiroaki KAGEYAMA
  • Patent number: 10115877
    Abstract: A method for manufacturing a semiconductor device includes: providing a support with a semiconductor light-emitting element including a first electrode and a second electrode; providing a base including a first interconnect terminal and a second interconnect terminal; forming a first metal layer on the support to cover the first and the second electrodes; forming a second metal layer on the base to cover the first and the second interconnect terminals; arranging the first and second electrodes and the first and second interconnect terminals to respectively face each other, and providing electrical connection therebetween by atomic diffusion; and rendering electrically insulative or removing portions of the first metal layer and the second metal layer that are outside thereof defined between the first and second electrodes and the first and second interconnect terminals.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: October 30, 2018
    Assignee: NICHIA CORPORATION
    Inventors: Masatsugu Ichikawa, Yoshiki Inoue, Yoshiyuki Aihara, Takehito Shimatsu
  • Publication number: 20180287009
    Abstract: A method of manufacturing a plurality of light emitting elements, the method includes: providing a semiconductor wafer; dividing the p-side nitride semiconductor layer into a plurality of demarcated element regions; forming a protective layer on regions including an outer periphery of an upper surface of the p-side nitride semiconductor layer of each of the plurality of demarcated element regions and exposed side surfaces in the semiconductor structure that are formed by the selectively removing the portion of the p-side nitride semiconductor layer; reducing a resistance of regions of the p-side nitride semiconductor layer; and dividing the semiconductor wafer into a plurality of light emitting elements.
    Type: Application
    Filed: March 30, 2018
    Publication date: October 4, 2018
    Applicant: NICHIA CORPORATION
    Inventors: Kazuhiro NAGAMINE, Yoshiki INOUE, Susumu TOKO, Junya NARITA
  • Patent number: 10074775
    Abstract: Provided are a light emitting element and a light emitting device with improved light emission intensity distribution. A light emitting element includes a light-transmissive substrate, an n-type semiconductor layer, a first p-type semiconductor layer, a first p-side electrode, a first n-side electrode, a second p-type semiconductor layer, a second p-side electrode, and a second n-side electrode. A light emitting device includes the light emitting element, and an external connection electrode provided at the light emitting element on a side opposite to the light-transmissive substrate. The external connection electrode includes an n-side external connection electrode connected to the first n-side electrode and the second n-side electrode, a first p-side external connection electrode connected to the first p-side electrode, and a second p-side external connection electrode connected to the second p-side electrode.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: September 11, 2018
    Assignee: NICHIA CORPORATION
    Inventors: Keiji Emura, Yoshiki Inoue, Hiroaki Kageyama
  • Publication number: 20180175238
    Abstract: A method for manufacturing a plurality of light emitting elements includes: providing a semiconductor wafer comprising: a substrate, an n-side nitride semiconductor layer containing an n-type impurity and located on the substrate, and a p-side nitride semiconductor layer containing a p-type impurity and located on the n-side nitride semiconductor layer; forming a protective layer on an upper face of the p-side nitride semiconductor layer in regions that include borders of areas to become the plurality of light emitting elements; reducing a resistance of the p-side nitride semiconductor in areas where no protective layer has been formed by annealing the semiconductor wafer; irradiating a laser beam on the substrate so as to form modified regions in the substrate; and obtaining a plurality of light emitting elements by dividing the semiconductor wafer in which the modified regions have been formed in the substrate.
    Type: Application
    Filed: December 14, 2017
    Publication date: June 21, 2018
    Applicant: NICHIA CORPORATION
    Inventors: Shun KITAHAMA, Yoshiki INOUE, Kazuhiro NAGAMINE, Junya NARITA
  • Patent number: 9929316
    Abstract: A light emitting element includes a substrate; a plurality of semiconductor light emitting cells; a plurality of light reflective electrodes; a first insulation layer that continuously covers lateral surfaces of the semiconductor light emitting cells, spaces between the semiconductor light emitting cells, lateral surfaces of the light reflective electrodes, and a portion of upper surfaces of the light reflective electrodes; a plurality of wiring electrodes, and cover the lateral surfaces of the semiconductor light emitting cells and the spaces between the semiconductor light emitting cells via the first insulation layer; and a light reflective metal layer that covers the lateral surfaces of at least two adjacent ones of the semiconductor light emitting cells and the space between said at least two semiconductor light emitting cells, via the first insulation layer.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: March 27, 2018
    Assignee: NICHIA CORPORATION
    Inventors: Keiji Emura, Yoshiki Inoue, Takamasa Sunda
  • Patent number: 9780261
    Abstract: A light-emitting element includes a light transmissive substrate; a first semiconductor stacked body including: a first n-side semiconductor layer, and a first p-side semiconductor layer, the first p-side semiconductor layer having a hole formed therein; a first p-electrode; a first n-electrode having a portion above the first p-electrode, and a portion extending into the hole, the first n-electrode being electrically connected to the first n-side semiconductor layer through the hole; a second semiconductor stacked body including: a second n-side semiconductor layer located around a periphery of the first semiconductor stacked body, and a second p-side semiconductor layer located above the second n-side semiconductor layer and located outside of an inner edge portion of the second n-side semiconductor layer; a second p-electrode; and a second n-electrode having a portion above the second p-electrode, and being electrically connected to the inner edge portion of the second n-side semiconductor layer.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: October 3, 2017
    Assignee: NICHIA CORPORATION
    Inventors: Keiji Emura, Yoshiki Inoue, Hiroaki Kageyama
  • Publication number: 20170279018
    Abstract: A method for manufacturing a semiconductor device includes: providing a support with a semiconductor light-emitting element including a first electrode and a second electrode; providing a base including a first interconnect terminal and a second interconnect terminal; forming a first metal layer on the support to cover the first and the second electrodes; forming a second metal layer on the base to cover the first and the second interconnect terminals; arranging the first and second electrodes and the first and second interconnect terminals to respectively face each other, and providing electrical connection therebetween by atomic diffusion; and rendering electrically insulative or removing portions of the first metal layer and the second metal layer that are outside thereof defined between the first and second electrodes and the first and second interconnect terminals.
    Type: Application
    Filed: March 22, 2017
    Publication date: September 28, 2017
    Applicant: NICHIA CORPORATION
    Inventors: Masatsugu ICHIKAWA, Yoshiki INOUE, Yoshiyuki AIHARA, Takehito SHIMATSU
  • Patent number: 9711685
    Abstract: A sapphire substrate provided with a plurality of projections on a principal surface on which a nitride semiconductor is grown to form a nitride semiconductor light emitting element. The projections have a substantially triangular pyramidal-shape the projections having a plurality of side surfaces and a pointed top. The side surfaces have an inclination angle of between 53° and 59° from a bottom of the projections. The side surfaces are crystal-growth-suppressed surfaces on which a growth of the nitride semiconductor is suppressed relative to a portion of the principal surface located between adjacent projections. A bottom of the projections has a substantially triangular shape having three outwardly curved arc-shaped sides, and each of the side surfaces has a substantially triangular shape having vertexes located at the top of the projection and at both ends of a respective side of the bottom of the projection.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: July 18, 2017
    Assignee: NICHIA CORPORATION
    Inventors: Naoya Sako, Takashi Ohara, Yoshiki Inoue, Yuki Shibutani, Yoshihito Kawauchi, Kazuyuki Takeichi, Yasunori Nagahama
  • Publication number: 20170186915
    Abstract: A light emitting element includes a substrate; a plurality of semiconductor light emitting cells; a plurality of light reflective electrodes; a first insulation layer that continuously covers lateral surfaces of the semiconductor light emitting cells, spaces between the semiconductor light emitting cells, lateral surfaces of the light reflective electrodes, and a portion of upper surfaces of the light reflective electrodes; a plurality of wiring electrodes, and cover the lateral surfaces of the semiconductor light emitting cells and the spaces between the semiconductor light emitting cells via the first insulation layer; and a light reflective metal layer that covers the lateral surfaces of at least two adjacent ones of the semiconductor light emitting cells and the space between said at least two semiconductor light emitting cells, via the first insulation layer.
    Type: Application
    Filed: December 22, 2016
    Publication date: June 29, 2017
    Applicant: NICHIA CORPORATION
    Inventors: Keiji EMURA, Yoshiki INOUE, Takamasa SUNDA
  • Publication number: 20170084787
    Abstract: A light-emitting element includes a light transmissive substrate; a first semiconductor stacked body including: a first n-side semiconductor layer, and a first p-side semiconductor layer, the first p-side semiconductor layer having a hole formed therein; a first p-electrode; a first n-electrode having a portion above the first p-electrode, and a portion extending into the hole, the first n-electrode being electrically connected to the first n-side semiconductor layer through the hole; a second semiconductor stacked body including: a second n-side semiconductor layer located around a periphery of the first semiconductor stacked body, and a second p-side semiconductor layer located above the second n-side semiconductor layer and located outside of an inner edge portion of the second n-side semiconductor layer; a second p-electrode; and a second n-electrode having a portion above the second p-electrode, and being electrically connected to the inner edge portion of the second n-side semiconductor layer.
    Type: Application
    Filed: September 16, 2016
    Publication date: March 23, 2017
    Applicant: NICHIA CORPORATION
    Inventors: Keiji EMURA, Yoshiki INOUE, Hiroaki KAGEYAMA
  • Publication number: 20170018694
    Abstract: Provided are a light emitting element and a light emitting device with improved light emission intensity distribution. A light emitting element includes a light-transmissive substrate, an n-type semiconductor layer, a first p-type semiconductor layer, a first p-side electrode, a first n-side electrode, a second p-type semiconductor layer, a second p-side electrode, and a second n-side electrode. A light emitting device includes the light emitting element, and an external connection electrode provided at the light emitting element on a side opposite to the light-transmissive substrate. The external connection electrode includes an n-side external connection electrode connected to the first n-side electrode and the second n-side electrode, a first p-side external connection electrode connected to the first p-side electrode, and a second p-side external connection electrode connected to the second p-side electrode.
    Type: Application
    Filed: July 14, 2016
    Publication date: January 19, 2017
    Applicant: NICHIA CORPORATION
    Inventors: Keiji EMURA, Yoshiki INOUE, Hiroaki KAGEYAMA
  • Patent number: 9525103
    Abstract: The sapphire substrate has a principal surface for growing a nitride semiconductor to form a nitride semiconductor light emitting device and comprising a plurality of projections of the principal surface, wherein an outer periphery of a bottom surface of each of the projections has at least one depression. This depression is in the horizontal direction. The plurality of projections are arranged so that a straight line passes through the inside of at least any one of projections when the straight line is drawn at any position in any direction in a plane including the bottom surfaces of the plurality of projections.
    Type: Grant
    Filed: June 9, 2015
    Date of Patent: December 20, 2016
    Assignee: NICHIA CORPORATION
    Inventors: Junya Narita, Takuya Okada, Yohei Wakai, Yoshiki Inoue, Naoya Sako, Katsuyoshi Kadan
  • Publication number: 20160300982
    Abstract: A sapphire substrate provided with a plurality of projections on a principal surface on which a nitride semiconductor is grown to form a nitride semiconductor light emitting element. The projections have a substantially triangular pyramidal-shape the projections having a plurality of side surfaces and a pointed top. The side surfaces have an inclination angle of between 53° and 59° from a bottom of the projections. The side surfaces are crystal-growth-suppressed surfaces on which a growth of the nitride semiconductor is suppressed relative to a portion of the principal surface located between adjacent projections. A bottom of the projections has a substantially triangular shape having three outwardly curved arc-shaped sides, and each of the side surfaces has a substantially triangular shape having vertexes located at the top of the projection and at both ends of a respective side of the bottom of the projection.
    Type: Application
    Filed: April 11, 2016
    Publication date: October 13, 2016
    Applicant: NICHIA CORPORATION
    Inventors: Naoya SAKO, Takashi OHARA, Yoshiki INOUE, Yuki SHIBUTANI, Yoshihito KAWAUCHI, Kazuyuki TAKEICHI, Yasunori NAGAHAMA
  • Publication number: 20160172631
    Abstract: A light extraction film of the present invention relates to a light extraction film for EL elements, which enables a surface light emitting body to have a sufficiently improved luminance in the normal direction, while being sufficiently suppressed in emission angle dependence of the wavelength of light emitted therefrom. More specifically, the present invention relates to a light extraction film (10) which is laminated on a substrate of an EL element, and which has a recessed and projected structure (13) on the surface. The materials that constitute this light extraction film (10) contain a resin (X) that has at least one skelton selected from among a fluorene skeleton, a biphenyl skeleton and a naphthalene skelton.
    Type: Application
    Filed: May 20, 2014
    Publication date: June 16, 2016
    Applicant: MITSUBISHI RAYON CO., LTD.
    Inventors: Naoko Yamada, Yusuke Kurita, Yoshiki Inoue
  • Patent number: 9337390
    Abstract: A method for manufacturing a sapphire substrate in which a plurality of projections are formed on a C-plane of the sapphire substrate by etching, includes: forming a patterned etching mask on the C-plane of the sapphire substrate; etching the sapphire substrate until the projections are formed, wherein each of the projections formed by the etching has a substantially triangular pyramidal-shape and has a plurality of side surfaces, a pointed top and a bottom, wherein the bottom of each of the projections has a substantially triangular shape having three outwardly curved arc-shaped sides. The projections are arranged on vertexes of a triangular lattice, and an orientation of the bottom of the projections conforms with an orientation that is rotated by about 30 degrees from an orientation of a triangle of the triangular lattice; and removing the etching mask from the sapphire substrate.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: May 10, 2016
    Assignee: NICHIA CORPORATION
    Inventors: Naoya Sako, Takashi Ohara, Yoshiki Inoue, Yuki Shibutani, Yoshihito Kawauchi, Kazuyuki Takeichi, Yasunori Nagahama
  • Publication number: 20150270443
    Abstract: The sapphire substrate has a principal surface for growing a nitride semiconductor to form a nitride semiconductor light emitting device and comprising a plurality of projections of the principal surface, wherein an outer periphery of a bottom surface of each of the projections has at least one depression. This depression is in the horizontal direction. The plurality of projections are arranged so that a straight line passes through the inside of at least any one of projections when the straight line is drawn at any position in any direction in a plane including the bottom surfaces of the plurality of projections.
    Type: Application
    Filed: June 9, 2015
    Publication date: September 24, 2015
    Applicant: NICHIA CORPORATION
    Inventors: Junya NARITA, Takuya OKADA, Yohei WAKAI, Yoshiki INOUE, Naoya SAKO, Katsuyoshi KADAN