Abstract: An imaging device, a method of capturing an image, and a program product used to capture a plurality of images, reduce the captured images, transfer second image data correspondent to each of the reduced images, display first images and identify a second image correspondent to the first image, which is instructed by a user.

Abstract: An engine supercharging device includes are a supercharger (38) for pressurizing air introduced in an engine (E), an air cleaner (36) for purifying an ambient air, a purified air supply passage (56) for supplying a purified air (CA) from the air cleaner (36) towards the supercharger (38), a supercharged air passage (62) for supplying the supercharged air (SA) from the supercharger (38) towards an air intake passage (60) of the engine (E), and a relief valve (68) for adjusting an air pressure within the supercharged air passage (62). The relief valve (68) has a discharge port portion (68b) which is accommodated within the air cleaner (36). The engine (E) has a plurality of engine cylinders, and a downstream portion of the supercharged air passage (62) is defined by an intake air chamber (54) for supplying the sucked air to respective air intake passages (60) of the plural engine cylinders.

Abstract: An imaging apparatus includes a solid-state image sensor that has a plurality of pixels arranged in a two-dimensional matrix form and outputs pixel signals according to subject light incident on each of the plurality of pixels in at least two or more drive modes, a first processing unit that performs, on the pixel signals output by the solid-state image sensor according to any one drive mode, the equal process to a first process performed when the solid-state image sensor outputs the pixel signals according to another drive mode and a pixel signal selection unit that selects any one of the pixel signals that are subject to the equal process to the first process performed by the first processing unit or the pixel signals that are subject to the first process performed by the solid-state image sensor according to the latter drive mode.

Abstract: For pixel signals of a plurality of pixels arranged in a first pixel area arranged in a two dimensional matrix form, a size of the first pixel area is converted to output first image data, and for pixel signals of pixels arranged in a second pixel area smaller than the first pixel area, a size of the second pixel area is converted to output second image data, wherein an operating mode is changed in response to the size of the second pixel area.

Abstract: A data processing apparatus includes a data conversion unit for converting a plurality of sequentially input data into transfer data and sequentially transferring the transfer data, arranging the input data in each conversion unit using one transfer data as one transfer unit and a prescribed number of transfer units as one conversion unit, and the data conversion unit includes a first bit division unit for dividing the input data into first and second divided data, a bit comparison unit for comparing first divided data of an n-th time (n is a natural number equal to or more than 1) and an (n+1)-th time, a bit determination unit for determining whether the first divided data is to be inverted based on the determination result to output inversion information, a first bit inversion unit for outputting data selected based on the inversion information, and a first bit coupling unit.

Abstract: A silicon compound gas, an oxidizing gas, and a rare gas are supplied into a chamber (2) of a plasma processing apparatus (1). A microwave is supplied into the chamber (2), and a silicon oxide film is formed on a target substrate with plasma generated by the microwave. A partial pressure ratio of the rare gas is 10% or more of a total gas pressure of the silicon compound gas, the oxidizing gas, and the rare gas, and an effective flow ratio of the silicon compound gas and the oxidizing gas (oxidizing gas/silicon compound gas) is not less than 3 but not more than 11.

Abstract: A data-processing device includes a plurality of data generation units, a plurality of bit change number calculation units, a bit change number comparison unit, a first data selection unit, and a bit-coupling unit. The data generation unit arranges input data to generate first conversion data based on each prescribed arranging method. The bit change number calculation unit compares values of respective bits in the first conversion data output at the n-th time and the (n+1)-th time by the corresponding data generation unit, and calculates a bit number based on the comparison result as a bit change number. The bit change number comparison unit compares values of the respective bit change numbers, selects the data generation unit, and outputs selection information. The first data selection unit outputs any one first conversion data selected based on the selection information as selection data. Then, the bit-coupling unit couples the selection information.

Abstract: An image pickup device may include an image capturing unit that includes a solid-state image pickup device having a plurality of pixels arrayed in a matrix form and simultaneously outputting pixel signals of the plurality of pixels adjacent to each other in a row or column direction in sequence while sequentially shifting the pixels that output the pixel signals in the row direction, and that simultaneously outputs image capturing signals respectively corresponding to the simultaneously output pixel signals in sequence from corresponding output terminals, an image processing unit to which the image capturing signals respectively corresponding to the plurality of pixels adjacent to each other in the row or column direction of the pixels arrayed in the solid-state image pickup device are simultaneously input in sequence from corresponding input terminals, and which performs image processing on the input image capturing signals, and a signal transmitting unit.

Abstract: An image pickup device may include an image capturing unit that includes a solid-state image pickup device having a plurality of pixels arrayed in a matrix form, the image capturing unit sequentially outputting a plurality of image capturing signals each of which corresponds to one of a plurality of pixel signals output from the solid-state image pickup device, and an evaluation value generating unit to which the plurality of image capturing signals output from the image capturing unit are sequentially input, the evaluation value generating unit generating an evaluation value based on the input image capturing signals. The evaluation value generating unit may include a horizontal decimation unit, a vertical decimation unit, a vertical evaluation value generating unit, and a horizontal evaluation value generating unit.

Abstract: An image processing apparatus includes image processors and a margin storing buffer. The image processors read an input image data from a frame memory for each image data of a plurality of block lines each having a first number of pixels along the columns and a second number of pixels along the rows. The margin storing buffer stores the image data of the margin portion used also in the image processing of the image data of the next block line, among the image data of the present block line input to each of the image processors. Each of the image processors performs the image processing on an image data including the image data of the present block line and the image data of the margin portion, at the time of image processing on the image data of the next block line.

Abstract: An imaging apparatus includes an imaging element, a transfer unit, a storage unit, a signal processing unit, a write control unit, a read control unit, and a clock generation unit. The imaging element outputs image signals. The transfer unit serially transfers the image signals by using transfer channels. The storage unit stores the image signals transferred. The signal processing unit processes the image signals stored. The write control unit controls the writing of the image signals to the storage unit, in synchronism with a first clock signal synchronous with the image signals. The read control unit controls the reading of the image signals from the storage unit, in synchronism with a second clock signal for driving the signal processing unit. The clock generation unit generates the second clock signal having a frequency that accords with an amount of data constituted by the image signals transferred.

Abstract: A bus monitoring device may include a measurement unit configured to measure a bandwidth of data on a common bus for a unit time, which is constant and predetermined, based on transfer information indicating a state of exchange of the data when a plurality of processing blocks connected to the common bus exchange the data via the common bus with a memory including an address space having a plurality of banks.

Abstract: A data processing apparatus includes a data conversion unit for converting a plurality of sequentially input data into transfer data and sequentially transferring the transfer data, arranging the input data in each conversion unit using one transfer data as one transfer unit and a prescribed number of transfer units as one conversion unit, and the data conversion unit includes a first bit division unit for dividing the input data into first and second divided data, a bit comparison unit for comparing first divided data of an n-th time (n is a natural number equal to or more than 1) and an (n+1)-th time, a bit determination unit for determining whether the first divided data is to be inverted based on the determination result to output inversion information, a first bit inversion unit for outputting data selected based on the inversion information, and a first bit coupling unit.

Abstract: A data-processing device includes a plurality of data generation units, a plurality of bit change number calculation units, a bit change number comparison unit, a first data selection unit, and a bit-coupling unit. The data generation unit arranges input data to generate first conversion data based on each prescribed arranging method. The bit change number calculation unit compares values of respective bits in the first conversion data output at the n-th time and the (n+1)-th time by the corresponding data generation unit, and calculates a bit number based on the comparison result as a bit change number. The bit change number comparison unit compares values of the respective bit change numbers, selects the data generation unit, and outputs selection information. The first data selection unit outputs any one first conversion data selected based on the selection information as selection data. Then, the bit-coupling unit couples the selection information.

Abstract: A data processing apparatus may include a data conversion unit for, when converting a plurality of sequentially input data into conversion data of the same bit number as a data bus having a prescribed bit number and sequentially transferring the conversion data, arranging the input data in each conversion unit using the conversion data as one transfer unit and a prescribed number of transfer units as one conversion unit. The data conversion unit may include a first data generation unit, a second data generation unit for generating second data obtained by allocating a prescribed second number of input data in the input data not allocated to the first data, to the second bit range and a data coupling unit for coupling the first data and the second data to generate the conversion data having the bit number of the bus width of the data bus.

Abstract: A data processing apparatus may include: a data conversion unit configured to designate one-transfer data as one transfer unit and designate a predetermined number of transfer units as one conversion unit when a plurality of input data sequentially input is converted into transfer data of which the number of bits is the same as that of a data bus having a predetermined number of bits, and the transfer data is sequentially transferred, and arrange the input data in the transfer data within the conversion unit. The data conversion unit may include: a data generation unit, a first data arrangement change unit, and a first data selection unit configured to sequentially select the changed data in which the position of the input data is changed by the first data arrangement change unit and output the selected changed data as the transfer data in the data conversion unit.

Abstract: A data processing apparatus may include a data conversion unit that arranges the input data in each transfer data in the conversion unit using one transfer data as one transfer unit and a predetermined number of transfer units as one conversion unit when converting a plurality of input data input sequentially into transfer data having a bit number identical to a predetermined bit number of a data bus and sequentially transferring the converted transfer data. The data conversion unit may include a data generation unit and a first data arrangement changing unit. The first data arrangement changing unit may include a bit change number calculating unit, a bit change number analysis unit, a first data sorting unit, and a data coupling unit.

Abstract: An image processing apparatus includes a distortion correction unit, a distortion correction range calculation unit, a control unit, a storage control unit, and a margin storage memory. The distortion correction unit performs a distortion correction processing on image data stored in a frame memory. The distortion correction range calculation unit calculates distortion correction ranges. The control unit determines an input image range from present distortion correction range and next distortion correction range. The storage control unit calculates a range for a part of the image data corresponding to the input image range from the present distortion correction range and the next distortion correction range. The margin storage memory stores the image data of the range calculated by the storage control unit. The image data input to the distortion correction unit includes both the image data from the frame memory and the image data from the margin storage memory.

Abstract: An engine supercharging device includes are a supercharger (38) for pressurizing air introduced in an engine (E), an air cleaner (36) for purifying an ambient air, a purified air supply passage (56) for supplying a purified air (CA) from the air cleaner (36) towards the supercharger (38), a supercharged air passage (62) for supplying the supercharged air (SA) from the supercharger (38) towards an air intake passage (60) of the engine (E), and a relief valve (68) for adjusting an air pressure within the supercharged air passage (62). The relief valve (68) has a discharge port portion (68b) which is accommodated within the air cleaner (36). The engine (E) has a plurality of engine cylinders, and a downstream portion of the supercharged air passage (62) is defined by an intake air chamber (54) for supplying the sucked air to respective air intake passages (60) of the plural engine cylinders.

Abstract: A supercharger drive device (1) for a combustion engine (E) includes a gear carrier shaft (6) operable to rotate in unison with a crankshaft (2) of the combustion engine (E), a high speed gear (8) and a low speed gear (10) provided in the gear carrier shaft (6), a drive shaft (14) of a supercharger (12) which is rotatable when coupled with either one of the high speed gear (8) and the low speed gear (10), a gear shifter (16) for selecting one of the high speed gear (8) and the low speed gear (10) for transmitting a motive force from the gear carrier shaft (6) to the drive shaft (14) through the selected one of the high and low speed gears (8) and (10), and a shifter drive unit (18) for actuating the gear shifter (16) in dependence on the rotational speed of the combustion engine (E).