Abstract: An apparatus comprising a fixed abrasive tool in which fine abrasive grains are uniformly dispersed and fixed, supply systems for processing liquids each containing an oxidizing agent, an organic acid, an inhibitor and purified water, and a sizing dresser capable of dressing the surface of the fixed abrasive tool at a constant size, and adapted to flow a processing liquid for polishing copper at a higher speed in the initial stage of processing, change the polishing liquid to another polishing liquid capable of polishing copper and barrier film substantially at an identical speed just before or just after the exposure of the barrier film and conduct conditioning during processing by driving the sizing dresser, the polishing method and the polishing apparatus enabling to decrease the cost in the existent CMP for planarization of copper wirings requiring two or more steps of CMP, as well as enabling to reduce dishing or erosion resulting in recesses for the wiring shape after planarization, which decrease the s

Abstract: A method for fabricating a semiconductor device includes grindstone surface activation treatment by means of a brush or ultrasonic wave carried out when a concave/convex pattern of a semiconductor wafer is planarized by polishing a semiconductor wafer held by a wafer holder by using a grindstone constituted of abrasive grains and material for holding the abrasive grains onto which the semiconductor wafer is pressed with relative motion. The semiconductor wafer is processed with high removal rate and the polishing thickness is controlled accurately.

Abstract: A processing method capable of presenting the processing condition with a high accuracy to improve the productivity, comprising a step of applying a first processing to a first substrate and a step of applying a second processing to the first substrate or the second processing to a second substrate and determining a correlation function for each of in-plane positions as the data for the difference in a plurality of processing steps to each of the in-plane positions in view of on the in-plain distribution data to the in-plane position of each of the substrate as a result of the plurality of processings, calculating the in-plain distribution characteristics of the substrate under a desired processing condition in view of the correlation function and processing the substrate based on the in-plain distribution characteristics.

Abstract: The invention provides a process apparatus including a wafer holder, and a process method, in which high planarization performance, scratch free process, narrow edge exclusion and high uniformity can be maintained for more than 10,000 processed wafers. The invention is achieved by providing a unit for keeping a retainer and surface of a polishing wheel non-contact with each other and controlling the gap within a certain range and by setting compression strength of the retainer at more than 3,000 kg/cm2.

Abstract: In a production process of a semiconductor device, planarizing of a wafer surface pattern can be performed to attain high planarity, good uniformity in the removal amount and improved controllability. This process include a step of planarizing a semiconductor wafer, from which at least two different films have been exposed, by polishing with a grindstone and a dispersant-containing processing liquid.

Abstract: To solve a problem of non-uniform polishing properties of a circumferential surface area of a substrate, so-called edge sagging phenomenon. When a thin film formed on a top surface of the substrate is polished while holding a back surface of the substrate, local stress at a circumferential end of the substrate is reduced by a guide installed so as to surround the substrate. Also, a deformation of the outer circumferential end portion of the substrate is reduced by a recessed groove provided on the guide. Since a thin film formed on the surface can be polished to be flat throughout the surface of the substrate without an occurrence of non-uniform polishing properties of the outer circumferential surface area of the substrate, so-called edge sagging phenomenon, a high-performance semiconductor device can be manufactured at a high yield and low costs.

Abstract: Disclosed is a fabricating system including a plurality of processing apparatuses connected to each other by means of an inter-apparatus transporter, wherein one group of semiconductor wafers are processed in processing apparatuses and other group of wafers are transported to specified processing apparatuses for a time interval from (To+T) to a time To; and another group of wafers are processed and the remaining group of wafers are transported for a time interval from (To+T) to (To+2T). Since processing apparatuses can receive at least one of works from the inter-apparatus transporter for a time interval T min, the distribution of works from the transporter to processing apparatuses is completed for the time interval T min. The transporter is emptied for each time interval T min, and works are unloaded to the emptied transporter, which makes easy the scheduling, control and management of the transporting of a plurality of works in the fabricating system.

Abstract: A robot control system is provided which controls a plurality of servomotors for moving a hand and articulated arms of a robot. The robot control system includes a plurality of position detectors, a motor control driver, and a serial communication path. The position detectors detect rotational positions of the servomotors and output the rotational positions in the form of serial data, respectively. The serial communication path is disposed between the motor control driver and the position detectors to transmit request signals provided by the motor control driver to the position detectors to request the position detectors to output the rotational positions.

Abstract: In order to manufacture a semiconductor device of high performance a small-sized transfer arm mechanism, capable of retaining a predetermined transfer stroke, is put to practical use without any increase in the height of the arm mechanism. The transfer arm includes arcuate portions having center axes different from each other, and restraint generating means for generating restraints in directions where the individual center axes are attracted. This way, a plurality of arms are joined by joints having a structure for transmitting rolling motions to the arcuate portions contacting each other to thereby control the drive shaft of the arcuate portions rotationally and thereby move the arms. This transfer arm mechanism is used in various environments including semiconductor manufacturing, such as DRAMs.

Abstract: A semiconductor device fabrication apparatus having multiple processing chambers for different processes, where a substrate is carried in and out in a sophisticated manner, with their different internal ambient conditions being retained, so that the substrate is free from contamination, thereby manufacturing high-quality semiconductor devices at high throughput. The apparatus includes a movable buffer chamber having a wafer carriage means within a transfer chamber which faces a process chamber, an evacuation means which evacuates of gas the buffer chamber, transfer chamber and process chamber independently, a gas feed means, and a control means.

Abstract: In order to manufacture a semiconductor device of high performance a small-sized transfer arm mechanism, capable of retaining a predetermined transfer stroke, is put to practical use without any increase in the height of the arm mechanism. The transfer arm includes arcuate portions having center axes different from each other, and restraint generating means for generating restraints in directions where the individual center axes are attracted. This way, a plurality of arms are joined by joints having a structure for transmitting rolling motions to the arcuate portions contacting each other to thereby control the drive shaft of the arcuate portions rotationally and thereby move the arms. This transfer arm mechanism is used in various environments including semiconductor manufacturing, such as DRAMs (dynamic random access memory).

Abstract: Disclosed is a fabricating system including a plurality of processing apparatuses connected to each other by means of an inter-apparatus transporter, wherein one group of semiconductor wafers are processed in processing apparatuses and other group of wafers are transported to specified processing apparatuses for a time interval from (To+T) to a time To; and another group of wafers are processed and the remaining group of wafers are transported for a time interval from (To+T) to (To+2T). Since processing apparatuses can receive at least one of works from the inter-apparatus transporter for a time interval T min, the distribution of works from the transporter to processing apparatuses is completed for the time interval T min. The transporter is emptied for each time interval T min, and works are unloaded to the emptied transporter, which makes easy the scheduling, control and management of the transporting of a plurality of works in the fabricating system.

Abstract: Disclosed is a fabricating system including a plurality of processing apparatuses connected to each other by means of an inter-apparatus transporter, wherein one group of semiconductor wafers are processed in processing apparatuses and other group of wafers are transported to specified processing apparatuses for a time interval from (To+T) to a time To; and another group of wafers are processed and the remaining group of wafers are transported for a time interval from (To+T) to (To+2T). Since processing apparatuses can receive at least one of works from the inter-apparatus transporter for a time interval T min, the distribution of works from the transporter to processing apparatuses is completed for the time interval T min. The transporter is emptied for each time interval T min, and works are unloaded to the emptied transporter, which makes easy the scheduling, control and management of the transporting of a plurality of works in the fabricating system.

Abstract: A motor control apparatus comprises a speed command signal generating section generating a speed command signal for accelerating or decelerating a control object in accordance with a predetermined pattern. A position control section controls the position of the control object and a speed control section controls the speed of the control object by accelerating or decelerating the control object in accordance with the speed pattern. An encoder observes the present position of the control object. The load inertia of the control object is identified based on a positional deviation between the command position of the control object and the present position obtainable from the encoder at the time the speed command generated from the speed command signal generating means becomes a predetermined speed.

Abstract: Process equipment and method for processing a semiconductor device comprising a buffer chamber, at least one process chamber connected to the buffer chamber through an opening portion, a holding/carrying unit disposed at a position facing the opening portion for holding and carrying a member to be processed such as a wafer, and a carrier unit disposed in the buffer chamber for transferring the member to be processed to and from the holding/carrying unit. The holding/carrying unit includes a flattened surface closely facing the opening portion for holding an atmosphere in the at least one process chamber independently from an atmosphere in the buffer chamber. The opening portion has a flattened surface closely facing the flattened surface of the holding/carrying unit.

Abstract: Disclosed is a method of polishing a thin film layer to be polished, which is formed on the surface of a substrate, by pressing the substrate on the surface of a polishing pad and relatively moving the substrate and the polishing pad, the method comprising the steps of: detecting the position of a front surface of the thin film layer to be polished using a first sensor and also detecting the position of a bottom surface of the thin film layer using a second sensor, on the way of the polishing; calculating the residual thickness of the thin film layer on the basis of the detected positions of the front and bottom surfaces of the thin film layer; and controlling the processing condition of the subsequent polishing on the basis of the calculated residual thickness of the thin film layer.

Abstract: A wafer transport method including the steps of preparing a semiconductor process equipment having a transport chamber, a process chamber, an interface means for connecting the transport chamber to the process chamber, and a transport means for transporting a semiconductor wafer from the transport chamber to the process chamber by way of the interface means; inserting the transport means mounting a substrate in a communicating corridor including a supply means and an exhaust means; and transporting the substrate while performing the supply and exhaust by sequentially controlling a supply shutoff means, an exhaust shutoff means, and a communicating shutoff means according to the position of a conductance part formed of a gap between the transport means and the communicating corridor.

Abstract: A wafer transport method includes the steps of preparing a semiconductor process equipment having a transport chamber and a process chamber. An interface means connects the transport chamber to the process chamber. A transport means transports a semiconductor wafer from the transport chamber to the process chamber by way of the interface means. The transport means mounting a substrate is inserted into a communicating corridor including a supply means and an exhaust means. The substrate is transported while performing the supply and exhaust by sequentially controlling a supply shutoff means, an exhaust shutoff means, and a communicating shutoff means according to the position of a conductance part formed of a gap between the transport means and the communicating corridor.

Abstract: In the information recording disk, the positioning signal of the information convertor is provided permanently, as a change in shape or material, to the front and reverse surfaces of the disk substrate and their eccentric distances from the center position is made to be smaller than half the repeating unit length of the positioning signal of the information convertor in the radial direction. The start position of the positioning signal in the circumferential direction is preferably made to be coincident on the front and reverse surfaces of the disk substrate within 10 .mu.m. The position reference for aligning the position in the radial direction or the position reference for aligning the rotation angle position in the circumferential direction is preferably disposed on the inner diameter portion or outer diameter portion of the disk substrate, respectively, and these position references can be accomplished by disposing at least one notch on the inner or outer peripheral edge portion of the disk substrate.

Abstract: Disclosed is a gas valve capable of switching gases to be introduced within a vacuum chamber with high speed thereby enhancing the controllability of the composion of a semiconducting thin film growing on a substrate and shortening the time required for growth of the thin film. The gas valve comprises a bendable film between a pair of parallel plate electrodes whereby operating the film by an electrostatic force and opening and closing a port for releasing gas to a substrate mounted on the wall surface of a gas chamber and a port for exhausting an unnecessary gas to an exhaust passage. The gas valve is mounted in the vicinity of the substrate within the vacuum chamber for supplying a working gas in a minimum amount required for the film growth.