Patents by Inventor Yoshio Ozawa
Yoshio Ozawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9368719Abstract: A nonvolatile memory device includes: a first conductive layer; a second conductive layer; a first resistance change layer provided between the first conductive layer and the second conductive layer and having an electrical resistance changing with at least one of an applied electric field and a passed current; and a first lateral layer provided on a lateral surface of the first resistance change layer and having an oxygen concentration higher than an oxygen concentration in the first resistance change layer.Type: GrantFiled: December 12, 2014Date of Patent: June 14, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Kensuke Takano, Yoshio Ozawa, Katsuyuki Sekine, Junichi Wada
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Patent number: 9362487Abstract: According to one embodiment, a ferroelectric memory includes a semiconductor layer, an interfacial insulating film formed on the semiconductor layer, a ferroelectric film formed on the interfacial insulating film, and a gate electrode formed on the ferroelectric film, wherein the ferroelectric film is a film which includes a metal that is hafnium (Hf) or zirconium (Zr) and oxygen as the main components and to which an element selected from the group consisting of silicon (Si), magnesium (Mg), aluminum (Al).Type: GrantFiled: September 6, 2013Date of Patent: June 7, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Seiji Inumiya, Yoshio Ozawa, Koji Yamakawa, Atsuko Sakata, Masayuki Tanaka, Junichi Wada
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Patent number: 9329509Abstract: An electrostatic latent image developing toner contains toner particles each including a toner core containing a binder resin, and a shell layer coating the surface of the tore core. The shell layer contains a unit derived from a monomer of a thermosetting resin, and a unit derived from a thermoplastic resin. The resin contained in the shell layer has a unit derived from one or more monomers of thermosetting resins selected from the group of amino resins consisting of a melamine resin, a urea resin, and a glyoxal resin.Type: GrantFiled: June 26, 2014Date of Patent: May 3, 2016Assignee: KYOCERA Document Solutions Inc.Inventors: Yoshio Ozawa, Naruo Yabe, Masami Tsujihiro, Ryotaro Komada
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Patent number: 9304426Abstract: The present disclosure relates to an electrostatic latent image developing toner containing a toner particle including a toner core containing a binder resin and a shell layer coating a surface of the toner core. The shell layer contains a unit derived from a monomer of a thermosetting resin, and a unit derived from a thermoplastic resin. The thermosetting resin is one or more resins selected from the group of amino resins consisting of a melamine resin, a urea resin, and a glyoxal resin. The toner particle contains fine particles in an interfacial portion between the toner core and the shell layer, and the fine particles have a charge property opposite to that of the toner, or have a volume resistivity lower than both a volume resistivity of the binder resin and a volume resistivity of the shell layer.Type: GrantFiled: June 26, 2014Date of Patent: April 5, 2016Assignee: KYOCERA Document Solutions Inc.Inventors: Yoshio Ozawa, Masami Tsujihiro, Toru Takatsuna, Ryotaro Komada
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Patent number: 9293563Abstract: According to one embodiment, a semiconductor memory device with memory cells each composed of a vertical transistor, comprises a silicon layer formed into a columnar shape on a silicon substrate, a gate insulating film part in which a tunnel insulating film, a charge storage layer, and a block insulating film are formed to surround the sidewall surface of the silicon layer, and a stacked structure part formed to surround the sidewall surface of the gate insulating film part and in which a plurality of interlayer insulating films and a plurality of control gate electrode layers are stacked alternately. The silicon layer, gate insulating film part, and control gate electrode layer constitute the vertical transistor. The charge storage layer has a region lower in trap level than a region facing the control gate electrode layer between the vertical transistors.Type: GrantFiled: June 25, 2014Date of Patent: March 22, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Tetsuya Kai, Yoshio Ozawa, Ryota Fujitsuka, Yoshitaka Tsunashima
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Publication number: 20160079262Abstract: According to one embodiment, a semiconductor memory device includes a conductive layer; a stacked body provided on the conductive layer and including a plurality of electrode layers separately stacked each other; a semiconductor body provided in the stacked body and extending in a stacking direction in the stacking body and including a lower end portion provided in the conductive layer; and a charge storage film provided between the semiconductor body and the plurality of electrode layers. As viewed in the stacking direction, a maximum width of the lower end portion is larger than a maximum width of the semiconductor body provided inside a bottom surface of the charge storage film.Type: ApplicationFiled: February 26, 2015Publication date: March 17, 2016Inventors: Shinji Mori, Yoshio Ozawa, Tetsuya Kai
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Patent number: 9219076Abstract: On a silicon substrate is formed a stacked body by alternately stacking a plurality of silicon oxide films and silicon films, a trench is formed in the stacked body, an alumina film, a silicon nitride film and a silicon oxide film are formed in this order on an inner surface of the trench, and a channel silicon crystalline film is formed on the silicon oxide film. Next, a silicon oxide layer is formed at an interface between the silicon oxide film and the channel silicon crystalline film by performing thermal treatment in an oxygen gas atmosphere.Type: GrantFiled: December 22, 2014Date of Patent: December 22, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventor: Yoshio Ozawa
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Patent number: 9182696Abstract: A magnetic toner for developing an electrostatic latent image of the present disclosure includes toner particles each having a toner core containing a binder resin and a magnetic powder, and a shell layer coating a surface of the toner core. The shell layer contains a unit derived from a monomer of a thermosetting resin and a unit derived from a thermoplastic resin. The thermosetting resin is one or more resins selected from the group of amino resins consisting of a melamine resin, a urea resin, and a glyoxal resin. The amount of iron eluted from the toner core (iron concentration in a filtrate) measured by a specified method is 10 mg/L or less.Type: GrantFiled: July 23, 2014Date of Patent: November 10, 2015Assignee: KYOCERA Document Solutions Inc.Inventors: Yoshio Ozawa, Toshiki Takemori, Masanori Sugahara, Hiroaki Moriyama, Masashi Tamagaki
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Patent number: 9158218Abstract: An electrostatic latent image developing toner includes toner base particles including a binder resin and an external additive attached to surfaces of the toner base particles. The external additive contains silica covered with a coating layer containing a nitrogen containing resin.Type: GrantFiled: October 24, 2013Date of Patent: October 13, 2015Assignee: KYOCERA Document Solutions Inc.Inventors: Masami Tsujihiro, Yoshio Ozawa
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Patent number: 9153779Abstract: According to one embodiment, a memory element includes: a first electrode layer; a second electrode layer; and a memory layer provided between the first electrode layer and the second electrode layer, and the memory layer including a plurality of first oxide layers in a second oxide layer, a resistivity of each of the plurality of first oxide layers being higher than a resistivity of the second oxide layer.Type: GrantFiled: September 10, 2013Date of Patent: October 6, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Tomotaka Ariga, Junichi Wada, Kouji Matsuo, Noritake Oomachi, Yoshio Ozawa
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Publication number: 20150263013Abstract: A non-volatile semiconductor memory device according to an embodiment includes a semiconductor substrate, a tunnel insulating film on the semiconductor substrate, a first electric charge storage layer on the tunnel insulating film, a first insulating layer on the first electric charge storage layer, a second electric charge storage layer on the first insulating layer and including a metal containing layer, a first metal diffusion suppressing layer on the second electric charge storage layer to suppress diffusion of metal contained in the second electric charge storage layer, a second insulating layer on the first metal diffusion suppressing layer, and a control electrode on the second insulating layer.Type: ApplicationFiled: February 9, 2015Publication date: September 17, 2015Inventors: Takashi FURUHASHI, Atsushi MURAKOSHI, Kenichiro TORATANI, Masayuki TANAKA, Yoshio OZAWA
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Publication number: 20150263277Abstract: A non-volatile semiconductor memory device according to an embodiment includes a plurality of first wiring lines that extend in a first direction, a plurality of second wiring lines that extend in a second direction intersecting the first direction to cross the first wiring lines, and memory cells, each of which is provided at a portion where the first wiring line crosses the second wiring line. The memory cell includes a variable resistance layer in the space between the wiring lines where the first wiring line crosses the second wiring line, a seam in the variable resistance layer extending in a direction between the first wiring layer and the second wiring layer, and a metal supply layer that comes in contact with the variable resistance layer and the seam.Type: ApplicationFiled: March 3, 2015Publication date: September 17, 2015Inventor: Yoshio OZAWA
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Publication number: 20150212440Abstract: A toner includes toner particles each including a core and a shell layer disposed over a surface thereof. The shell layers contain a unit derived from a thermoplastic resin and a unit derived from a monomer or prepolymer of a thermosetting resin. Young's moduli of the shell layers and the cores, as measured using an SPM while raising cantilever temperature thereof, satisfy conditions: X2/X1 is at least 2.0 and no greater than 5.0; and Y2/Y1 is at least 4.0 and no greater than 7.0. X1 denotes a proportion of change of the Young's modulus of the shell layers and X2 denotes a proportion of change of the Young's modulus of the cores from 30° C. to 50° C. Y1 denotes a proportion of change of the Young's modulus of the shell layers and Y2 denotes a proportion of change of the Young's modulus of the cores from 50° C. to 70° C.Type: ApplicationFiled: January 20, 2015Publication date: July 30, 2015Applicant: KYOCERA DOCUMENT SOLUTIONS INC.Inventors: Yoshio OZAWA, Noriaki SAKAMOTO, Kazuki TSUCHIHASHI
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Publication number: 20150205220Abstract: A toner includes a plurality of toner particles that each include a core and a shell layer disposed over a surface of the core. The shell layer contains a unit derived from a thermoplastic resin and a unit derived from a monomer or prepolymer of a thermosetting resin. A surface of each of the toner particles has a Young's modulus that changes by a proportion of no greater than 20% from 30° C. to 50° C., and changes by a proportion from 50° C. to 70° C. that when divided by the proportion of change from 30° C. to 50° C., yields a value of at least 3.0 and no greater than 10.0. The Young's modulus is measured in a state in which an external additive is not adhered to the toner particle using a scanning probe microscope while raising a cantilever temperature thereof.Type: ApplicationFiled: January 15, 2015Publication date: July 23, 2015Applicant: KYOCERA Document Solutions Inc.Inventors: Yoshio OZAWA, Noriaki SAKAMOTO, Ken MAETANI
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Publication number: 20150171318Abstract: A nonvolatile memory device includes: a first conductive layer; a second conductive layer; a first resistance change layer provided between the first conductive layer and the second conductive layer and having an electrical resistance changing with at least one of an applied electric field and a passed current; and a first lateral layer provided on a lateral surface of the first resistance change layer and having an oxygen concentration higher than an oxygen concentration in the first resistance change layerType: ApplicationFiled: December 12, 2014Publication date: June 18, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Kensuke Takano, Yoshio Ozawa, Katsuyuki Sekine, Junichi Wada
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Publication number: 20150137212Abstract: On a silicon substrate is formed a stacked body by alternately stacking a plurality of silicon oxide films and silicon films, a trench is formed in the stacked body, an alumina film, a silicon nitride film and a silicon oxide film are formed in this order on an inner surface of the trench, and a channel silicon crystalline film is formed on the silicon oxide film. Next, a silicon oxide layer is formed at an interface between the silicon oxide film and the channel silicon crystalline film by performing thermal treatment in an oxygen gas atmosphere.Type: ApplicationFiled: December 22, 2014Publication date: May 21, 2015Applicant: Kabushiki Kaisha ToshibaInventor: Yoshio OZAWA
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Patent number: 9029060Abstract: A carrier for electrostatic latent image developing is composed of carrier core containing a binder resin and magnetic material particles, and a shell layer that covers the carrier core. The binder has an acid value of at least a predetermined value, and contains a resin having a carboxyl group. The shell layer is composed of a resin selected from melamine resin and urea resin.Type: GrantFiled: September 25, 2013Date of Patent: May 12, 2015Assignee: KYOCERA Document Solutions Inc.Inventors: Masami Tujihiro, Yoshio Ozawa
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Patent number: 9006697Abstract: A resistance change element includes a first conductive layer, a second conductive layer, and a memory layer. The memory layer is provided between the first conductive layer and the second conductive layer. The memory layer is capable of reversibly transitioning between a first state and a second state due to at least one of a voltage and a current supplied via the first conductive layer and the second conductive layer. A resistance of the second state is higher than a resistance of the first state. The memory layer includes niobium oxide. One of a (100) plane, a (010) plane, and a (110) plane of the memory layer is oriented in a stacking direction from the first conductive layer toward the second conductive layer.Type: GrantFiled: February 28, 2013Date of Patent: April 14, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Noritake Oomachi, Junichi Wada, Kouji Matsuo, Tomotaka Ariga, Yoshio Ozawa
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Publication number: 20150037730Abstract: A liquid developer contains an electrically insulating liquid carrier and toner particles dispersed in the liquid carrier. Each toner particle includes a core and a shell layer that is formed on a surface of the core and contains a thermosetting resin.Type: ApplicationFiled: July 25, 2014Publication date: February 5, 2015Applicant: KYOCERA DOCUMENT SOLUTIONS INC.Inventors: Hidetoshi MIYAMOTO, Katsuki OSANISHI, Yoshio OZAWA
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Patent number: 8946021Abstract: On a silicon substrate is formed a stacked body by alternately stacking a plurality of silicon oxide films and silicon films, a trench is formed in the stacked body, an alumina film, a silicon nitride film and a silicon oxide film are formed in this order on an inner surface of the trench, and a channel silicon crystalline film is formed on the silicon oxide film. Next, a silicon oxide layer is formed at an interface between the silicon oxide film and the channel silicon crystalline film by performing thermal treatment in an oxygen gas atmosphere.Type: GrantFiled: August 15, 2014Date of Patent: February 3, 2015Assignee: Kabushiki Kaisha ToshibaInventor: Yoshio Ozawa