Patents by Inventor Yoshitaka Sugawara

Yoshitaka Sugawara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8003736
    Abstract: A silicon-containing compound of formula (1), and a curing composition containing a silicon-containing compound of formula (1) wherein Z is hydrogen, a silicon-containing compound of formula (1) wherein Z is C2-C4 alkenyl or alkynyl and a hydrosilylation catalyst. The composition has excellent handling and curing properties and provides a cured product with excellent heat resistance and flexibility. In formula (1), Ra-Rg=C1-C12 saturated aliphatic hydrocarbon group or C6-C12 aromatic hydrocarbon group. Re and Rf do not simultaneously represent C1-C12 saturated aliphatic hydrocarbon group; Y=C2-C4 alkylene; Z=hydrogen or C2-C4 alkenyl or alkynyl; K is 2-7; T is 1-7; P is 0-3; and M and N are numbers selected such that N:M=1:1 to 1:100, that all M's and N's total at least 15, and that the mass average molecular weight of the compound of formula (1) is 3,000 to 1,000,000.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: August 23, 2011
    Assignee: Adeka Corporation
    Inventors: Takashi Sueyoshi, Ken-ichiro Hiwatari, Tadashi Janado, Yoshikazu Shoji, Seiichi Saito, Yoshitaka Sugawara
  • Patent number: 7960257
    Abstract: With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle ? of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 ?m/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: June 14, 2011
    Assignees: The Kansai Electric Power Co., Inc., Central Research Institute of Electric Power Industry
    Inventors: Koji Nakayama, Yoshitaka Sugawara, Katsunori Asano, Hidekazu Tsuchida, Isaho Kamata, Toshiyuki Miyanagi, Tomonori Nakamura
  • Patent number: 7960737
    Abstract: With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle ? of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 ?m/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: June 14, 2011
    Assignees: The Kansai Electric Power Co., Inc., Central Research Institute of Electric Power Industry
    Inventors: Koji Nakayama, Yoshitaka Sugawara, Katsunori Asano, Hidekazu Tsuchida, Isaho Kamata, Toshiyuki Miyanagi, Tomonori Nakamura
  • Patent number: 7960738
    Abstract: With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle ? of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 ?m/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: June 14, 2011
    Assignees: The Kansai Electric Power Co., Inc., Central Research Institute of Electric Power Industry
    Inventors: Koji Nakayama, Yoshitaka Sugawara, Katsunori Asano, Hidekazu Tsuchida, Isaho Kamata, Toshiyuki Miyanagi, Tomonori Nakamura
  • Patent number: 7939614
    Abstract: A curable composition which comprises at least one of the following (A), (B), and (C) and further contains (D) (provided that when (C) is not contained, both (A) and (B) are in the composition. (A): A silicon-containing polymer in which the content of components having a weight-average molecular weight of 1,000 or lower is 20 wt. % or lower and which has a reactive group A? and one or more Si—O—Si bonds. (B): A silicon-containing polymer in which the content of components having a weight-average molecular weight of 1,000 or lower is 20 wt. % or lower and which has an Si—H group and one or more Si—O—Si bonds. (C): A silicon-containing polymer in which the content of components having a weight-average molecular weight of 1,000 or lower is 20 wt. % or lower and which has a reactive group A?, an Si—H group, and one or more Si—O—Si bonds. (D): A catalyst for curing reaction which is a platinum catalyst.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: May 10, 2011
    Assignees: Adeka Corporation, Kansai Electric Power Company, Inc.
    Inventors: Takashi Sueyoshi, Ken-Ichiro Hiwatari, Tadashi Janado, Yoshikazu Shoji, Yoshitaka Sugawara
  • Publication number: 20100258817
    Abstract: With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle ? of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 ?m/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.
    Type: Application
    Filed: June 21, 2010
    Publication date: October 14, 2010
    Applicants: The Kansai Electric Power Co., Inc., Central Research Institute of Electric Power Industry
    Inventors: Koji Nakayama, Yoshitaka Sugawara, Katsunori Asano, Hidekazu Tsuchida, Isaho Kamata, Toshiyuki Miyanagi, Tomonori Nakamura
  • Publication number: 20100258816
    Abstract: With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle ? of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 ?m/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.
    Type: Application
    Filed: June 21, 2010
    Publication date: October 14, 2010
    Applicants: The Kansai Electric Power Co., Inc., Central Research Institute of Electric Power Industry
    Inventors: Joji Nakayama, Yoshitaka Sugawara, Katsunori Asano, Hidekazu Tsuchida, Isaho Kamata, Toshiyuki Miyanagi, Tomonori Nakamura
  • Publication number: 20100261333
    Abstract: With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle ? of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 ?m/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.
    Type: Application
    Filed: June 21, 2010
    Publication date: October 14, 2010
    Applicants: The Kansai Electric Power Co., Inc., Central Research Institute of Electric Power Industry
    Inventors: Koji Nakayama, Yoshitaka Sugawara, Katsunori Asano, Hidekazu Tsuchida, Isaho Kamata, Toshiyuki Miyanagi, Tomonori Nakamura
  • Patent number: 7772594
    Abstract: The outer surface of a wide-gap semiconductor device is coated with a synthetic polymer compound containing one or more silicon-containing polymer having a bridged structure formed by a siloxane (Si—O—Si bond structure). The synthetic polymer compound may include, for example, a silicon-containing polymer which has one or more reactive groups (A?) selected from Si—R1, Si—O—R2 and Si—R3—OCOC(R4)?CH2, has a bridged structure formed by an Si—O—Si bond in one or more locations, and contains components having weight average molecular weights of not more than 1000 in an amount of 20% or less by weight.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: August 10, 2010
    Assignees: The Kansai Electric Power Co., Inc., Adeka Corporation
    Inventors: Yoshitaka Sugawara, Yoshikazu Shoji
  • Patent number: 7768017
    Abstract: With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle ? of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 ?m/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.
    Type: Grant
    Filed: December 1, 2004
    Date of Patent: August 3, 2010
    Assignees: The Kansai Electric Co., Inc., Central Research Institution of Electrical Power Industry
    Inventors: Koji Nakayama, Yoshitaka Sugawara, Katsunori Asano, Hidekazu Tsuchida, Isaho Kamata, Toshiyuki Miyanagi, Tomonori Nakamura
  • Publication number: 20100182813
    Abstract: In a SiC pn diode, the lifetime is controlled by electron beam irradiation of about 3×1013 cm?2 or more. As a result of the life time control, as shown by a current-voltage characteristic (K10) in FIG. 1, the current started to flow at about 32 V and the on-voltage at an applied current of 100 A was 50 V in the SiC pn diode. In this case, the SiC pn diode has a resistance of 0.5? when the SiC pn diode is turned on. The conducting region of the SiC pn diode is 0.4 cm2, and is reduced to 0.2 ?cm2 by increasing the on-resistance by the lifetime control. Therefore, for instance, in an electric circuit device using a diode and a resistor connected in series in prior arts, the resistor can be eliminated.
    Type: Application
    Filed: June 17, 2008
    Publication date: July 22, 2010
    Inventors: Katsunori Asano, Yoshitaka Sugawara, Atsushi Tanaka
  • Publication number: 20100179283
    Abstract: A silicon-containing compound of formula (1), and a curing composition containing a silicon-containing compound of formula (1) wherein Z is hydrogen, a silicon-containing compound of formula (1) wherein Z is C2-C4 alkenyl or alkynyl and a hydrosilylation catalyst. The composition has excellent handling and curing properties and provides a cured product with excellent heat resistance and flexibility. In formula (1), Ra—Rg=C1-C12 saturated aliphatic hydrocarbon group or C6-C12 aromatic hydrocarbon group. Re and Rf do not simultaneously represent C1-C12 saturated aliphatic hydrocarbon group; Y?C2-C4 alkylene; Z=hydrogen or C2-C4 alkenyl or alkynyl; K is 2-7; T is 1-7; P is 0-3; and M and N are numbers selected such that N:M=1:1 to 1:100, that all M's and N's total at least 15, and that the mass average molecular weight of the compound of formula (1) is 3,000 to 1,000,000.
    Type: Application
    Filed: April 21, 2008
    Publication date: July 15, 2010
    Applicant: ADEKA CORPORATION
    Inventors: Takashi Sueyoshi, Ken-ichiro Hiwatari, Tadashi Janado, Yoshikazu Shoji, Seiichi Saito, Yoshitaka Sugawara
  • Publication number: 20100150202
    Abstract: In the temperature measurement method for semiconductor devices, a junction temperature of a SiC GTO is determined by exploiting large temperature dependence of accumulation time ts as turn-OFF characteristic time of the SiC GTO that is a semiconductor switching element. The accumulation time ts is a time duration lasting from rise start time t1 of a gate turn-OFF current Ig until decay start time t2 of an anode current Ia. In this temperature measurement method, measured turn-OFF characteristic time is converted into a junction temperature of the SiC GTO based on relational characteristics between preliminarily measured accumulation time ts and junction temperatures.
    Type: Application
    Filed: September 28, 2006
    Publication date: June 17, 2010
    Inventors: Katsunori Asano, Yoshitaka Sugawara
  • Publication number: 20100084663
    Abstract: A silicon carbide Zener diode is a bipolar semiconductor device that has a mesa structure and includes a silicon carbide single crystal substrate of a first conductivity type, formed thereon, a silicon carbide conductive layer of a first conductivity type, and a silicon carbide conductive layer of a second conductivity type formed on the silicon carbide conductive layer of a first conductivity type, wherein a depletion layer that is formed under reverse bias at a junction between the silicon carbide conductive layer of a first conductivity type and the silicon carbide conductive layer of a second conductivity type does not reach a mesa corner formed in the silicon carbide conductive layer of a first conductivity type.
    Type: Application
    Filed: April 25, 2008
    Publication date: April 8, 2010
    Applicant: Central Research Institute of Electric Power
    Inventors: Ryosuke Ishii, Koji Nakayama, Yoshitaka Sugawara, Hidekazu Tsuchida
  • Publication number: 20100032686
    Abstract: Bipolar semiconductor devices have a Zener voltage controlled very precisely in a wide range of Zener voltages (for example, from 10 to 500 V). A bipolar semiconductor device has a mesa structure and includes a silicon carbide single crystal substrate of a first conductivity type, a silicon carbide conductive layer of a first conductivity type, a highly doped layer of a second conductivity type and a silicon carbide conductive layer of a second conductivity type which substrate and conductive layers are laminated in the order named.
    Type: Application
    Filed: January 31, 2008
    Publication date: February 11, 2010
    Applicants: THE KANSAI ELECTRIC POWER CO., INC., CENTRAL RESEARCH INSTITUTE OF ELECTRIC POWER INDUSTRY
    Inventors: Ryosuke Ishii, Koji Nakayama, Yoshitaka Sugawara, Hidekazu Tsuchida
  • Publication number: 20090317983
    Abstract: In a bipolar silicon carbide semiconductor device in which an electron and a hole recombine with each other during current passage within a silicon carbide epitaxial film grown from a surface of a silicon carbide single crystal substrate, an object described herein is the reduction of defects which are the nuclei of a stacking fault which is expanded by current passage, thereby suppressing the increase of the forward voltage of the bipolar silicon carbide semiconductor device. In a method for producing a bipolar silicon carbide semiconductor device, the device is subjected to a thermal treatment at a temperature of 300° C. or higher in the final step of production. Preferably, the above-mentioned thermal treatment is carried out after the formation of electrodes and then the resulting bipolar silicon carbide semiconductor device is mounted in a package.
    Type: Application
    Filed: September 1, 2006
    Publication date: December 24, 2009
    Applicants: THE KANSAI ELECTRIC POWER CO., INC., CENTRAL RESEARCH INSTITUTE OF ELECTRIC POWER INDUSTRY
    Inventors: Toshiyuki Miyanagi, Hidekazu Tsuchida, Isaho Kamata, Masahiro Nagano, Yoshitaka Sugawara, Koji Nakayama, Ryosuke Ishii
  • Patent number: 7626232
    Abstract: SiC-IGBTs, which have an inversion-type channel with high channel resistance and have high on-voltage due to an influence from the surface state of the interface between a gate insulating film and a base layer, are required to decrease the on-voltage. An embedded collector region is partially formed in a base layer which is formed on an emitter layer of a SiC semiconductor. A channel layer is formed on the base layer and the embedded collector region to constitute an accumulation-type channel. Consequently, at on time, holes are accumulated in the upper layer portion of the channel layer so that a low-resistant channel is formed. Current by the holes flows to the emitter layer through a channel from the collector region and becomes a base current for an npn transistor composed of the embedded collector region, the base region and the emitter region.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: December 1, 2009
    Assignee: The Kansai Electric Power Co., Inc.
    Inventors: Katsunori Asano, Yoshitaka Sugawara
  • Publication number: 20090225573
    Abstract: A stable power supply apparatus in accordance with the present invention comprises a secondary battery, a bidirectional chopper circuit and a bidirectional converter, wherein the secondary battery, the chopper circuit and the converter are connected in this order in the direction from the secondary battery side to a system bus line side. The converter is formed of a wide-gap semiconductor device, more particularly, a wide-gap bipolar semiconductor device, and the instantaneous large-power operation capability of the wide-gap bipolar semiconductor device and the instantaneous large-power supplying capability of the secondary battery are utilized. For a short time during which the influence of an instantaneous drop is prevented, the converter is operated as a converter having capability exceeding the instantaneous large-power supplying capability of the secondary battery and having power capacity several times or more the rating of the converter.
    Type: Application
    Filed: April 8, 2009
    Publication date: September 10, 2009
    Applicant: KANSAI Electric Power Co., Inc.
    Inventor: Yoshitaka Sugawara
  • Publication number: 20090195296
    Abstract: In a bipolar semiconductor device such that electrons and holes are recombined in a silicon carbide epitaxial film grown from the surface of a silicon carbide single crystal substrate at the time of on-state forward bias operation; an on-state forward voltage increased in a silicon carbide bipolar semiconductor device is recovered by shrinking the stacking fault area enlarged by on-state forward bias operation. In a method of this invention, the bipolar semiconductor device in which the stacking fault area enlarged and the on-state forward voltage has been increased by on-state forward bias operation, is heated at a temperature of higher than 350° C.
    Type: Application
    Filed: August 4, 2006
    Publication date: August 6, 2009
    Applicants: THE KANSAI ELECTRIC POWER CO., INC., CENTRAL RESEARCH INSTITUTE OF ELECTRIC POWER INDUSTRY
    Inventors: Toshiyuki Miyanagi, Hidekazu Tsuchida, Isaho Kamata, Yoshitaka Sugawara, Koji Nakayama, Ryosuke Ishii
  • Patent number: 7570502
    Abstract: A problem to be solved by the present invention is to eliminate variation in potential in a turn-off time period of each GTO element, and to stabilize a gate drawing current by surely performing the turn-off of the GTO element. In an inverter apparatus having a three-phase inverter configured to include paired GTO elements an inverter control portion has a simultaneous switching prevention function of delaying a turn-on operation of each of the GTO elements which correspond to phases other than a phase corresponding to an optional one of the GTO elements and also correspond to an electrode opposite to an electrode corresponding to the optional one of the GTO elements by a predetermined time in a case where a turn-on command signal for turning on each of the GTO elements is generated within a predetermined time period since the turn-off of the optional one of the GTO elements.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: August 4, 2009
    Assignees: The Kansai Electric Power Co., Inc., Nissin Electric Co., Ltd.
    Inventors: Yoshitaka Sugawara, Katsunori Asano, Mitsuru Matsukawa, Yoshifumi Minowa, Toshihiko Shikata