Abstract: A semiconductor device with high withstand voltage, reduced forward-direction voltage degradation, long lifetime and high reliability, is provided. A junction between the drift layer and anode layer of a bipolar semiconductor device and an electric field relaxation layer are formed at a distance from each other, and an edge portion of the anode is opposed to the semiconductor region between the junction and the electric field relaxation layer, with an insulating film intervening. When reverse-biased, due to the electric field effect imparted to the drift layer between the junction and the electric field relaxation layer from the electrode, with the insulating film intervening, the junction and electric field relaxation layer are electrically connected, and electric field concentration at the junction edge portion is relaxed. When forward-biased, the junction and electric field relaxation layer are electrically isolated, and forward-direction current flows only through the junction.

Abstract: A mesa-type wide-gap semiconductor gate turn-off thyristor has a low gate withstand voltage and a large leakage current. Since the ionization rate of P-type impurities greatly increases at high temperatures when compared with that at room temperature, the hole implantation amount increases and the minority carrier lifetime becomes longer. Consequently, the maximum controllable current is significantly lowered when compared with that at room temperature. To solve these problems, a p-type base layer is formed on an n-type SiC cathode emitter layer which has a cathode electrode on one surface, and a thin n-type base layer is formed on the p-type base layer. A mesa-shaped p-type anode emitter layer is formed in the central region of the n-type base layer.

Abstract: In a wide gap semiconductor device of SiC or the like used at a temperature of 150 degrees centigrade or higher, the insulation characteristic of a wide gap semiconductor element is improved and a high-voltage resistance is achieved. For these purposes, a synthetic high-molecular compound, with which the outer surface of the wide gap semiconductor element is coated, is formed in a three-dimensional steric structure which is formed by linking together organosilicon polymers C with covalent bonds resulting from addition reaction. The organosilicon polymers C have been formed by linking at least one organosilicon polymers A having a crosslinked structure using siloxane (Si—O—Si combination) with at least one organosilicon polymers B having a linear linked structure using siloxane through siloxane bonds.

Abstract: With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle ? of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 ?m/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.

Abstract: A problem to be solved by the present invention is to eliminate variation in potential in a turn-off time period of each GTO element, and to stabilize a gate drawing current by surely performing the turn-off of the GTO element.

Abstract: The temperature of a bipolar semiconductor element using a wide-gap semiconductor is raised using heating means, such as a heater, to obtain a power semiconductor device being large in controllable current and low in loss. The temperature is set at a temperature higher than the temperature at which the decrement of the steady loss of the wide-gap bipolar semiconductor element corresponding to the decrement of the built-in voltage lowering depending on the temperature rising of the wide-gap bipolar semiconductor element is larger than the increment of the steady loss corresponding to the increment of the ON resistance increasing depending on the temperature rising.

Abstract: The temperature of a bipolar semiconductor element using a wide-gap semiconductor is raised using heating means, such as a heater, to obtain a power semiconductor device being large in controllable current and low in loss. The temperature is set at a temperature higher than the temperature at which the decrement of the steady loss of the wide-gap bipolar semiconductor element corresponding to the decrement of the built-in voltage lowering depending on the temperature rising of the wide-gap bipolar semiconductor element is larger than the increment of the steady loss corresponding to the increment of the ON resistance increasing depending on the temperature rising.

Abstract: A stable power supply apparatus in accordance with the present invention comprises a secondary battery, a bidirectional chopper circuit and a bidirectional converter, wherein the secondary battery, the chopper circuit and the converter are connected in this order in the direction from the secondary battery side to a system bus line side. The converter is formed of a wide-gap semiconductor device, more particularly, a wide-gap bipolar semiconductor device, and the instantaneous large-power operation capability of the wide-gap bipolar semiconductor device and the instantaneous large-power supplying capability of the secondary battery are utilized. For a short time during which the influence of an instantaneous drop is prevented, the converter is operated as a converter having capability exceeding the instantaneous large-power supplying capability of the secondary battery and having power capacity several times or more the rating of the converter.

Abstract: The temperature of a bipolar semiconductor element using a wide-gap semiconductor is raised using heating means, such as a heater, to obtain a power semiconductor device being large in controllable current and low in loss. The temperature is set at a temperature higher than the temperature at which the decrement of the steady loss of the wide-gap bipolar semiconductor element corresponding to the decrement of the built-in voltage lowering depending on the temperature rising of the wide-gap bipolar semiconductor element is larger than the increment of the steady loss corresponding to the increment of the ON resistance increasing depending on the temperature rising.

Abstract: A buried gate region, a buried gate contact region and a gate contact region are provided on an SiC substrate. Thereby, a depletion layer expands in the channel region, and a high withstand voltage is attained in the normally off state. By applying a voltage of the built-in voltage or less to a gate, the depletion layer in the channel region becomes narrower and an ON-state resistance becomes low. Furthermore, when a voltage of the built-in voltage or more is applied to the gate, holes are injected from the gate so as to cause the conductivity modulation, and the ON-state resistance becomes further low.

Abstract: In a semiconductor device having a trench type insulated gate structure, in the case where a drift layer 2 of an n− conduction type has a high carrier density, when a high voltage is applied between a drain and a source in such a manner that a channel is not formed, the electric field strength of an insulator layer 9 below the trench type insulated gate is increased, thus causing breakdown. The withstand voltage of the semiconductor device is limited by the breakdown of the insulator layer 9, and it is difficult to realize high withstand voltage. In the characteristic of the present invention, a field relaxation semiconductor region 1 of a conduction type opposite to the conduction type of the drift layer 2 is formed within the drift layer 2 below the insulator layer 9 in the trench of the trench type insulated gate semiconductor device.

Abstract: A dielectric isolated high voltage semiconductor device having an arrangement for extending a depletion layer of a main junction beyond an insulating layer containing an island to a semiconductor supporter by applying the same reverse biasing voltage to the supporter and the islands. That is, in the structure, an electrode is provided at the back surface of the supporter and connected to a main electrode of the selected island. The above-mentioned main junction is the pn junction to which the reverse biasing voltage for securing the withstand voltage of the semiconductor device is applied. The device is structured, also, with high impurity concentration regions for preventing a depletion layer, formed during a reverse biasing of the main junction of a circuit element of an island, from extending into adjacently disposed islands.

Abstract: A power conversion apparatus has a four terminal semiconductor device including a drain terminal and a source terminal for supplying main current, a gate terminal for controlling the main current, and a base terminal for controlling the on-state voltage, and energy storage means which is connected in the main current circuit consisting of a load and a main power source, wherein electric power is supplied to the base terminal of the semiconductor device by energy stored in the storage means.Because electric power supplied to the base terminal is provided by energy from the main current circuit, the occurrence of power loss in the control circuit to achieve high frequency operation is avoided.

Abstract: A dielectric isolated high voltage semiconductor device having an arrangement for extending a depletion layer of a main junction beyond an insulating layer containing an island to a semiconductor supporter by applying the same reverse biasing voltage to the supporter and the islands. That is, in the structure, an electrode is provided at the back surface of the supporter and connected to a main electrode of the selected island. The above-mentioned main junction is the pn junction to which the reverse biasing voltage for securing the withstand voltage of the semiconductor device is applied.

Abstract: A semiconductor substrate is partitioned into a main IGBT region and a protection circuit region by a p-type well portion which is formed therebetween in contact with an emitter electrode and which acts as a cut-off region. Both a detection IGBT and protection circuit elements are formed within the protection circuit region. Since excessive carriers flowing from the main IGBT into the protection circuit region can efficiently be extracted through the p-type well portion, a highly reliable and high precision protection circuit built-in insulated gate semiconductor device is realized that can precisely detect any overcurrent, and operate without causing malfunction in the protection circuit and time delay.

Abstract: A circuit connecting a sub-IGBT element S.sub.2 having a smaller current capacity and a smaller saturated current than the main IGBT element S.sub.1 and a resistance R.sub.1 in series is connected to the main IGBT element S.sub.1 in parallel, a MOSFET element S.sub.3 being connected between the gate electrode of the sub-IGBT element S.sub.2 and the emitter electrode of the main IGBT element S.sub.1, a delay element being connected between the gate electrode of the sub-IGBT element S.sub.2 and the gate electrode of the main IGBT element S.sub.1. In normal operation, the ON-state voltage is small and low loss can be realized. In the event of a short-circuit accident, the sub-IGBT element S.sub.2 detects the short-circuit before the main IGBT element S.sub.1 turns on to prevent an over-current from flowing in the main IGBT element S.sub.1, which substantially improves the short-circuit resistivity of the semiconductor device.

Abstract: A semiconductor device includes an emitter region, a collector region provided directly under the emitter region, and a two-region base structure. The first base region is interposed between the emitter and collector regions, and the second base region supports the collector region. The aforementioned regions have a progressively higher impurity concentrations, with the collector region having an impurity concentration higher than that of the first base region, the second base region having an impurity concentration higher than that of the collector region, and the emitter region having an impurity concentration higher than that of the base region. Also included is a resistance region formed, in one embodiment, from a projecting end portion of one of the base layers. The projecting end portion of the base is fabricated so that both base portions contact one another in the resistance region, and consequently both base portions are of the same potential.

Abstract: According to the present invention, a MOSFET is formed of an n source, a p well, an n drain and a MOS gate electrode, a bipolar transistor is formed of an n emitter, a p base and an n collector formed in sequential order adjacent to the n drain. These transistors are formed by being merged with each other by the contact of n drain and the n emitter of the same conductivity type. Holes are injected into the drain of a voltage-driven type transistor comprised of the MOSFET from the bipolar transistor having a very small collector saturation resistance. With this, it is possible to give rise to conductivity modulation in the drain of the MOSFET, while the power dissipation of the voltage-driven type semiconductor device becomes very small.

Abstract: A semiconductor substrate is partitioned into a main IGBT region and a protection circuit region by a p-type well portion which is formed therebetween in contact with an emitter electrode and which acts as a cut-off region. Both a detection IGBT and protection circuit elements are formed within the protection circuit region. Since excessive carriers flowing from the main IGBT into the protection circuit region can efficiently be extracted through the p-type well portion, a highly reliable and high precision protection circuit built-in insulated gate semiconductor device is realized that can precisely detect any overcurrent, and operate without causing malfunction in the protection circuit and time delay.

Abstract: A semiconductor device has a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type contacted by respective first and second electrodes. A semi-insulating layer extends between the first and second electrodes and there is a first insulating layer between the semi-insulating layer and the first semiconductor region. The sheet resistivity of the semi-insulating layer varies, and this improves the high breakdown voltage of the p-n junction of the semiconductor device between the first and second semiconductor layers, by acting as a shield for charges included on a passivation insulation layer covering the semi-insulating layer and the first and second electrodes. Third semiconductor regions, with corresponding third electrodes, extend around, and are spaced from, the second semiconductor region.