Patents by Inventor Yoshiyuki Harada

Yoshiyuki Harada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9053931
    Abstract: According to one embodiment, a nitride semiconductor wafer includes: a silicon substrate; a buffer section provided on the silicon substrate; and a functional layer provided on the buffer section and contains nitride semiconductor. The buffer section includes first to n-th buffer layers (n being an integer of 4 or more) containing nitride semiconductor. An i-th buffer layer (i being an integer of 1 or more and less than n) of the first to n-th buffer layers has a lattice length Wi in a first direction parallel to a major surface of the first buffer layer. An (i+1)-th buffer layer provided on the i-th buffer layer has a lattice length W(i+1) in the first direction. In the first to n-th buffer layers the i-th buffer layer and the (i+1)-th buffer layer satisfy relation of (W(i+1)?Wi)/Wi?0.008.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: June 9, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisashi Yoshida, Toshiki Hikosaka, Yoshiyuki Harada, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 9048362
    Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers containing a nitride semiconductor and a light emitting layer. The emitting layer includes a barrier layer containing III group elements, and a well layer stacked with the barrier layer and containing III group elements. The barrier layer is divided into a first portion on an n-type semiconductor layer side and a second portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the second portion is lower than that of the first portion. The well layer is divided into a third portion on an n-type semiconductor layer side and a fourth portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the fourth portion is higher than that of the third portion.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: June 2, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeya Kimura, Yoshiyuki Harada, Hajime Nago, Koichi Tachibana, Shinya Nunoue
  • Publication number: 20150124276
    Abstract: A non-transitory computer-readable storage medium stores a printer driver. The printer driver causes the processor of a computing device to function as a printer driver core section and a print setup user interface section and causes these sections to perform the following processing. The processing includes: defining an area in a PrintTicket to create a first PrintTicket, by the printer driver core section; operating a display section of the computing device to display the print setup screen, and incorporating another PrintTicket into the area of the first PrintTicket to create a second PrintTicket, by the print setup user interface section, where the another PrintTicket includes a description of information about another print feature having been inputted on the print setup screen. The processing further includes converting the second PrintTicket into a third PrintTicket which can be interpreted by the print device, by the printer driver core section.
    Type: Application
    Filed: November 4, 2014
    Publication date: May 7, 2015
    Inventor: Yoshiyuki HARADA
  • Patent number: 9006706
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting layer, a first intermediate layer, and a second intermediate layer. The n-type and p-type semiconductor layers include a nitride semiconductor. The light emitting layer is provided between the n-type and p-type semiconductor layers, and includes barrier layers and a well layer. A bandgap energy of the well layer is less than that of the barrier layers. The first intermediate layer is provided between the light emitting layer and the p-type semiconductor layer. A bandgap energy of the first intermediate layer is greater than that of the barrier layers. The second intermediate layer includes first and second portions. The first portion is in contact with a p-side barrier layer most proximal to the p-type semiconductor layer. The second portion is in contact with the first intermediate layer.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: April 14, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hung Hung, Yoshiyuki Harada, Jongil Hwang, Mitsuhiro Kushibe, Naoharu Sugiyama, Shinya Nunoue
  • Publication number: 20140319460
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type and having a major surface, a second semiconductor layer of a second conductivity type, and a light emitting layer provided between the first and second semiconductor layers. The major surface is opposite to the light emitting layer. The first semiconductor layer has structural bodies provided in the major surface. The structural bodies are recess or protrusion. A centroid of a first structural body aligns with a centroid of a second structural body nearest the first structural. hb, rb, and Rb satisfy rb/(2·hb)?0.7, and rb/Rb<1, where hb is a depth of the recess, rb is a width of a bottom portion of the recess, and Rb is a width of the protrusion.
    Type: Application
    Filed: July 14, 2014
    Publication date: October 30, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiki HIKOSAKA, Yoshiyuki HARADA, Maki SUGAI, Shinya NUNOUE
  • Publication number: 20140293345
    Abstract: Provided is a non-transitory computer-readable storage medium storing a printer driver and a localization method for the printer driver. The printer driver causes a computing device to perform the following processing. The processing includes creating print capability information based on a localization resource file including definitions of strings about print features and on a configuration file including a definition of a dummy feature wherein one of the strings is designated. The created print capability information includes descriptions of setup items of the print features and descriptions of option values of each setup item, and the designated string.
    Type: Application
    Filed: March 27, 2014
    Publication date: October 2, 2014
    Applicant: KONICA MINOLTA, INC.
    Inventor: Yoshiyuki Harada
  • Publication number: 20140295602
    Abstract: According to an embodiment, a semiconductor light emitting device includes a foundation layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The foundation layer has an unevenness having recesses, side portions, and protrusions. A first major surface of the foundation layer has an overlay-region. The foundation layer has a plurality of dislocations including first dislocations whose one ends reaching the recess and second dislocations whose one ends reaching the protrusion. A proportion of a number of the second dislocations reaching the first major surface to a number of all of the second dislocations is smaller than a proportion of a number of the first dislocations reaching the first major surface to a number of all of the first dislocations. A number of the dislocations reaching the overlay-region of the first major surface is smaller than a number of all of the first dislocations.
    Type: Application
    Filed: June 10, 2014
    Publication date: October 2, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosawa, Yoshiyuki Harada, Maki Sugai, Shinya Nunoue
  • Patent number: 8842321
    Abstract: The information processing apparatus includes a storage section for storing function information on a function provided in a printing device, and a creating section for creating, based on the function information, a data structure having a data section for storing actual data of a setting value for the function and an index section for storing information for accessing the actual data of the setting value. In addition to the setting value for a printer driver which gives a printing instruction to the printing device, the creating section allows the data section to store a setting value which can be used by a printer driver which gives the printing instruction to a printing device of a different model and/or the printer driver of a different version.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: September 23, 2014
    Assignee: Konica Minolta, Inc.
    Inventor: Yoshiyuki Harada
  • Patent number: 8829544
    Abstract: According to an embodiment, a semiconductor light emitting device includes a foundation layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The foundation layer has an unevenness having recesses, side portions, and protrusions. A first major surface of the foundation layer has an overlay-region. The foundation layer has a plurality of dislocations including first dislocations whose one ends reaching the recess and second dislocations whose one ends reaching the protrusion. A proportion of a number of the second dislocations reaching the first major surface to a number of all of the second dislocations is smaller than a proportion of a number of the first dislocations reaching the first major surface to a number of all of the first dislocations. A number of the dislocations reaching the overlay-region of the first major surface is smaller than a number of all of the first dislocations.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: September 9, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiki Hikosaka, Yoshiyuki Harada, Maki Sugai, Shinya Nunoue
  • Patent number: 8823016
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type and having a major surface, a second semiconductor layer of a second conductivity type, and a light emitting layer provided between the first and second semiconductor layers. The major surface is opposite to the light emitting layer. The first semiconductor layer has structural bodies provided in the major surface. The structural bodies are recess or protrusion. A centroid of a first structural body aligns with a centroid of a second structural body nearest the first structural. hb, rb, and Rb satisfy rb/(2·hb)?0.7, and rb/Rb<1, where hb is a depth of the recess, rb is a width of a bottom portion of the recess, and Rb is a width of the protrusion.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: September 2, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiki Hikosaka, Yoshiyuki Harada, Maki Sugai, Shinya Nunoue
  • Patent number: 8815717
    Abstract: According to one embodiment, a vapor deposition method is disclosed for forming a nitride semiconductor layer on a substrate by supplying a group III source-material gas and a group V source-material gas. The method can deposit a first semiconductor layer including a nitride semiconductor having a compositional proportion of Al in group III elements of not less than 10 atomic percent by supplying the group III source-material gas from a first outlet and by supplying the group V source-material gas from a second outlet. The method can deposit a second semiconductor layer including a nitride semiconductor having a compositional proportion of Al in group III elements of less than 10 atomic percent by mixing the group III and group V source-material gases and supplying the mixed group III and group V source-material gases from at least one of the first outlet and the second outlet.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: August 26, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Harada, Koichi Tachibana, Toshiki Hikosaka, Hajime Nago, Shinya Nunoue
  • Publication number: 20140209013
    Abstract: A crystal growth method for nitride semiconductors, including the steps of growing a first semiconductor layer containing InxGa1-xN (0<x?1) on a substrate, with the use of a first carrier gas formed with an inert gas; growing a second semiconductor layer containing InyGa1-yN (0?y<1, y<x) on the first semiconductor layer, with the use of a second carrier gas containing the inert gas and H2 gas, an amount of the H2 gas being smaller than an amount of the inert gas; and growing a third semiconductor layer containing InzGa1-zN (0?z<1, z<x) on the second semiconductor layer, with the use of a third carrier gas containing the inert gas and H2 gas, an amount of the H2 gas in the third carrier gas being a smaller than the amount of H2 gas in the second carrier gas.
    Type: Application
    Filed: April 3, 2014
    Publication date: July 31, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomonari SHIODA, Toshiki Hikosaka, Yoshiyuki Harada, Koichi Tachibana, Shinya Nunoue
  • Patent number: 8772800
    Abstract: According to one embodiment, a semiconductor light-emitting device includes: a first conductivity type first semiconductor layer containing a nitride semiconductor crystal and having a tensile stress in a (0001) surface; a second conductivity type second semiconductor layer containing a nitride semiconductor crystal and having a tensile stress in the (0001) surface; a light emitting layer provided between the first semiconductor layer and the second semiconductor layer, containing a nitride semiconductor crystal, and having an average lattice constant larger than the lattice constant of the first semiconductor layer; and a first stress application layer provided on a side opposite to the light emitting layer of the first semiconductor layer and applying a compressive stress to the first semiconductor layer.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: July 8, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoharu Sugiyama, Taisuke Sato, Kotaro Zaima, Jumpei Tajima, Toshiki Hikosaka, Yoshiyuki Harada, Hisashi Yoshida, Shinya Nunoue
  • Publication number: 20140183446
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting layer. The p-type semiconductor layer includes a first p-side layer, a second p-side layer, and a third p-side layer. A concentration profile of Mg of a p-side region includes a first portion, a second portion, a third portion, a fourth portion, a fifth portion, a sixth portion and a seventh portion. The p-side region includes the light emitting layer, the second p-side layer, and the third p-side layer. A Mg concentration of the sixth portion is not less than 1×1020 cm?3 and not more than 3×1020 cm?3. The Al concentration is 1/100 of the maximum value at a second position. A Mg concentration at the second position is not less than 2×1018 cm?3.
    Type: Application
    Filed: December 2, 2013
    Publication date: July 3, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hajime NAGO, Yoshiyuki HARADA, Shigeya KIMURA, Hisashi YOSHIDA, Shinya NUNOUE
  • Publication number: 20140183447
    Abstract: According to one embodiment, a semiconductor light emitting element includes an n-type semiconductor layer including a nitride semiconductor, a p-type semiconductor layer and a light emitting layer. The p-type semiconductor layer includes a first p-side layer of Alx1Ga1?x1N (0?x1<1) including Mg, a second p-side layer of Alx2Ga1?x2N (0<x2<1) including Mg and a third p-side layer of Alx3Ga1?x3N (x2<x3<1) including Mg. The light emitting layer is provided between the n-type semiconductor layer and the second p-side layer. The light emitting layer includes barrier layers and well layers. Each of the well layers is provided between the barrier layers. A p-side barrier layer of the barrier layers most proximal to the second p-side layer includes a first layer of Alz1Ga1?z1N (0?z1), and a second layer of Alz2Ga1?z2N (z1<z2<x2).
    Type: Application
    Filed: December 12, 2013
    Publication date: July 3, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hajime NAGO, Shigeya KIMURA, Yoshiyuki HARADA, Shinya NUNOUE
  • Publication number: 20140138699
    Abstract: According to one embodiment, a nitride semiconductor device includes a stacked body and a functional layer. The stacked body includes an AlGaN layer of AlxGa1-xN (0<x?1), a first Si-containing layer, a first GaN layer, a second Si-containing layer, and a second GaN layer. The first Si-containing layer contacts an upper surface of the AlGaN layer. The first Si-containing layer contains Si at a concentration not less than 7×1019/cm3 and not more than 4×1020/cm3. The first GaN layer is provided on the first Si-containing layer. The first GaN layer includes a protrusion having an oblique surface tilted with respect to the upper surface. The second Si-containing layer is provided on the first GaN layer. The second Si-containing layer contains Si. The second GaN layer is provided on the second Si-containing layer. The functional layer is provided on the stacked body. The functional layer includes a nitride semiconductor.
    Type: Application
    Filed: February 28, 2013
    Publication date: May 22, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiki HIKOSAKA, Yoshiyuki Harada, Hisashi Yoshida, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8728237
    Abstract: A method for growing nitride semiconductor crystals contains: growing a first semiconductor layer containing InxGa1-xN (0<x?1) on a substrate at a first growth temperature, using a first carrier gas containing an inert gas; growing a second semiconductor layer containing InyGa1-yN (0?y<1, y<x) on the first semiconductor layer at a second growth temperature higher than the first growth temperature, using a second carrier gas containing the inert gas and H2 gas, an amount of the H2 gas being smaller than an amount of the inert gas; and growing a third semiconductor layer containing InzGa1-zN (0?z<1, z<x) on the second semiconductor layer at the second growth temperature, using a third carrier gas containing the inert gas and H2 gas, an amount of the H2 gas in the third carrier gas being a smaller than the amount of H2 gas in the second carrier gas.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: May 20, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Toshiki Hikosaka, Yoshiyuki Harada, Koichi Tachibana, Shinya Nunoue
  • Publication number: 20140124790
    Abstract: According to one embodiment, a nitride semiconductor element includes a foundation layer, a functional layer and a stacked body. The stacked body is provided between the foundation layer and the functional layer. The stacked body includes a first stacked intermediate layer including a first GaN intermediate layer, a first high Al composition layer of Alx1Ga1-x1N (0<x1?1) and a first low Al composition layer. A compressive strain is applied to the first low Al composition layer. Unstrained GaN has a first lattice spacing. The Alx1Ga1-x1N (0<x1?1) when unstrained has a second lattice spacing. The first high Al composition layer has a third lattice spacing. An Al composition ratio of the first low Al composition layer is not more than a ratio of a difference between the first and third lattice spacings to a difference between the first and second lattice spacings.
    Type: Application
    Filed: January 14, 2014
    Publication date: May 8, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiki HIKOSAKA, Yoshiyuki HARADA, Hisashi YOSHIDA, Naoharu SUGIYAMA, Shinya NUNOUE
  • Publication number: 20140109831
    Abstract: According to one embodiment, a vapor deposition method is disclosed for forming a nitride semiconductor layer on a substrate by supplying a group III source-material gas and a group V source-material gas. The method can deposit a first semiconductor layer including a nitride semiconductor having a compositional proportion of Al in group III elements of not less than 10 atomic percent by supplying the group III source-material gas from a first outlet and by supplying the group V source-material gas from a second outlet. The method can deposit a second semiconductor layer including a nitride semiconductor having a compositional proportion of Al in group III elements of less than 10 atomic percent by mixing the group III and group V source-material gases and supplying the mixed group III and group V source-material gases from at least one of the first outlet and the second outlet.
    Type: Application
    Filed: December 30, 2013
    Publication date: April 24, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiyuki HARADA, Koichi Tachibana, Toshiki Hikosaka, Hajime Nago, Shinya Nunoue
  • Patent number: 8707207
    Abstract: There are described a method and a computer executable program of the same, each of which makes it possible to provide registered items for a predetermined processing, which is established in advance corresponding to user's demands. The method includes: displaying a list of plural registrable items on a display section, which can be registered in order to provide at least one of the plural registrable items for the predetermined processing; accepting a registration instruction for registering said at least one of the plural registrable items, which includes an attribute value that indicates a status of its registration, based on an operation conducted by a user; providing the registered item for the predetermined processing according to the attribute value of the registration concerned; and when the registration instruction is accepted, displaying an attached image, which corresponds to the attribute value of the registration concerned, associating with one of the registrable items.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: April 22, 2014
    Assignee: Konica Minolta Business Technologies, Inc.
    Inventors: Yoshiyuki Harada, Seiji Harada