Abstract: A method of forming a conductive powder includes reducing, by a reduction reaction, a conductive powder precursor gas using a plasma. Reducing the conductive powder precursor gas forms the conductive powder. The method further includes filtering the conductive powder based on particle size. The method further includes dispersing a portion of the conductive powder having a particle size below a threshold value in a fluid.

Abstract: A method for forming a photomask includes the following steps. A substrate is provided, which has a pattern region and a peripheral region surrounding the pattern region. A first etching operation is performed on a first surface of the substrate to remove first portions of the substrate in the pattern region, so as to form recesses in the pattern region of the substrate. A blasting operation is performed on the first surface of the substrate. A BARC layer is formed filling the recesses and over the first surface of the substrate. A second etching operation is performed on a second surface of the substrate opposite to the first surface until portions of the BARC layer in the recesses are exposed. The BARC layer is removed after the second etching operation, so as to form openings in the substrate in the pattern region.

Abstract: An apparatus for a lithography device is provided, which includes a laser-based particle eliminating component and a particle collector. The laser-based particle eliminating component includes a laser emitter and a laser absorbing member. The laser emitter is configured to emit laser beams for irradiating particles in a space near a photomask of the lithography device. The laser absorbing member is disposed opposite to the laser emitter for absorbing the laser beams. The particle collector is configured for collecting the irradiated particles.

Abstract: An apparatus for a lithography device is provided, which includes a laser-based particle eliminating component and a particle collector. The laser-based particle eliminating component includes a laser emitter and a laser absorbing member. The laser emitter is configured to emit laser beams for irradiating particles in a space near a photomask of the lithography device. The laser absorbing member is disposed opposite to the laser emitter for absorbing the laser beams. The particle collector is configured for collecting the irradiated particles.

Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a metal plug in a first opening over a substrate, the metal plug is over a silicide layer, and the silicide layer is over a metal oxide layer. The metal oxide layer has an oxygen gradient, such that a percentage of oxygen increases from a top surface of the metal oxide layer to a bottom surface of the metal oxide layer. The metal oxide layer unpins the Fermi level of the interface between the metal plug and the substrate, which is exhibited by a lowered Schottky barrier height (SBH) and increased oxygen vacancy states between the V.B. and the C.B. of the metal oxide layer, which decreases the intrinsic resistivity between the metal plug and the substrate as compared to a semiconductor device that lacks such a metal oxide layer.

Abstract: An embodiment contact plug includes a bilayer structure and a diffusion barrier layer on a sidewall and a bottom surface of the bilayer structure. The bilayer structure includes a conductive core and a conductive liner on a sidewall and a bottom surface of the conductive core. In the embodiment contact plug, the conductive liner comprises cobalt or ruthenium.

Abstract: Disclosed herein is a method of forming a metal-to-semiconductor contact with a doped metal oxide interlayer. An insulating layer is formed on a top surface of a semiconductor substrate with target region at the top surface of the semiconductor substrate. An opening is etched through the insulating layer with the opening exposing a top surface of a portion of the target region. A doped metal oxide interlayer is formed in the opening and contacts the top surface of the target region. The remainder of the opening is filled with a metal plug, the doped metal oxide interlayer disposed between the metal plug and the substrate. The doped metal oxide interlayer is formed from one of tin oxide, titanium oxide or zinc oxide and is doped with fluorine.

Abstract: A method of preparing a semiconductor substrate with metal bumps on both sides of the substrate includes depositing a first-side UBM layer on a first surface of the substrate, and forming a plurality of first-side metal bumps on the first surface of the substrate after the first-side UBM layer is deposited. The method includes forming a second-side UBM layer on a second side of the substrate, and the first surface and the second surface are opposite of each other. The method includes forming a plurality of second-side metal bumps on the second surface of the substrate after the second-side UBM layer is deposited. The method includes removing exposed first-side UBM layer and exposed second-side UBM layer after the plurality of first-side metal bumps and the plurality of second-side metal bumps are formed. The method includes reflowing the plurality of first-side metal bumps and the plurality of second side metal bumps.

Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a metal plug in a first opening over a substrate, the metal plug is over a silicide layer, and the silicide layer is over a metal oxide layer. The metal oxide layer has an oxygen gradient, such that a percentage of oxygen increases from a top surface of the metal oxide layer to a bottom surface of the metal oxide layer. The metal oxide layer unpins the Fermi level of the interface between the metal plug and the substrate, which is exhibited by a lowered Schottky barrier height (SBH) and increased oxygen vacancy states between the V.B. and the C.B. of the metal oxide layer, which decreases the intrinsic resistivity between the metal plug and the substrate as compared to a semiconductor device that lacks such a metal oxide layer.

Abstract: A method for forming an interconnect structure includes forming a dielectric layer overlying a substrate, forming an opening in the dielectric layer, forming a metal-containing layer overlying the opening in the dielectric layer, forming a conformal protective layer overlying the metal-containing layer, filling a conductive layer in the opening, and performing a thermal process to form a metal oxide layer barrier layer underlying the metal-containing layer.

Abstract: An apparatus comprises: a shower head having a supply plenum for supplying the gas to the chamber and a vacuum manifold fluidly coupled to the supply plenum; and at least one vacuum system fluidly coupled to the vacuum manifold of the shower head.

Abstract: An embodiment contact plug includes a bilayer structure and a diffusion barrier layer on a sidewall and a bottom surface of the bilayer structure. The bilayer structure includes a conductive core and a conductive liner on a sidewall and a bottom surface of the conductive core. In the embodiment contact plug, the conductive liner comprises cobalt or ruthenium.

Abstract: Embodiments of the present disclosure include contact structures and methods of forming the same. An embodiment is a method of forming a semiconductor device, the method including forming a contact region over a substrate, forming a dielectric layer over the contact region and the substrate, and forming an opening through the dielectric layer to expose a portion of the contact region. The method further includes forming a metal-silicide layer on the exposed portion of the contact region and along sidewalls of the opening; and filling the opening with a conductive material to form a conductive plug in the dielectric layer, the conductive plug being electrically coupled to the contact region.

Abstract: An apparatus and method are disclosed for forming thin films on a semiconductor substrate. The apparatus in one embodiment includes a process chamber configured for supporting the substrate, a gas excitation power source, and first and second gas distribution showerheads fluidly coupled to a reactive process gas supply containing film precursors. The showerheads dispense the gas into two different zones above the substrate, which is excited to generate an inner plasma field and an outer plasma field over the wafer. The apparatus deposits a material on the substrate in a manner that promotes the formation of a film having a substantially uniform thickness across the substrate. In one embodiment, the substrate is a wafer. Various embodiments include first and second independently controllable power sources connected to the first and second showerheads to vary the power level and plasma intensity in each zone.

Abstract: A method for forming an interconnect structure includes forming a dielectric layer overlying a substrate, forming an opening in the dielectric layer, forming a metal-containing layer overlying the opening in the dielectric layer, forming a conformal protective layer overlying the metal-containing layer, filling a conductive layer in the opening, and performing a thermal process to form a metal oxide layer barrier layer underlying the metal-containing layer.

Abstract: A method of preparing a semiconductor substrate with metal bumps on both sides of the substrate includes depositing a first-side UBM layer on a first surface of the substrate, and forming a plurality of first-side metal bumps on the first surface of the substrate after the first-side UBM layer is deposited. The method includes forming a second-side UBM layer on a second side of the substrate, and the first surface and the second surface are opposite of each other. The method includes forming a plurality of second-side metal bumps on the second surface of the substrate after the second-side UBM layer is deposited. The method includes removing exposed first-side UBM layer and exposed second-side UBM layer after the plurality of first-side metal bumps and the plurality of second-side metal bumps are formed. The method includes reflowing the plurality of first-side metal bumps and the plurality of second side metal bumps.

Abstract: A wafer processing system includes at least one metrology chamber, a process chamber, and a controller. The at least one metrology chamber is configured to measure a thickness of a first layer on a back side of a wafer. The process chamber is configured to perform a treatment on a front side of the wafer. The front side is opposite the back side. The process chamber includes therein a multi-zone chuck. The multi-zone chuck is configured to support the back side of the wafer. The multi-zone chuck has a plurality of zones with controllable clamping forces for securing the wafer to the multi-zone chuck. The controller is coupled to the metrology chamber and the multi-zone chuck. The controller is configured to control the clamping forces in the corresponding zones in accordance with measured values of the thickness of the first layer in the corresponding zones.

Abstract: The present disclosure is directed to a physical vapor deposition system configured to heat a semiconductor substrate or wafer. In some embodiments the disclosed physical vapor deposition system comprises at least one heat source having one or more lamp modules for heating of the substrate. The lamp modules may be separated from the substrate by a shielding device. In some embodiments, the shielding device comprises a one-piece device or a two piece device. The disclosed physical vapor deposition system can heat the semiconductor substrate, reflowing a metal film deposited thereon without the necessity for separate chambers, thereby decreasing process time, requiring less thermal budget, and decreasing substrate damage.

Abstract: Embodiments of the present disclosure include contact structures and methods of forming the same. An embodiment is a method of forming a semiconductor device, the method including forming a contact region over a substrate, forming a dielectric layer over the contact region and the substrate, and forming an opening through the dielectric layer to expose a portion of the contact region. The method further includes forming a metal-silicide layer on the exposed portion of the contact region and along sidewalls of the opening; and filling the opening with a conductive material to form a conductive plug in the dielectric layer, the conductive plug being electrically coupled to the contact region.

Abstract: Embodiments of the present disclosure include contact structures and methods of forming the same. An embodiment is a method of forming a semiconductor device, the method including forming a contact region over a substrate, forming a dielectric layer over the contact region and the substrate, and forming an opening through the dielectric layer to expose a portion of the contact region. The method further includes forming a metal-silicide layer on the exposed portion of the contact region and along sidewalls of the opening; and filling the opening with a conductive material to form a conductive plug in the dielectric layer, the conductive plug being electrically coupled to the contact region.